t7x/deps/asmjit/db/isa_x86.json
2023-12-06 17:43:39 -05:00

4601 lines
566 KiB
JSON

{
"instructions": [
{"category": "GP", "data": [
{"inst": "adc x:al, ib/ub" , "op": "14 ib" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=X", "altForm": true},
{"inst": "adc x:ax, iw/uw" , "op": "66 15 iw" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=X", "altForm": true},
{"inst": "adc X:eax, id/ud" , "op": "15 id" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=X", "altForm": true},
{"inst": "adc X:rax, id" , "op": "REX.W 15 id" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=X", "altForm": true},
{"inst": "[lock|xacqrel] adc x:r8/m8, ib/ub" , "op": "M: 80 /2 ib" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=X"},
{"inst": "[lock|xacqrel] adc x:r16/m16, iw/uw" , "op": "M: 66 81 /2 iw" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=X"},
{"inst": "[lock|xacqrel] adc X:r32/m32, id/ud" , "op": "M: 81 /2 id" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=X"},
{"inst": "[lock|xacqrel] adc X:r64/m64, id" , "op": "M: REX.W 81 /2 id" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=X"},
{"inst": "[lock|xacqrel] adc x:r16/m16, ib" , "op": "M: 66 83 /2 ib" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=X"},
{"inst": "[lock|xacqrel] adc X:r32/m32, ib" , "op": "M: 83 /2 ib" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=X"},
{"inst": "[lock|xacqrel] adc X:r64/m64, ib" , "op": "M: REX.W 83 /2 ib" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=X"},
{"inst": "[lock|xacqrel] adc x:~r8/m8, ~r8" , "op": "MR: 10 /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=X"},
{"inst": "[lock|xacqrel] adc x:~r16/m16, ~r16" , "op": "MR: 66 11 /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=X"},
{"inst": "[lock|xacqrel] adc X:~r32/m32, ~r32" , "op": "MR: 11 /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=X"},
{"inst": "[lock|xacqrel] adc X:~r64/m64, ~r64" , "op": "MR: REX.W 11 /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=X"},
{"inst": "adc x:~r8, ~r8/m8" , "op": "RM: 12 /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=X"},
{"inst": "adc x:~r16, ~r16/m16" , "op": "RM: 66 13 /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=X"},
{"inst": "adc X:~r32, ~r32/m32" , "op": "RM: 13 /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=X"},
{"inst": "adc X:~r64, ~r64/m64" , "op": "RM: REX.W 13 /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=X"},
{"inst": "add x:al, ib/ub" , "op": "04 ib" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W", "altForm": true},
{"inst": "add x:ax, iw/uw" , "op": "66 05 iw" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W", "altForm": true},
{"inst": "add X:eax, id/ud" , "op": "05 id" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W", "altForm": true},
{"inst": "add X:rax, id" , "op": "REX.W 05 id" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W", "altForm": true},
{"inst": "[lock|xacqrel] add x:r8/m8, ib/ub" , "op": "M: 80 /0 ib" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
{"inst": "[lock|xacqrel] add x:r16/m16, iw/uw" , "op": "M: 66 81 /0 iw" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
{"inst": "[lock|xacqrel] add X:r32/m32, id/ud" , "op": "M: 81 /0 id" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
{"inst": "[lock|xacqrel] add X:r64/m64, id" , "op": "M: REX.W 81 /0 id" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
{"inst": "[lock|xacqrel] add x:r16/m16, ib" , "op": "M: 66 83 /0 ib" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
{"inst": "[lock|xacqrel] add X:r32/m32, ib" , "op": "M: 83 /0 ib" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
{"inst": "[lock|xacqrel] add X:r64/m64, ib" , "op": "M: REX.W 83 /0 ib" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
{"inst": "[lock|xacqrel] add x:~r8/m8, ~r8" , "op": "MR: 00 /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
{"inst": "[lock|xacqrel] add x:~r16/m16, ~r16" , "op": "MR: 66 01 /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
{"inst": "[lock|xacqrel] add X:~r32/m32, ~r32" , "op": "MR: 01 /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
{"inst": "[lock|xacqrel] add X:~r64/m64, ~r64" , "op": "MR: REX.W 01 /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
{"inst": "add x:~r8, ~r8/m8" , "op": "RM: 02 /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
{"inst": "add x:~r16, ~r16/m16" , "op": "RM: 66 03 /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
{"inst": "add X:~r32, ~r32/m32" , "op": "RM: 03 /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
{"inst": "add X:~r64, ~r64/m64" , "op": "RM: REX.W 03 /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
{"inst": "and x:al, ib/ub" , "op": "24 ib" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0", "altForm": true},
{"inst": "and x:ax, iw/uw" , "op": "66 25 iw" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0", "altForm": true},
{"inst": "and X:eax, id/ud" , "op": "25 id" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0", "altForm": true},
{"inst": "and X:rax, ud" , "op": "25 id" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0", "altForm": true},
{"inst": "and X:rax, id" , "op": "REX.W 25 id" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0", "altForm": true},
{"inst": "[lock|xacqrel] and x:r8/m8, ib/ub" , "op": "M: 80 /4 ib" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
{"inst": "[lock|xacqrel] and x:r16/m16, iw/uw" , "op": "M: 66 81 /4 iw" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
{"inst": "[lock|xacqrel] and X:r32/m32, id/ud" , "op": "M: 81 /4 id" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
{"inst": "[lock|xacqrel] and X:r64, ud" , "op": "M: 81 /4 id" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
{"inst": "[lock|xacqrel] and X:r64/m64, id" , "op": "M: REX.W 81 /4 id" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
{"inst": "[lock|xacqrel] and x:r16/m16, ib/ub" , "op": "M: 66 83 /4 ib" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
{"inst": "[lock|xacqrel] and X:r32/m32, ib/ub" , "op": "M: 83 /4 ib" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
{"inst": "[lock|xacqrel] and X:r64/m64, ib/ub" , "op": "M: REX.W 83 /4 ib" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
{"inst": "[lock|xacqrel] and x:~r8/m8, ~r8" , "op": "MR: 20 /r" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
{"inst": "[lock|xacqrel] and x:~r16/m16, ~r16" , "op": "MR: 66 21 /r" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
{"inst": "[lock|xacqrel] and X:~r32/m32, ~r32" , "op": "MR: 21 /r" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
{"inst": "[lock|xacqrel] and X:~r64/m64, ~r64" , "op": "MR: REX.W 21 /r" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
{"inst": "and x:~r8, ~r8/m8" , "op": "RM: 22 /r" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
{"inst": "and x:~r16, ~r16/m16" , "op": "RM: 66 23 /r" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
{"inst": "and X:~r32, ~r32/m32" , "op": "RM: 23 /r" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
{"inst": "and X:~r64, ~r64/m64" , "op": "RM: REX.W 23 /r" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
{"inst": "bsf w:r16, r16/m16" , "op": "RM: 66 0F BC /r" , "io": "OF=U SF=U ZF=W AF=U PF=U CF=U"},
{"inst": "bsf W:r32, r32/m32" , "op": "RM: 0F BC /r" , "io": "OF=U SF=U ZF=W AF=U PF=U CF=U"},
{"inst": "bsf W:r64, r64/m64" , "op": "RM: REX.W 0F BC /r" , "io": "OF=U SF=U ZF=W AF=U PF=U CF=U"},
{"inst": "bsr w:r16, r16/m16" , "op": "RM: 66 0F BD /r" , "io": "OF=U SF=U ZF=W AF=U PF=U CF=U"},
{"inst": "bsr W:r32, r32/m32" , "op": "RM: 0F BD /r" , "io": "OF=U SF=U ZF=W AF=U PF=U CF=U"},
{"inst": "bsr W:r64, r64/m64" , "op": "RM: REX.W 0F BD /r" , "io": "OF=U SF=U ZF=W AF=U PF=U CF=U"},
{"inst": "bswap X:r16" , "op": "66 0F C8+r"},
{"inst": "bswap X:r32" , "op": "0F C8+r"},
{"inst": "bswap X:r64" , "op": "REX.W 0F C8+r"},
{"inst": "bt R:r16/m16, ib/ub" , "op": "M: 66 0F BA /4 ib" , "io": "OF=U SF=U AF=U PF=U CF=W"},
{"inst": "bt R:r32/m32, ib/ub" , "op": "M: 0F BA /4 ib" , "io": "OF=U SF=U AF=U PF=U CF=W"},
{"inst": "bt R:r64/m64, ib/ub" , "op": "M: REX.W 0F BA /4 ib" , "io": "OF=U SF=U AF=U PF=U CF=W"},
{"inst": "bt R:r16/m16, r16" , "op": "MR: 66 0F A3 /r" , "io": "OF=U SF=U AF=U PF=U CF=W"},
{"inst": "bt R:r32/m32, r32" , "op": "MR: 0F A3 /r" , "io": "OF=U SF=U AF=U PF=U CF=W"},
{"inst": "bt R:r64/m64, r64" , "op": "MR: REX.W 0F A3 /r" , "io": "OF=U SF=U AF=U PF=U CF=W"},
{"inst": "[lock|xacqrel] btc x:r16/m16, ib/ub" , "op": "M: 66 0F BA /7 ib" , "io": "OF=U SF=U AF=U PF=U CF=W"},
{"inst": "[lock|xacqrel] btc X:r32/m32, ib/ub" , "op": "M: 0F BA /7 ib" , "io": "OF=U SF=U AF=U PF=U CF=W"},
{"inst": "[lock|xacqrel] btc X:r64/m64, ib/ub" , "op": "M: REX.W 0F BA /7 ib" , "io": "OF=U SF=U AF=U PF=U CF=W"},
{"inst": "[lock|xacqrel] btc x:r16/m16, r16" , "op": "MR: 66 0F BB /r" , "io": "OF=U SF=U AF=U PF=U CF=W"},
{"inst": "[lock|xacqrel] btc X:r32/m32, r32" , "op": "MR: 0F BB /r" , "io": "OF=U SF=U AF=U PF=U CF=W"},
{"inst": "[lock|xacqrel] btc X:r64/m64, r64" , "op": "MR: REX.W 0F BB /r" , "io": "OF=U SF=U AF=U PF=U CF=W"},
{"inst": "[lock|xacqrel] btr x:r16/m16, ib/ub" , "op": "M: 66 0F BA /6 ib" , "io": "OF=U SF=U AF=U PF=U CF=W"},
{"inst": "[lock|xacqrel] btr X:r32/m32, ib/ub" , "op": "M: 0F BA /6 ib" , "io": "OF=U SF=U AF=U PF=U CF=W"},
{"inst": "[lock|xacqrel] btr X:r64/m64, ib/ub" , "op": "M: REX.W 0F BA /6 ib" , "io": "OF=U SF=U AF=U PF=U CF=W"},
{"inst": "[lock|xacqrel] btr x:r16/m16, r16" , "op": "MR: 66 0F B3 /r" , "io": "OF=U SF=U AF=U PF=U CF=W"},
{"inst": "[lock|xacqrel] btr X:r32/m32, r32" , "op": "MR: 0F B3 /r" , "io": "OF=U SF=U AF=U PF=U CF=W"},
{"inst": "[lock|xacqrel] btr X:r64/m64, r64" , "op": "MR: REX.W 0F B3 /r" , "io": "OF=U SF=U AF=U PF=U CF=W"},
{"inst": "[lock|xacqrel] bts x:r16/m16, ib/ub" , "op": "M: 66 0F BA /5 ib" , "io": "OF=U SF=U AF=U PF=U CF=W"},
{"inst": "[lock|xacqrel] bts X:r32/m32, ib/ub" , "op": "M: 0F BA /5 ib" , "io": "OF=U SF=U AF=U PF=U CF=W"},
{"inst": "[lock|xacqrel] bts X:r64/m64, ib/ub" , "op": "M: REX.W 0F BA /5 ib" , "io": "OF=U SF=U AF=U PF=U CF=W"},
{"inst": "[lock|xacqrel] bts x:r16/m16, r16" , "op": "MR: 66 0F AB /r" , "io": "OF=U SF=U AF=U PF=U CF=W"},
{"inst": "[lock|xacqrel] bts X:r32/m32, r32" , "op": "MR: 0F AB /r" , "io": "OF=U SF=U AF=U PF=U CF=W"},
{"inst": "[lock|xacqrel] bts X:r64/m64, r64" , "op": "MR: REX.W 0F AB /r" , "io": "OF=U SF=U AF=U PF=U CF=W"},
{"inst": "[bnd|repIgnore] call rel16" , "op": "66 E8 cw" , "io": "OF=U SF=U ZF=U AF=U PF=U CF=U", "arch": "X86"},
{"inst": "[bnd|repIgnore] call rel32" , "op": "E8 cd" , "io": "OF=U SF=U ZF=U AF=U PF=U CF=U"},
{"inst": "[bnd|repIgnore] call R:r16/m16" , "op": "66 FF /2" , "io": "OF=U SF=U ZF=U AF=U PF=U CF=U", "arch": "X86"},
{"inst": "[bnd|repIgnore] call R:r32/m32" , "op": "FF /2" , "io": "OF=U SF=U ZF=U AF=U PF=U CF=U", "arch": "X86"},
{"inst": "[bnd|repIgnore] call R:r64/m64" , "op": "FF /2" , "io": "OF=U SF=U ZF=U AF=U PF=U CF=U", "arch": "X64"},
{"inst": "cbw x:<ax>" , "op": "66 98"},
{"inst": "cdq W:<edx>, <eax>" , "op": "99"},
{"inst": "cdqe X:<rax>" , "op": "REX.W 98"},
{"inst": "clc" , "op": "F8" , "io": "CF=0"},
{"inst": "cld" , "op": "FC" , "io": "DF=0"},
{"inst": "cmc" , "op": "F5" , "io": "CF=X"},
{"inst": "cmp R:al, ib/ub" , "op": "3C ib" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W", "altForm": true},
{"inst": "cmp R:ax, iw/uw" , "op": "66 3D iw" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W", "altForm": true},
{"inst": "cmp R:eax, id/ud" , "op": "3D id" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W", "altForm": true},
{"inst": "cmp R:rax, id" , "op": "REX.W 3D id" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W", "altForm": true},
{"inst": "cmp R:r8/m8, ib/ub" , "op": "M: 80 /7 ib" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
{"inst": "cmp R:r16/m16, iw/uw" , "op": "M: 66 81 /7 iw" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
{"inst": "cmp R:r32/m32, id/ud" , "op": "M: 81 /7 id" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
{"inst": "cmp R:r64/m64, id" , "op": "M: REX.W 81 /7 id" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
{"inst": "cmp R:r16/m16, ib" , "op": "M: 66 83 /7 ib" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
{"inst": "cmp R:r32/m32, ib" , "op": "M: 83 /7 ib" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
{"inst": "cmp R:r64/m64, ib" , "op": "M: REX.W 83 /7 ib" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
{"inst": "cmp R:r8/m8, r8" , "op": "MR: 38 /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
{"inst": "cmp R:r16/m16, r16" , "op": "MR: 66 39 /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
{"inst": "cmp R:r32/m32, r32" , "op": "MR: 39 /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
{"inst": "cmp R:r64/m64, r64" , "op": "MR: REX.W 39 /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
{"inst": "cmp R:r8, r8/m8" , "op": "RM: 3A /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
{"inst": "cmp R:r16, r16/m16" , "op": "RM: 66 3B /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
{"inst": "cmp R:r32, r32/m32" , "op": "RM: 3B /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
{"inst": "cmp R:r64, r64/m64" , "op": "RM: REX.W 3B /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
{"inst": "[rep|repne] cmps R:m8(ds:zsi), R:m8(es:zdi)" , "op": "A6" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W DF=R"},
{"inst": "[rep|repne] cmps R:m16(ds:zsi), R:m16(es:zdi)" , "op": "66 A7" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W DF=R"},
{"inst": "[rep|repne] cmps R:m32(ds:zsi), R:m32(es:zdi)" , "op": "A7" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W DF=R"},
{"inst": "[rep|repne] cmps R:m64(ds:zsi), R:m64(es:zdi)" , "op": "REX.W A7" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W DF=R"},
{"inst": "cwde X:<eax>" , "op": "98"},
{"inst": "cqo W:<rdx>, <rax>" , "op": "REX.W 99"},
{"inst": "cwd w:<dx>, <ax>" , "op": "66 99"},
{"inst": "dec x:r16" , "op": "66 48+r" , "io": "OF=W SF=W ZF=W AF=W PF=W", "arch": "X86"},
{"inst": "dec X:r32" , "op": "48+r" , "io": "OF=W SF=W ZF=W AF=W PF=W", "arch": "X86"},
{"inst": "[lock|xacqrel] dec x:r8/m8" , "op": "FE /1" , "io": "OF=W SF=W ZF=W AF=W PF=W"},
{"inst": "[lock|xacqrel] dec x:r16/m16" , "op": "66 FF /1" , "io": "OF=W SF=W ZF=W AF=W PF=W"},
{"inst": "[lock|xacqrel] dec X:r32/m32" , "op": "FF /1" , "io": "OF=W SF=W ZF=W AF=W PF=W"},
{"inst": "[lock|xacqrel] dec X:r64/m64" , "op": "REX.W FF /1" , "io": "OF=W SF=W ZF=W AF=W PF=W"},
{"inst": "div x:<ax>, r8/m8" , "op": "F6 /6" , "io": "OF=U SF=U ZF=U AF=U PF=U CF=U"},
{"inst": "div x:<dx>, x:<ax>, r16/m16" , "op": "66 F7 /6" , "io": "OF=U SF=U ZF=U AF=U PF=U CF=U"},
{"inst": "div X:<edx>, X:<eax>, r32/m32" , "op": "F7 /6" , "io": "OF=U SF=U ZF=U AF=U PF=U CF=U"},
{"inst": "div X:<rdx>, X:<rax>, r64/m64" , "op": "REX.W F7 /6" , "io": "OF=U SF=U ZF=U AF=U PF=U CF=U"},
{"inst": "enter iw/uw, ib/ub" , "op": "C8 iw ib" , "volatile": true},
{"inst": "idiv x:<ax>, r8/m8" , "op": "F6 /7" , "io": "OF=U SF=U ZF=U AF=U PF=U CF=U"},
{"inst": "idiv x:<dx>, x:<ax>, r16/m16" , "op": "66 F7 /7" , "io": "OF=U SF=U ZF=U AF=U PF=U CF=U"},
{"inst": "idiv X:<edx>, X:<eax>, r32/m32" , "op": "F7 /7" , "io": "OF=U SF=U ZF=U AF=U PF=U CF=U"},
{"inst": "idiv X:<rdx>, X:<rax>, r64/m64" , "op": "REX.W F7 /7" , "io": "OF=U SF=U ZF=U AF=U PF=U CF=U"},
{"inst": "imul x:<ax>, r8/m8" , "op": "F6 /5" , "io": "OF=W SF=W ZF=U AF=U PF=U CF=W"},
{"inst": "imul w:<dx>, x:<ax>, r16/m16" , "op": "66 F7 /5" , "io": "OF=W SF=W ZF=U AF=U PF=U CF=W"},
{"inst": "imul W:<edx>, X:<eax>, r32/m32" , "op": "F7 /5" , "io": "OF=W SF=W ZF=U AF=U PF=U CF=W"},
{"inst": "imul W:<rdx>, X:<rax>, r64/m64" , "op": "REX.W F7 /5" , "io": "OF=W SF=W ZF=U AF=U PF=U CF=W"},
{"inst": "imul x:~r16, ~r16/m16" , "op": "RM: 66 0F AF /r" , "io": "OF=W SF=W ZF=U AF=U PF=U CF=W"},
{"inst": "imul X:~r32, ~r32/m32" , "op": "RM: 0F AF /r" , "io": "OF=W SF=W ZF=U AF=U PF=U CF=W"},
{"inst": "imul X:~r64, ~r64/m64" , "op": "RM: REX.W 0F AF /r" , "io": "OF=W SF=W ZF=U AF=U PF=U CF=W"},
{"inst": "imul w:r16, r16/m16, ib" , "op": "RM: 66 6B /r ib" , "io": "OF=W SF=W ZF=U AF=U PF=U CF=W"},
{"inst": "imul W:r32, r32/m32, ib" , "op": "RM: 6B /r ib" , "io": "OF=W SF=W ZF=U AF=U PF=U CF=W"},
{"inst": "imul W:r64, r64/m64, ib" , "op": "RM: REX.W 6B /r ib" , "io": "OF=W SF=W ZF=U AF=U PF=U CF=W"},
{"inst": "imul w:r16, r16/m16, iw/uw" , "op": "RM: 66 69 /r iw" , "io": "OF=W SF=W ZF=U AF=U PF=U CF=W"},
{"inst": "imul W:r32, r32/m32, id/ud" , "op": "RM: 69 /r id" , "io": "OF=W SF=W ZF=U AF=U PF=U CF=W"},
{"inst": "imul W:r64, r64/m64, id" , "op": "RM: REX.W 69 /r id" , "io": "OF=W SF=W ZF=U AF=U PF=U CF=W"},
{"inst": "inc x:r16" , "op": "66 40+r" , "io": "OF=W SF=W ZF=W AF=W PF=W", "arch": "X86"},
{"inst": "inc X:r32" , "op": "40+r" , "io": "OF=W SF=W ZF=W AF=W PF=W", "arch": "X86"},
{"inst": "[lock] inc x:r8/m8" , "op": "FE /0" , "io": "OF=W SF=W ZF=W AF=W PF=W"},
{"inst": "[lock] inc x:r16/m16" , "op": "66 FF /0" , "io": "OF=W SF=W ZF=W AF=W PF=W"},
{"inst": "[lock] inc X:r32/m32" , "op": "FF /0" , "io": "OF=W SF=W ZF=W AF=W PF=W"},
{"inst": "[lock] inc X:r64/m64" , "op": "REX.W FF /0" , "io": "OF=W SF=W ZF=W AF=W PF=W"},
{"inst": "iret" , "op": "66 CF" , "io": "OF=U SF=U ZF=U AF=U PF=U CF=U"},
{"inst": "iretd" , "op": "CF" , "io": "OF=U SF=U ZF=U AF=U PF=U CF=U"},
{"inst": "iretq" , "op": "REX.W CF" , "io": "OF=U SF=U ZF=U AF=U PF=U CF=U"},
{"inst": "[bnd] jo rel8" , "op": "70 cb" , "io": "OF=R"},
{"inst": "[bnd] jo rel16" , "op": "66 0F 80 cw" , "io": "OF=R"},
{"inst": "[bnd] jo rel32" , "op": "0F 80 cd" , "io": "OF=R"},
{"inst": "[bnd] jno rel8" , "op": "71 cb" , "io": "OF=R"},
{"inst": "[bnd] jno rel16" , "op": "66 0F 81 cw" , "io": "OF=R"},
{"inst": "[bnd] jno rel32" , "op": "0F 81 cd" , "io": "OF=R"},
{"inst": "[bnd] jb|jnae|jc rel8" , "op": "72 cb" , "io": "CF=R"},
{"inst": "[bnd] jb|jnae|jc rel16" , "op": "66 0F 82 cw" , "io": "CF=R"},
{"inst": "[bnd] jb|jnae|jc rel32" , "op": "0F 82 cd" , "io": "CF=R"},
{"inst": "[bnd] jae|jnb|jnc rel8" , "op": "73 cb" , "io": "CF=R"},
{"inst": "[bnd] jae|jnb|jnc rel16" , "op": "66 0F 83 cw" , "io": "CF=R"},
{"inst": "[bnd] jae|jnb|jnc rel32" , "op": "0F 83 cd" , "io": "CF=R"},
{"inst": "[bnd] je|jz rel8" , "op": "74 cb" , "io": "ZF=R"},
{"inst": "[bnd] je|jz rel16" , "op": "66 0F 84 cw" , "io": "ZF=R"},
{"inst": "[bnd] je|jz rel32" , "op": "0F 84 cd" , "io": "ZF=R"},
{"inst": "[bnd] jne|jnz rel8" , "op": "75 cb" , "io": "ZF=R"},
{"inst": "[bnd] jne|jnz rel16" , "op": "66 0F 85 cw" , "io": "ZF=R"},
{"inst": "[bnd] jne|jnz rel32" , "op": "0F 85 cd" , "io": "ZF=R"},
{"inst": "[bnd] jbe|jna rel8" , "op": "76 cb" , "io": "CF=R ZF=R"},
{"inst": "[bnd] jbe|jna rel16" , "op": "66 0F 86 cw" , "io": "CF=R ZF=R"},
{"inst": "[bnd] jbe|jna rel32" , "op": "0F 86 cd" , "io": "CF=R ZF=R"},
{"inst": "[bnd] ja|jnbe rel8" , "op": "77 cb" , "io": "CF=R ZF=R"},
{"inst": "[bnd] ja|jnbe rel16" , "op": "66 0F 87 cw" , "io": "CF=R ZF=R"},
{"inst": "[bnd] ja|jnbe rel32" , "op": "0F 87 cd" , "io": "CF=R ZF=R"},
{"inst": "[bnd] js rel8" , "op": "78 cb" , "io": "SF=R"},
{"inst": "[bnd] js rel16" , "op": "66 0F 88 cw" , "io": "SF=R"},
{"inst": "[bnd] js rel32" , "op": "0F 88 cd" , "io": "SF=R"},
{"inst": "[bnd] jns rel8" , "op": "79 cb" , "io": "SF=R"},
{"inst": "[bnd] jns rel16" , "op": "66 0F 89 cw" , "io": "SF=R"},
{"inst": "[bnd] jns rel32" , "op": "0F 89 cd" , "io": "SF=R"},
{"inst": "[bnd] jp|jpe rel8" , "op": "7A cb" , "io": "PF=R"},
{"inst": "[bnd] jp|jpe rel16" , "op": "66 0F 8A cw" , "io": "PF=R"},
{"inst": "[bnd] jp|jpe rel32" , "op": "0F 8A cd" , "io": "PF=R"},
{"inst": "[bnd] jnp|jpo rel8" , "op": "7B cb" , "io": "PF=R"},
{"inst": "[bnd] jnp|jpo rel16" , "op": "66 0F 8B cw" , "io": "PF=R"},
{"inst": "[bnd] jnp|jpo rel32" , "op": "0F 8B cd" , "io": "PF=R"},
{"inst": "[bnd] jl|jnge rel8" , "op": "7C cb" , "io": "SF=R OF=R"},
{"inst": "[bnd] jl|jnge rel16" , "op": "66 0F 8C cw" , "io": "SF=R OF=R"},
{"inst": "[bnd] jl|jnge rel32" , "op": "0F 8C cd" , "io": "SF=R OF=R"},
{"inst": "[bnd] jge|jnl rel8" , "op": "7D cb" , "io": "SF=R OF=R"},
{"inst": "[bnd] jge|jnl rel16" , "op": "66 0F 8D cw" , "io": "SF=R OF=R"},
{"inst": "[bnd] jge|jnl rel32" , "op": "0F 8D cd" , "io": "SF=R OF=R"},
{"inst": "[bnd] jle|jng rel8" , "op": "7E cb" , "io": "ZF=R SF=R OF=R"},
{"inst": "[bnd] jle|jng rel16" , "op": "66 0F 8E cw" , "io": "ZF=R SF=R OF=R"},
{"inst": "[bnd] jle|jng rel32" , "op": "0F 8E cd" , "io": "ZF=R SF=R OF=R"},
{"inst": "[bnd] jg|jnle rel8" , "op": "7F cb" , "io": "ZF=R SF=R OF=R"},
{"inst": "[bnd] jg|jnle rel16" , "op": "66 0F 8F cw" , "io": "ZF=R SF=R OF=R"},
{"inst": "[bnd] jg|jnle rel32" , "op": "0F 8F cd" , "io": "ZF=R SF=R OF=R"},
{"inst": "[bnd] jecxz R:<cx>, rel8" , "op": "67 E3 cb" , "arch": "X86"},
{"inst": "[bnd] jecxz R:<ecx>, rel8" , "op": "E3 cb" , "arch": "X86"},
{"inst": "[bnd] jecxz R:<ecx>, rel8" , "op": "67 E3 cb" , "arch": "X64"},
{"inst": "[bnd] jecxz R:<rcx>, rel8" , "op": "E3 cb" , "arch": "X64"},
{"inst": "[bnd] jmp rel8" , "op": "EB cb"},
{"inst": "[bnd] jmp rel16" , "op": "66 E9 cw" , "arch": "X86"},
{"inst": "[bnd] jmp rel32" , "op": "E9 cd"},
{"inst": "[bnd] jmp R:r32/m32" , "op": "FF /4" , "arch": "X86"},
{"inst": "[bnd] jmp R:r64/m64" , "op": "FF /4" , "arch": "X64"},
{"inst": "lcall iw, iw" , "op": "66 9A iw iw" , "io": "OF=U SF=U ZF=U AF=U PF=U CF=U", "arch": "X86"},
{"inst": "lcall iw, id" , "op": "9A id iw" , "io": "OF=U SF=U ZF=U AF=U PF=U CF=U", "arch": "X86"},
{"inst": "lcall R:m16_16" , "op": "66 FF /3" , "io": "OF=U SF=U ZF=U AF=U PF=U CF=U"},
{"inst": "lcall R:m16_32" , "op": "FF /3" , "io": "OF=U SF=U ZF=U AF=U PF=U CF=U"},
{"inst": "lcall R:m16_64" , "op": "REX.W FF /3" , "io": "OF=U SF=U ZF=U AF=U PF=U CF=U", "arch": "X64"},
{"inst": "lea w:r16, mem" , "op": "RM: 67 8D /r"},
{"inst": "lea W:r32, mem" , "op": "RM: 8D /r"},
{"inst": "lea W:r64, mem" , "op": "RM: REX.W 8D /r"},
{"inst": "leave" , "op": "C9" , "volatile": true},
{"inst": "ljmp iw, iw" , "op": "66 EA iw iw" , "arch": "X86"},
{"inst": "ljmp iw, id" , "op": "EA id iw" , "arch": "X86"},
{"inst": "ljmp R:m16_16" , "op": "66 FF /5"},
{"inst": "ljmp R:m16_32" , "op": "FF /5"},
{"inst": "ljmp R:m16_64" , "op": "REX.W FF /5"},
{"inst": "[rep] lods w:al, R:m8(ds:zsi)" , "op": "AC" , "io": "DF=R"},
{"inst": "[rep] lods w:ax, R:m16(ds:zsi)" , "op": "66 AD" , "io": "DF=R"},
{"inst": "[rep] lods W:eax, R:m32(ds:zsi)" , "op": "AD" , "io": "DF=R"},
{"inst": "[rep] lods W:rax, R:m64(ds:zsi)" , "op": "REX.W AD" , "io": "DF=R"},
{"inst": "loop x:<cx>, rel8" , "op": "67 E2 cb" , "arch": "X86"},
{"inst": "loop X:<ecx>, rel8" , "op": "E2 cb" , "arch": "X86"},
{"inst": "loop X:<ecx>, rel8" , "op": "67 E2 cb" , "arch": "X64"},
{"inst": "loop X:<rcx>, rel8" , "op": "E2 cb" , "arch": "X64"},
{"inst": "loope x:<cx>, rel8" , "op": "67 E1 cb" , "io": "ZF=R", "arch": "X86"},
{"inst": "loope X:<ecx>, rel8" , "op": "E1 cb" , "io": "ZF=R", "arch": "X86"},
{"inst": "loope X:<ecx>, rel8" , "op": "67 E1 cb" , "io": "ZF=R", "arch": "X64"},
{"inst": "loope X:<rcx>, rel8" , "op": "E1 cb" , "io": "ZF=R", "arch": "X64"},
{"inst": "loopne x:<cx>, rel8" , "op": "67 E0 cb" , "io": "ZF=R", "arch": "X86"},
{"inst": "loopne X:<ecx>, rel8" , "op": "E0 cb" , "io": "ZF=R", "arch": "X86"},
{"inst": "loopne X:<ecx>, rel8" , "op": "67 E0 cb" , "io": "ZF=R", "arch": "X64"},
{"inst": "loopne X:<rcx>, rel8" , "op": "E0 cb" , "io": "ZF=R", "arch": "X64"},
{"inst": "[xrelease] mov w:r8/m8, r8" , "op": "MR: 88 /r"},
{"inst": "[xrelease] mov w:r16/m16, r16" , "op": "MR: 66 89 /r"},
{"inst": "[xrelease] mov W:r32/m32, r32" , "op": "MR: 89 /r"},
{"inst": "[xrelease] mov W:r64/m64, r64" , "op": "MR: REX.W 89 /r"},
{"inst": "[xrelease] mov w:r8/m8, ib/ub" , "op": "M: C6 /0 ib"},
{"inst": "[xrelease] mov w:r16/m16, iw/uw" , "op": "M: 66 C7 /0 iw"},
{"inst": "[xrelease] mov W:r32/m32, id/ud" , "op": "M: C7 /0 id"},
{"inst": "[xrelease] mov W:r64/m64, id" , "op": "M: REX.W C7 /0 id"},
{"inst": "mov w:r8, ib/ub" , "op": "B0+r ib"},
{"inst": "mov w:r16, iw/uw" , "op": "66 B8+r iw"},
{"inst": "mov W:r32, id/ud" , "op": "B8+r id"},
{"inst": "mov W:r64, iq/uq" , "op": "REX.W B8+r iq"},
{"inst": "mov w:r8, r8/m8" , "op": "RM: 8A /r"},
{"inst": "mov w:r16, r16/m16" , "op": "RM: 66 8B /r"},
{"inst": "mov W:r32, r32/m32" , "op": "RM: 8B /r"},
{"inst": "mov W:r64, r64/m64" , "op": "RM: REX.W 8B /r"},
{"inst": "mov w:r16/m16, sreg" , "op": "MR: 66 8C /r"},
{"inst": "mov W:r32/m16, sreg" , "op": "MR: 8C /r"},
{"inst": "mov W:r64/m16, sreg" , "op": "MR: REX.W 8C /r"},
{"inst": "mov W:sreg, r16/m16" , "op": "RM: 66 8E /r"},
{"inst": "mov W:sreg, r32/m16" , "op": "RM: 8E /r"},
{"inst": "mov W:sreg, r64/m16" , "op": "RM: REX.W 8E /r"},
{"inst": "mov w:al, moff8" , "op": "A0 moff"},
{"inst": "mov w:ax, moff16" , "op": "66 A1 moff"},
{"inst": "mov W:eax, moff32" , "op": "A1 moff"},
{"inst": "mov W:rax, moff64" , "op": "REX.W A1 moff"},
{"inst": "mov W:moff8, al" , "op": "A2 moff"},
{"inst": "mov W:moff16, ax" , "op": "66 A3 moff"},
{"inst": "mov W:moff32, eax" , "op": "A3 moff"},
{"inst": "mov W:moff64, rax" , "op": "REX.W A3 moff"},
{"inst": "mov W:r32, creg" , "op": "MR: 0F 20 /r" , "arch": "X86", "io": "OF=U SF=U ZF=U AF=U PF=U CF=U", "privilege": "L0"},
{"inst": "mov W:r64, creg" , "op": "MR: 0F 20 /r" , "arch": "X64", "io": "OF=U SF=U ZF=U AF=U PF=U CF=U", "privilege": "L0"},
{"inst": "mov W:creg, r32" , "op": "RM: 0F 22 /r" , "arch": "X86", "io": "OF=U SF=U ZF=U AF=U PF=U CF=U", "privilege": "L0"},
{"inst": "mov W:creg, r64" , "op": "RM: 0F 22 /r" , "arch": "X64", "io": "OF=U SF=U ZF=U AF=U PF=U CF=U", "privilege": "L0"},
{"inst": "mov W:r32, dreg" , "op": "MR: 0F 21 /r" , "arch": "X86", "io": "OF=U SF=U ZF=U AF=U PF=U CF=U", "privilege": "L0"},
{"inst": "mov W:r64, dreg" , "op": "MR: 0F 21 /r" , "arch": "X64", "io": "OF=U SF=U ZF=U AF=U PF=U CF=U", "privilege": "L0"},
{"inst": "mov W:dreg, r32" , "op": "RM: 0F 23 /r" , "arch": "X86", "io": "OF=U SF=U ZF=U AF=U PF=U CF=U", "privilege": "L0"},
{"inst": "mov W:dreg, r64" , "op": "RM: 0F 23 /r" , "arch": "X64", "io": "OF=U SF=U ZF=U AF=U PF=U CF=U", "privilege": "L0"},
{"inst": "movabs W:r64, iq/uq" , "op": "REX.W B8+r iq"},
{"inst": "movabs w:al, moff8" , "op": "A0 moff"},
{"inst": "movabs w:ax, moff16" , "op": "66 A1 moff"},
{"inst": "movabs W:eax, moff32" , "op": "A1 moff"},
{"inst": "movabs W:rax, moff64" , "op": "REX.W A1 moff"},
{"inst": "movabs W:moff8, al" , "op": "A2 moff"},
{"inst": "movabs W:moff16, ax" , "op": "66 A3 moff"},
{"inst": "movabs W:moff32, eax" , "op": "A3 moff"},
{"inst": "movabs W:moff64, rax" , "op": "REX.W A3 moff"},
{"inst": "[rep] movs W:m8(es:zdi), R:m8(ds:zsi)" , "op": "A4" , "io": "DF=R"},
{"inst": "[rep] movs W:m16(es:zdi), R:m16(ds:zsi)" , "op": "66 A5" , "io": "DF=R"},
{"inst": "[rep] movs W:m32(es:zdi), R:m32(ds:zsi)" , "op": "A5" , "io": "DF=R"},
{"inst": "[rep] movs W:m64(es:zdi), R:m64(ds:zsi)" , "op": "REX.W A5" , "io": "DF=R"},
{"inst": "movsx w:r16, r8/m8" , "op": "RM: 66 0F BE /r"},
{"inst": "movsx W:r32, r8/m8" , "op": "RM: 0F BE /r"},
{"inst": "movsx W:r64, r8/m8" , "op": "RM: REX.W 0F BE /r"},
{"inst": "movsx W:r32, r16/m16" , "op": "RM: 0F BF /r"},
{"inst": "movsx W:r64, r16/m16" , "op": "RM: REX.W 0F BF /r"},
{"inst": "movsxd W:r16, r16/m16" , "op": "RM: 66 63 /r" , "arch": "X64"},
{"inst": "movsxd W:r32, r32/m32" , "op": "RM: 63 /r" , "arch": "X64"},
{"inst": "movsxd W:r64, r32/m32" , "op": "RM: REX.W 63 /r" , "arch": "X64"},
{"inst": "movzx w:r16, r8/m8" , "op": "RM: 66 0F B6 /r"},
{"inst": "movzx W:r32, r8/m8" , "op": "RM: 0F B6 /r"},
{"inst": "movzx W:r64, r8/m8" , "op": "RM: REX.W 0F B6 /r"},
{"inst": "movzx W:r32, r16/m16" , "op": "RM: 0F B7 /r"},
{"inst": "movzx W:r64, r16/m16" , "op": "RM: REX.W 0F B7 /r"},
{"inst": "mul x:<ax>, r8/m8" , "op": "F6 /4" , "io": "OF=W SF=U ZF=U AF=U PF=U CF=W"},
{"inst": "mul w:<dx>, x:<ax>, r16/m16" , "op": "66 F7 /4" , "io": "OF=W SF=U ZF=U AF=U PF=U CF=W"},
{"inst": "mul W:<edx>, X:<eax>, r32/m32" , "op": "F7 /4" , "io": "OF=W SF=U ZF=U AF=U PF=U CF=W"},
{"inst": "mul W:<rdx>, X:<rax>, r64/m64" , "op": "REX.W F7 /4" , "io": "OF=W SF=U ZF=U AF=U PF=U CF=W"},
{"inst": "[lock|xacqrel] neg x:r8/m8" , "op": "F6 /3" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
{"inst": "[lock|xacqrel] neg x:r16/m16" , "op": "66 F7 /3" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
{"inst": "[lock|xacqrel] neg X:r32/m32" , "op": "F7 /3" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
{"inst": "[lock|xacqrel] neg X:r64/m64" , "op": "REX.W F7 /3" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
{"inst": "nop" , "op": "90"},
{"inst": "nop R:r16/m16" , "op": "66 0F 1F /0"},
{"inst": "nop R:r32/m32" , "op": "0F 1F /0"},
{"inst": "nop R:r64/m64" , "op": "REX.W 0F 1F /0"},
{"inst": "nop R:r16/m16, r16" , "op": "MR: 66 0F 1F /r"},
{"inst": "nop R:r32/m32, r32" , "op": "MR: 0F 1F /r"},
{"inst": "nop R:r64/m64, r64" , "op": "MR: REX.W 0F 1F /r"},
{"inst": "[lock|xacqrel] not x:r8/m8" , "op": "F6 /2"},
{"inst": "[lock|xacqrel] not x:r16/m16" , "op": "66 F7 /2"},
{"inst": "[lock|xacqrel] not X:r32/m32" , "op": "F7 /2"},
{"inst": "[lock|xacqrel] not X:r64/m64" , "op": "REX.W F7 /2"},
{"inst": "or x:al, ib/ub" , "op": "0C ib" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0", "altForm": true},
{"inst": "or x:ax, iw/uw" , "op": "66 0D iw" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0", "altForm": true},
{"inst": "or X:eax, id/ud" , "op": "0D id" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0", "altForm": true},
{"inst": "or X:rax, id" , "op": "REX.W 0D id" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0", "altForm": true},
{"inst": "[lock|xacqrel] or x:r8/m8, ib/ub" , "op": "M: 80 /1 ib" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
{"inst": "[lock|xacqrel] or x:r16/m16, iw/uw" , "op": "M: 66 81 /1 iw" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
{"inst": "[lock|xacqrel] or X:r32/m32, id/ud" , "op": "M: 81 /1 id" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
{"inst": "[lock|xacqrel] or X:r64/m64, id" , "op": "M: REX.W 81 /1 id" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
{"inst": "[lock|xacqrel] or x:r16/m16, ib" , "op": "M: 66 83 /1 ib" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
{"inst": "[lock|xacqrel] or X:r32/m32, ib" , "op": "M: 83 /1 ib" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
{"inst": "[lock|xacqrel] or X:r64/m64, ib" , "op": "M: REX.W 83 /1 ib" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
{"inst": "[lock|xacqrel] or x:~r8/m8, ~r8" , "op": "MR: 08 /r" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
{"inst": "[lock|xacqrel] or x:~r16/m16, ~r16" , "op": "MR: 66 09 /r" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
{"inst": "[lock|xacqrel] or X:~r32/m32, ~r32" , "op": "MR: 09 /r" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
{"inst": "[lock|xacqrel] or X:~r64/m64, ~r64" , "op": "MR: REX.W 09 /r" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
{"inst": "or x:~r8, ~r8/m8" , "op": "RM: 0A /r" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
{"inst": "or x:~r16, ~r16/m16" , "op": "RM: 66 0B /r" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
{"inst": "or X:~r32, ~r32/m32" , "op": "RM: 0B /r" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
{"inst": "or X:~r64, ~r64/m64" , "op": "RM: REX.W 0B /r" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
{"inst": "pop w:r16/m16" , "op": "66 8F /0"},
{"inst": "pop W:r32/m32" , "op": "8F /0" , "arch": "X86"},
{"inst": "pop W:r64/m64" , "op": "8F /0" , "arch": "X64"},
{"inst": "pop w:r16" , "op": "66 58+r"},
{"inst": "pop W:r32" , "op": "58+r" , "arch": "X86"},
{"inst": "pop W:r64" , "op": "58+r" , "arch": "X64"},
{"inst": "pop W:ds" , "op": "1F" , "arch": "X86"},
{"inst": "pop W:es" , "op": "07" , "arch": "X86"},
{"inst": "pop W:ss" , "op": "17" , "arch": "X86"},
{"inst": "pop W:fs" , "op": "0F A1"},
{"inst": "pop W:gs" , "op": "0F A9"},
{"inst": "popf" , "op": "66 9D" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W DF=W IF=W TF=W"},
{"inst": "popfd" , "op": "9D" , "arch": "X86", "io": "OF=W SF=W ZF=W AF=W PF=W CF=W DF=W IF=W TF=W"},
{"inst": "popfq" , "op": "9D" , "arch": "X64", "io": "OF=W SF=W ZF=W AF=W PF=W CF=W DF=W IF=W TF=W"},
{"inst": "push R:r16/m16" , "op": "66 FF /6"},
{"inst": "push R:r32/m32" , "op": "FF /6" , "arch": "X86"},
{"inst": "push R:r64/m64" , "op": "FF /6" , "arch": "X64"},
{"inst": "push R:r16" , "op": "66 50+r"},
{"inst": "push R:r32" , "op": "50+r" , "arch": "X86"},
{"inst": "push R:r64" , "op": "50+r" , "arch": "X64"},
{"inst": "push ib" , "op": "6A ib"},
{"inst": "push iw" , "op": "66 68 iw"},
{"inst": "push id/ud" , "op": "68 id" , "arch": "X86"},
{"inst": "push id" , "op": "68 id" , "arch": "X64"},
{"inst": "push R:cs" , "op": "0E" , "arch": "X86"},
{"inst": "push R:ss" , "op": "16" , "arch": "X86"},
{"inst": "push R:ds" , "op": "1E" , "arch": "X86"},
{"inst": "push R:es" , "op": "06" , "arch": "X86"},
{"inst": "push R:fs" , "op": "0F A0"},
{"inst": "push R:gs" , "op": "0F A8"},
{"inst": "pushf" , "op": "66 9C" , "io": "OF=R SF=R ZF=R AF=R PF=R CF=R DF=R IF=R TF=R"},
{"inst": "pushfd" , "op": "9C" , "arch": "X86", "io": "OF=R SF=R ZF=R AF=R PF=R CF=R DF=R IF=R TF=R"},
{"inst": "pushfq" , "op": "9C" , "arch": "X64", "io": "OF=R SF=R ZF=R AF=R PF=R CF=R DF=R IF=R TF=R"},
{"inst": "rcl x:r8/m8, 1" , "op": "D0 /2" , "io": "CF=X OF=X", "altForm": true},
{"inst": "rcl x:r8/m8, cl" , "op": "D2 /2" , "io": "CF=X OF=X"},
{"inst": "rcl x:r8/m8, ib/ub" , "op": "M: C0 /2 ib" , "io": "CF=X OF=X"},
{"inst": "rcl x:r16/m16, 1" , "op": "66 D1 /2" , "io": "CF=X OF=X", "altForm": true},
{"inst": "rcl x:r16/m16, cl" , "op": "66 D3 /2" , "io": "CF=X OF=X"},
{"inst": "rcl x:r16/m16, ib/ub" , "op": "M: 66 C1 /2 ib" , "io": "CF=X OF=X"},
{"inst": "rcl X:r32/m32, 1" , "op": "D1 /2" , "io": "CF=X OF=X", "altForm": true},
{"inst": "rcl X:r32/m32, cl" , "op": "D3 /2" , "io": "CF=X OF=X"},
{"inst": "rcl X:r32/m32, ib/ub" , "op": "M: C1 /2 ib" , "io": "CF=X OF=X"},
{"inst": "rcl X:r64/m64, 1" , "op": "REX.W D1 /2" , "io": "CF=X OF=X", "altForm": true},
{"inst": "rcl X:r64/m64, cl" , "op": "REX.W D3 /2" , "io": "CF=X OF=X"},
{"inst": "rcl X:r64/m64, ib/ub" , "op": "M: REX.W C1 /2 ib" , "io": "CF=X OF=X"},
{"inst": "rcr x:r8/m8, 1" , "op": "D0 /3" , "io": "CF=X OF=X", "altForm": true},
{"inst": "rcr x:r8/m8, cl" , "op": "D2 /3" , "io": "CF=X OF=X"},
{"inst": "rcr x:r8/m8, ib/ub" , "op": "M: C0 /3 ib" , "io": "CF=X OF=X"},
{"inst": "rcr x:r16/m16, 1" , "op": "66 D1 /3" , "io": "CF=X OF=X", "altForm": true},
{"inst": "rcr x:r16/m16, cl" , "op": "66 D3 /3" , "io": "CF=X OF=X"},
{"inst": "rcr x:r16/m16, ib/ub" , "op": "M: 66 C1 /3 ib" , "io": "CF=X OF=X"},
{"inst": "rcr X:r32/m32, 1" , "op": "D1 /3" , "io": "CF=X OF=X", "altForm": true},
{"inst": "rcr X:r32/m32, cl" , "op": "D3 /3" , "io": "CF=X OF=X"},
{"inst": "rcr X:r32/m32, ib/ub" , "op": "M: C1 /3 ib" , "io": "CF=X OF=X"},
{"inst": "rcr X:r64/m64, 1" , "op": "REX.W D1 /3" , "io": "CF=X OF=X", "altForm": true},
{"inst": "rcr X:r64/m64, cl" , "op": "REX.W D3 /3" , "io": "CF=X OF=X"},
{"inst": "rcr X:r64/m64, ib/ub" , "op": "M: REX.W C1 /3 ib" , "io": "CF=X OF=X"},
{"inst": "[bnd|repIgnore] ret" , "op": "C3"},
{"inst": "[bnd|repIgnore] ret uw" , "op": "C2 iw"},
{"inst": "retf" , "op": "CB"},
{"inst": "retf uw" , "op": "CA iw"},
{"inst": "rol x:r8/m8, 1" , "op": "D0 /0" , "io": "CF=W OF=W", "altForm": true},
{"inst": "rol x:r8/m8, cl" , "op": "D2 /0" , "io": "CF=W OF=W"},
{"inst": "rol x:r8/m8, ib/ub" , "op": "M: C0 /0 ib" , "io": "CF=W OF=W"},
{"inst": "rol x:r16/m16, 1" , "op": "66 D1 /0" , "io": "CF=W OF=W", "altForm": true},
{"inst": "rol x:r16/m16, cl" , "op": "66 D3 /0" , "io": "CF=W OF=W"},
{"inst": "rol x:r16/m16, ib/ub" , "op": "M: 66 C1 /0 ib" , "io": "CF=W OF=W"},
{"inst": "rol X:r32/m32, 1" , "op": "D1 /0" , "io": "CF=W OF=W", "altForm": true},
{"inst": "rol X:r32/m32, cl" , "op": "D3 /0" , "io": "CF=W OF=W"},
{"inst": "rol X:r32/m32, ib/ub" , "op": "M: C1 /0 ib" , "io": "CF=W OF=W"},
{"inst": "rol X:r64/m64, 1" , "op": "REX.W D1 /0" , "io": "CF=W OF=W", "altForm": true},
{"inst": "rol X:r64/m64, cl" , "op": "REX.W D3 /0" , "io": "CF=W OF=W"},
{"inst": "rol X:r64/m64, ib/ub" , "op": "M: REX.W C1 /0 ib" , "io": "CF=W OF=W"},
{"inst": "ror x:r8/m8, 1" , "op": "D0 /1" , "io": "CF=W OF=W", "altForm": true},
{"inst": "ror x:r8/m8, cl" , "op": "D2 /1" , "io": "CF=W OF=W"},
{"inst": "ror x:r8/m8, ib/ub" , "op": "M: C0 /1 ib" , "io": "CF=W OF=W"},
{"inst": "ror x:r16/m16, 1" , "op": "66 D1 /1" , "io": "CF=W OF=W", "altForm": true},
{"inst": "ror x:r16/m16, cl" , "op": "66 D3 /1" , "io": "CF=W OF=W"},
{"inst": "ror x:r16/m16, ib/ub" , "op": "M: 66 C1 /1 ib" , "io": "CF=W OF=W"},
{"inst": "ror X:r32/m32, 1" , "op": "D1 /1" , "io": "CF=W OF=W", "altForm": true},
{"inst": "ror X:r32/m32, cl" , "op": "D3 /1" , "io": "CF=W OF=W"},
{"inst": "ror X:r32/m32, ib/ub" , "op": "M: C1 /1 ib" , "io": "CF=W OF=W"},
{"inst": "ror X:r64/m64, 1" , "op": "REX.W D1 /1" , "io": "CF=W OF=W", "altForm": true},
{"inst": "ror X:r64/m64, cl" , "op": "REX.W D3 /1" , "io": "CF=W OF=W"},
{"inst": "ror X:r64/m64, ib/ub" , "op": "M: REX.W C1 /1 ib" , "io": "CF=W OF=W"},
{"inst": "sar x:r8/m8, 1" , "op": "D0 /7" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W", "altForm": true},
{"inst": "sar x:r8/m8, cl" , "op": "D2 /7" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
{"inst": "sar x:r8/m8, ib/ub" , "op": "M: C0 /7 ib" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
{"inst": "sar x:r16/m16, 1" , "op": "66 D1 /7" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W", "altForm": true},
{"inst": "sar x:r16/m16, cl" , "op": "66 D3 /7" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
{"inst": "sar x:r16/m16, ib/ub" , "op": "M: 66 C1 /7 ib" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
{"inst": "sar X:r32/m32, 1" , "op": "D1 /7" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W", "altForm": true},
{"inst": "sar X:r32/m32, cl" , "op": "D3 /7" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
{"inst": "sar X:r32/m32, ib/ub" , "op": "M: C1 /7 ib" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
{"inst": "sar X:r64/m64, 1" , "op": "REX.W D1 /7" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W", "altForm": true},
{"inst": "sar X:r64/m64, cl" , "op": "REX.W D3 /7" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
{"inst": "sar X:r64/m64, ib/ub" , "op": "M: REX.W C1 /7 ib" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
{"inst": "sbb x:al, ib/ub" , "op": "1C ib" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=X", "altForm": true},
{"inst": "sbb x:ax, iw/uw" , "op": "66 1D iw" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=X", "altForm": true},
{"inst": "sbb X:eax, id/ud" , "op": "1D id" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=X", "altForm": true},
{"inst": "sbb X:rax, id" , "op": "REX.W 1D id" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=X", "altForm": true},
{"inst": "[lock|xacqrel] sbb x:r8/m8, ib/ub" , "op": "M: 80 /3 ib" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=X"},
{"inst": "[lock|xacqrel] sbb x:r16/m16, iw/uw" , "op": "M: 66 81 /3 iw" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=X"},
{"inst": "[lock|xacqrel] sbb X:r32/m32, id/ud" , "op": "M: 81 /3 id" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=X"},
{"inst": "[lock|xacqrel] sbb X:r64/m64, id" , "op": "M: REX.W 81 /3 id" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=X"},
{"inst": "[lock|xacqrel] sbb x:r16/m16, ib" , "op": "M: 66 83 /3 ib" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=X"},
{"inst": "[lock|xacqrel] sbb X:r32/m32, ib" , "op": "M: 83 /3 ib" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=X"},
{"inst": "[lock|xacqrel] sbb X:r64/m64, ib" , "op": "M: REX.W 83 /3 ib" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=X"},
{"inst": "[lock|xacqrel] sbb x:r8/m8, r8" , "op": "MR: 18 /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=X"},
{"inst": "[lock|xacqrel] sbb x:r16/m16, r16" , "op": "MR: 66 19 /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=X"},
{"inst": "[lock|xacqrel] sbb X:r32/m32, r32" , "op": "MR: 19 /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=X"},
{"inst": "[lock|xacqrel] sbb X:r64/m64, r64" , "op": "MR: REX.W 19 /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=X"},
{"inst": "sbb x:r8, r8/m8" , "op": "RM: 1A /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=X"},
{"inst": "sbb x:r16, r16/m16" , "op": "RM: 66 1B /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=X"},
{"inst": "sbb X:r32, r32/m32" , "op": "RM: 1B /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=X"},
{"inst": "sbb X:r64, r64/m64" , "op": "RM: REX.W 1B /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=X"},
{"inst": "[rep|repne] scas R:al, R:m8(es:zdi)" , "op": "AE" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W DF=R"},
{"inst": "[rep|repne] scas R:ax, R:m16(es:zdi)" , "op": "66 AF" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W DF=R"},
{"inst": "[rep|repne] scas R:eax, R:m32(es:zdi)" , "op": "AF" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W DF=R"},
{"inst": "[rep|repne] scas R:rax, R:m64(es:zdi)" , "op": "REX.W AF" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W DF=R"},
{"inst": "seto w:r8/m8" , "op": "0F 90 /r" , "io": "OF=R"},
{"inst": "setno w:r8/m8" , "op": "0F 91 /r" , "io": "OF=R"},
{"inst": "setb|setnae|setc w:r8/m8" , "op": "0F 92 /r" , "io": "CF=R"},
{"inst": "setae|setnb|setnc w:r8/m8" , "op": "0F 93 /r" , "io": "CF=R"},
{"inst": "sete|setz w:r8/m8" , "op": "0F 94 /r" , "io": "ZF=R"},
{"inst": "setne|setnz w:r8/m8" , "op": "0F 95 /r" , "io": "ZF=R"},
{"inst": "setbe|setna w:r8/m8" , "op": "0F 96 /r" , "io": "CF=R ZF=R"},
{"inst": "seta|setnbe w:r8/m8" , "op": "0F 97 /r" , "io": "CF=R ZF=R"},
{"inst": "sets w:r8/m8" , "op": "0F 98 /r" , "io": "SF=R"},
{"inst": "setns w:r8/m8" , "op": "0F 99 /r" , "io": "SF=R"},
{"inst": "setp|setpe w:r8/m8" , "op": "0F 9A /r" , "io": "PF=R"},
{"inst": "setnp|setpo w:r8/m8" , "op": "0F 9B /r" , "io": "PF=R"},
{"inst": "setl|setnge w:r8/m8" , "op": "0F 9C /r" , "io": "SF=R OF=R"},
{"inst": "setge|setnl w:r8/m8" , "op": "0F 9D /r" , "io": "SF=R OF=R"},
{"inst": "setle|setng w:r8/m8" , "op": "0F 9E /r" , "io": "ZF=R SF=R OF=R"},
{"inst": "setg|setnle w:r8/m8" , "op": "0F 9F /r" , "io": "ZF=R SF=R OF=R"},
{"inst": "shl|sal x:r8/m8, 1" , "op": "D0 /4" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W", "altForm": true},
{"inst": "shl|sal x:r8/m8, cl" , "op": "D2 /4" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
{"inst": "shl|sal x:r8/m8, ib/ub" , "op": "M: C0 /4 ib" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
{"inst": "shl|sal x:r16/m16, 1" , "op": "66 D1 /4" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W", "altForm": true},
{"inst": "shl|sal x:r16/m16, cl" , "op": "66 D3 /4" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
{"inst": "shl|sal x:r16/m16, ib/ub" , "op": "M: 66 C1 /4 ib" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
{"inst": "shl|sal X:r32/m32, 1" , "op": "D1 /4" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W", "altForm": true},
{"inst": "shl|sal X:r32/m32, cl" , "op": "D3 /4" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
{"inst": "shl|sal X:r32/m32, ib/ub" , "op": "M: C1 /4 ib" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
{"inst": "shl|sal X:r64/m64, 1" , "op": "REX.W D1 /4" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W", "altForm": true},
{"inst": "shl|sal X:r64/m64, cl" , "op": "REX.W D3 /4" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
{"inst": "shl|sal X:r64/m64, ib/ub" , "op": "M: REX.W C1 /4 ib" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
{"inst": "shr x:r8/m8, 1" , "op": "D0 /5" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W", "altForm": true},
{"inst": "shr x:r8/m8, cl" , "op": "D2 /5" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
{"inst": "shr x:r8/m8, ib/ub" , "op": "M: C0 /5 ib" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
{"inst": "shr x:r16/m16, 1" , "op": "66 D1 /5" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W", "altForm": true},
{"inst": "shr x:r16/m16, cl" , "op": "66 D3 /5" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
{"inst": "shr x:r16/m16, ib/ub" , "op": "M: 66 C1 /5 ib" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
{"inst": "shr X:r32/m32, 1" , "op": "D1 /5" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W", "altForm": true},
{"inst": "shr X:r32/m32, cl" , "op": "D3 /5" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
{"inst": "shr X:r32/m32, ib/ub" , "op": "M: C1 /5 ib" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
{"inst": "shr X:r64/m64, 1" , "op": "REX.W D1 /5" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W", "altForm": true},
{"inst": "shr X:r64/m64, cl" , "op": "REX.W D3 /5" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
{"inst": "shr X:r64/m64, ib/ub" , "op": "M: REX.W C1 /5 ib" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
{"inst": "shld x:r16/m16, r16, cl" , "op": "MR: 66 0F A5 /r" , "io": "OF=W SF=W ZF=W AF=U PF=W CF=W"},
{"inst": "shld x:r16/m16, r16, ib/ub" , "op": "MR: 66 0F A4 /r ib" , "io": "OF=W SF=W ZF=W AF=U PF=W CF=W"},
{"inst": "shld X:r32/m32, r32, cl" , "op": "MR: 0F A5 /r" , "io": "OF=W SF=W ZF=W AF=U PF=W CF=W"},
{"inst": "shld X:r32/m32, r32, ib/ub" , "op": "MR: 0F A4 /r ib" , "io": "OF=W SF=W ZF=W AF=U PF=W CF=W"},
{"inst": "shld X:r64/m64, r64, cl" , "op": "MR: REX.W 0F A5 /r" , "io": "OF=W SF=W ZF=W AF=U PF=W CF=W"},
{"inst": "shld X:r64/m64, r64, ib/ub" , "op": "MR: REX.W 0F A4 /r ib" , "io": "OF=W SF=W ZF=W AF=U PF=W CF=W"},
{"inst": "shrd x:r16/m16, r16, cl" , "op": "MR: 66 0F AD /r" , "io": "OF=W SF=W ZF=W AF=U PF=W CF=W"},
{"inst": "shrd x:r16/m16, r16, ib/ub" , "op": "MR: 66 0F AC /r ib" , "io": "OF=W SF=W ZF=W AF=U PF=W CF=W"},
{"inst": "shrd X:r32/m32, r32, cl" , "op": "MR: 0F AD /r" , "io": "OF=W SF=W ZF=W AF=U PF=W CF=W"},
{"inst": "shrd X:r32/m32, r32, ib/ub" , "op": "MR: 0F AC /r ib" , "io": "OF=W SF=W ZF=W AF=U PF=W CF=W"},
{"inst": "shrd X:r64/m64, r64, cl" , "op": "MR: REX.W 0F AD /r" , "io": "OF=W SF=W ZF=W AF=U PF=W CF=W"},
{"inst": "shrd X:r64/m64, r64, ib/ub" , "op": "MR: REX.W 0F AC /r ib" , "io": "OF=W SF=W ZF=W AF=U PF=W CF=W"},
{"inst": "stc" , "op": "F9" , "io": "CF=1"},
{"inst": "std" , "op": "FD" , "io": "DF=1"},
{"inst": "[rep] stos W:m8(es:zdi), R:al" , "op": "AA" , "io": "DF=R"},
{"inst": "[rep] stos W:m16(es:zdi), R:ax" , "op": "66 AB" , "io": "DF=R"},
{"inst": "[rep] stos W:m32(es:zdi), R:eax" , "op": "AB" , "io": "DF=R"},
{"inst": "[rep] stos W:m64(es:zdi), R:rax" , "op": "REX.W AB" , "io": "DF=R"},
{"inst": "sub x:al, ib/ub" , "op": "2C ib" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W", "altForm": true},
{"inst": "sub x:ax, iw/uw" , "op": "66 2D iw" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W", "altForm": true},
{"inst": "sub X:eax, id/ud" , "op": "2D id" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W", "altForm": true},
{"inst": "sub X:rax, id" , "op": "REX.W 2D id" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W", "altForm": true},
{"inst": "[lock|xacqrel] sub x:r8/m8, ib/ub" , "op": "M: 80 /5 ib" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
{"inst": "[lock|xacqrel] sub x:r16/m16, iw/uw" , "op": "M: 66 81 /5 iw" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
{"inst": "[lock|xacqrel] sub X:r32/m32, id/ud" , "op": "M: 81 /5 id" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
{"inst": "[lock|xacqrel] sub X:r64/m64, id" , "op": "M: REX.W 81 /5 id" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
{"inst": "[lock|xacqrel] sub x:r16/m16, ib" , "op": "M: 66 83 /5 ib" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
{"inst": "[lock|xacqrel] sub X:r32/m32, ib" , "op": "M: 83 /5 ib" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
{"inst": "[lock|xacqrel] sub X:r64/m64, ib" , "op": "M: REX.W 83 /5 ib" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
{"inst": "[lock|xacqrel] sub x:r8/m8, r8" , "op": "MR: 28 /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
{"inst": "[lock|xacqrel] sub x:r16/m16, r16" , "op": "MR: 66 29 /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
{"inst": "[lock|xacqrel] sub X:r32/m32, r32" , "op": "MR: 29 /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
{"inst": "[lock|xacqrel] sub X:r64/m64, r64" , "op": "MR: REX.W 29 /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
{"inst": "sub x:r8, r8/m8" , "op": "RM: 2A /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
{"inst": "sub x:r16, r16/m16" , "op": "RM: 66 2B /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
{"inst": "sub X:r32, r32/m32" , "op": "RM: 2B /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
{"inst": "sub X:r64, r64/m64" , "op": "RM: REX.W 2B /r" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
{"inst": "test R:al, ib/ub" , "op": "A8 ib" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0", "altForm": true},
{"inst": "test R:ax, iw/uw" , "op": "66 A9 iw" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0", "altForm": true},
{"inst": "test R:eax, id/ud" , "op": "A9 id" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0", "altForm": true},
{"inst": "test R:rax, id" , "op": "REX.W A9 id" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0", "altForm": true},
{"inst": "test R:r8/m8, ib/ub" , "op": "M: F6 /0 ib" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
{"inst": "test R:r16/m16, iw/uw" , "op": "M: 66 F7 /0 iw" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
{"inst": "test R:r32/m32, id/ud" , "op": "M: F7 /0 id" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
{"inst": "test R:r64/m64, id" , "op": "M: REX.W F7 /0 id" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
{"inst": "test R:~r8/m8, ~r8" , "op": "MR: 84 /r" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
{"inst": "test R:~r16/m16, ~r16" , "op": "MR: 66 85 /r" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
{"inst": "test R:~r32/m32, ~r32" , "op": "MR: 85 /r" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
{"inst": "test R:~r64/m64, ~r64" , "op": "MR: REX.W 85 /r" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
{"inst": "ud0 r32, r32/m32" , "op": "RM: 0F FF /r"},
{"inst": "ud1 r32, r32/m32" , "op": "RM: 0F B9 /r"},
{"inst": "ud2" , "op": "0F 0B"},
{"inst": "xchg x:~ax, x:~r16" , "op": "66 90+r" , "altForm": true},
{"inst": "xchg X:~eax, X:~r32" , "op": "90+r" , "altForm": true},
{"inst": "xchg X:~rax, X:~r64" , "op": "REX.W 90+r" , "altForm": true},
{"inst": "xchg x:~r16, x:~ax" , "op": "66 90+r" , "altForm": true},
{"inst": "xchg X:~r32, X:~eax" , "op": "90+r" , "altForm": true},
{"inst": "xchg X:~r64, X:~rax" , "op": "REX.W 90+r" , "altForm": true},
{"inst": "[ilock|xacquire] xchg x:~r8/m8, x:~r8" , "op": "MR: 86 /r"},
{"inst": "[ilock|xacquire] xchg x:~r16/m16, x:~r16" , "op": "MR: 66 87 /r"},
{"inst": "[ilock|xacquire] xchg X:~r32/m32, X:~r32" , "op": "MR: 87 /r"},
{"inst": "[ilock|xacquire] xchg X:~r64/m64, X:~r64" , "op": "MR: REX.W 87 /r"},
{"inst": "[ilock|xacquire] xchg x:~r8, x:~r8/m8" , "op": "RM: 86 /r"},
{"inst": "[ilock|xacquire] xchg x:~r16, x:~r16/m16" , "op": "RM: 66 87 /r"},
{"inst": "[ilock|xacquire] xchg X:~r32, X:~r32/m32" , "op": "RM: 87 /r"},
{"inst": "[ilock|xacquire] xchg X:~r64, X:~r64/m64" , "op": "RM: REX.W 87 /r"},
{"inst": "xor x:al, ib/ub" , "op": "34 ib" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0", "altForm": true},
{"inst": "xor x:ax, iw/uw" , "op": "66 35 iw" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0", "altForm": true},
{"inst": "xor X:eax, id/ud" , "op": "35 id" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0", "altForm": true},
{"inst": "xor X:rax, id" , "op": "REX.W 35 id" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0", "altForm": true},
{"inst": "[lock|xacqrel] xor x:r8/m8, ib/ub" , "op": "M: 80 /6 ib" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
{"inst": "[lock|xacqrel] xor x:r16/m16, iw/uw" , "op": "M: 66 81 /6 iw" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
{"inst": "[lock|xacqrel] xor X:r32/m32, id/ud" , "op": "M: 81 /6 id" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
{"inst": "[lock|xacqrel] xor X:r64/m64, id" , "op": "M: REX.W 81 /6 id" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
{"inst": "[lock|xacqrel] xor x:r16/m16, ib" , "op": "M: 66 83 /6 ib" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
{"inst": "[lock|xacqrel] xor X:r32/m32, ib" , "op": "M: 83 /6 ib" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
{"inst": "[lock|xacqrel] xor X:r64/m64, ib" , "op": "M: REX.W 83 /6 ib" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
{"inst": "[lock|xacqrel] xor x:~r8/m8, ~r8" , "op": "MR: 30 /r" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
{"inst": "[lock|xacqrel] xor x:~r16/m16, ~r16" , "op": "MR: 66 31 /r" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
{"inst": "[lock|xacqrel] xor X:~r32/m32, ~r32" , "op": "MR: 31 /r" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
{"inst": "[lock|xacqrel] xor X:~r64/m64, ~r64" , "op": "MR: REX.W 31 /r" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
{"inst": "xor x:~r8, ~r8/m8" , "op": "RM: 32 /r" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
{"inst": "xor x:~r16, ~r16/m16" , "op": "RM: 66 33 /r" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
{"inst": "xor X:~r32, ~r32/m32" , "op": "RM: 33 /r" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"},
{"inst": "xor X:~r64, ~r64/m64" , "op": "RM: REX.W 33 /r" , "io": "OF=0 SF=W ZF=W AF=U PF=W CF=0"}
]},
{"category": "GP GP_IN_OUT", "volatile": true, "data": [
{"inst": "in w:al, ib/ub" , "op": "E4 ib"},
{"inst": "in w:ax, ib/ub" , "op": "66 E5 ib"},
{"inst": "in W:eax, ib/ub" , "op": "E5 ib"},
{"inst": "in w:al, dx" , "op": "EC"},
{"inst": "in w:ax, dx" , "op": "66 ED"},
{"inst": "in W:eax, dx" , "op": "ED"},
{"inst": "[rep] ins W:m8(es:zdi), dx" , "op": "6C"},
{"inst": "[rep] ins W:m16(es:zdi), dx" , "op": "66 6D"},
{"inst": "[rep] ins W:m32(es:zdi), dx" , "op": "6D"},
{"inst": "out ub, al" , "op": "E6 ib"},
{"inst": "out ub, ax" , "op": "66 E7 ib"},
{"inst": "out ub, eax" , "op": "E7 ib"},
{"inst": "out R:dx, R:al" , "op": "EE"},
{"inst": "out R:dx, R:ax" , "op": "66 EF"},
{"inst": "out R:dx, R:eax" , "op": "EF"},
{"inst": "[rep] outs R:dx, R:m8(ds:zsi)" , "op": "6E"},
{"inst": "[rep] outs R:dx, R:m16(ds:zsi)" , "op": "66 6F"},
{"inst": "[rep] outs R:dx, R:m32(ds:zsi)" , "op": "6F"}
]},
{"category": "GP GP_EXT", "data": [
{"inst": "aadd X:m32, r32" , "op": "MR: 0F 38 FC /r" , "ext": "RAO_INT"},
{"inst": "aadd X:m64, r64" , "op": "MR: REX.W 0F 38 FC /r" , "ext": "RAO_INT"},
{"inst": "aand X:m32, r32" , "op": "MR: 66 0F 38 FC /r" , "ext": "RAO_INT"},
{"inst": "aand X:m64, r64" , "op": "MR: REX.W 66 0F 38 FC /r" , "ext": "RAO_INT"},
{"inst": "adcx X:~r32, ~r32/m32" , "op": "RM: 66 0F 38 F6 /r" , "ext": "ADX" , "io": "CF=X"},
{"inst": "adcx X:~r64, ~r64/m64" , "op": "RM: REX.W 66 0F 38 F6 /r" , "ext": "ADX" , "io": "CF=X"},
{"inst": "adox X:~r32, ~r32/m32" , "op": "RM: F3 0F 38 F6 /r" , "ext": "ADX" , "io": "OF=X"},
{"inst": "adox X:~r64, ~r64/m64" , "op": "RM: REX.W F3 0F 38 F6 /r" , "ext": "ADX" , "io": "OF=X"},
{"inst": "andn W:r32, r32, r32/m32" , "op": "RVM: VEX.LZ.0F38.W0 F2 /r" , "ext": "BMI" , "io": "OF=0 SF=W ZF=W AF=U PF=U CF=0"},
{"inst": "andn W:r64, r64, r64/m64" , "op": "RVM: VEX.LZ.0F38.W1 F2 /r" , "ext": "BMI" , "io": "OF=0 SF=W ZF=W AF=U PF=U CF=0"},
{"inst": "aor X:m32, r32" , "op": "MR: F2 0F 38 FC /r" , "ext": "RAO_INT"},
{"inst": "aor X:m64, r64" , "op": "MR: REX.W F2 0F 38 FC /r" , "ext": "RAO_INT"},
{"inst": "axor X:m32, r32" , "op": "MR: F3 0F 38 FC /r" , "ext": "RAO_INT"},
{"inst": "axor X:m64, r64" , "op": "MR: REX.W F3 0F 38 FC /r" , "ext": "RAO_INT"},
{"inst": "bextr W:r32, r32/m32, r32" , "op": "RMV: VEX.LZ.0F38.W0 F7 /r" , "ext": "BMI" , "io": "OF=0 SF=U ZF=W AF=U PF=U CF=0"},
{"inst": "bextr W:r64, r64/m64, r64" , "op": "RMV: VEX.LZ.0F38.W1 F7 /r" , "ext": "BMI" , "io": "OF=0 SF=U ZF=W AF=U PF=U CF=0"},
{"inst": "blsi W:r32, r32/m32" , "op": "VM: VEX.LZ.0F38.W0 F3 /3" , "ext": "BMI" , "io": "OF=0 SF=W ZF=W AF=U PF=U CF=W"},
{"inst": "blsi W:r64, r64/m64" , "op": "VM: VEX.LZ.0F38.W1 F3 /3" , "ext": "BMI" , "io": "OF=0 SF=W ZF=W AF=U PF=U CF=W"},
{"inst": "blsmsk W:r32, r32/m32" , "op": "VM: VEX.LZ.0F38.W0 F3 /2" , "ext": "BMI" , "io": "OF=0 SF=W ZF=0 AF=U PF=U CF=W"},
{"inst": "blsmsk W:r64, r64/m64" , "op": "VM: VEX.LZ.0F38.W1 F3 /2" , "ext": "BMI" , "io": "OF=0 SF=W ZF=0 AF=U PF=U CF=W"},
{"inst": "blsr W:r32, r32/m32" , "op": "VM: VEX.LZ.0F38.W0 F3 /1" , "ext": "BMI" , "io": "OF=0 SF=W ZF=W AF=U PF=U CF=W"},
{"inst": "blsr W:r64, r64/m64" , "op": "VM: VEX.LZ.0F38.W1 F3 /1" , "ext": "BMI" , "io": "OF=0 SF=W ZF=W AF=U PF=U CF=W"},
{"inst": "bzhi W:r32, r32/m32, r32" , "op": "RMV: VEX.LZ.0F38.W0 F5 /r" , "ext": "BMI2" , "io": "OF=0 SF=W ZF=W AF=U PF=U CF=W"},
{"inst": "bzhi W:r64, r64/m64, r64" , "op": "RMV: VEX.LZ.0F38.W1 F5 /r" , "ext": "BMI2" , "io": "OF=0 SF=W ZF=W AF=U PF=U CF=W"},
{"inst": "cldemote R:mem" , "op": "0F 1C /0" , "ext": "CLDEMOTE"},
{"inst": "clflush R:mem" , "op": "0F AE /7" , "ext": "CLFLUSH"},
{"inst": "clflushopt R:mem" , "op": "66 0F AE /7" , "ext": "CLFLUSHOPT"},
{"inst": "clwb R:mem" , "op": "66 0F AE /6" , "ext": "CLWB"},
{"inst": "clzero R:<m512(ds:zax)>" , "op": "0F 01 FC" , "ext": "CLZERO"},
{"inst": "cmovo x:r16, r16/m16" , "op": "RM: 66 0F 40 /r" , "ext": "CMOV" , "io": "OF=R"},
{"inst": "cmovo X:r32, r32/m32" , "op": "RM: 0F 40 /r" , "ext": "CMOV" , "io": "OF=R"},
{"inst": "cmovo X:r64, r64/m64" , "op": "RM: REX.W 0F 40 /r" , "ext": "CMOV" , "io": "OF=R"},
{"inst": "cmovno x:r16, r16/m16" , "op": "RM: 66 0F 41 /r" , "ext": "CMOV" , "io": "OF=R"},
{"inst": "cmovno X:r32, r32/m32" , "op": "RM: 0F 41 /r" , "ext": "CMOV" , "io": "OF=R"},
{"inst": "cmovno X:r64, r64/m64" , "op": "RM: REX.W 0F 41 /r" , "ext": "CMOV" , "io": "OF=R"},
{"inst": "cmovb|cmovnae|cmovc x:r16, r16/m16" , "op": "RM: 66 0F 42 /r" , "ext": "CMOV" , "io": "CF=R"},
{"inst": "cmovb|cmovnae|cmovc X:r32, r32/m32" , "op": "RM: 0F 42 /r" , "ext": "CMOV" , "io": "CF=R"},
{"inst": "cmovb|cmovnae|cmovc X:r64, r64/m64" , "op": "RM: REX.W 0F 42 /r" , "ext": "CMOV" , "io": "CF=R"},
{"inst": "cmovae|cmovnb|cmovnc x:r16, r16/m16" , "op": "RM: 66 0F 43 /r" , "ext": "CMOV" , "io": "CF=R"},
{"inst": "cmovae|cmovnb|cmovnc X:r32, r32/m32" , "op": "RM: 0F 43 /r" , "ext": "CMOV" , "io": "CF=R"},
{"inst": "cmovae|cmovnb|cmovnc X:r64, r64/m64" , "op": "RM: REX.W 0F 43 /r" , "ext": "CMOV" , "io": "CF=R"},
{"inst": "cmove|cmovz x:r16, r16/m16" , "op": "RM: 66 0F 44 /r" , "ext": "CMOV" , "io": "ZF=R"},
{"inst": "cmove|cmovz X:r32, r32/m32" , "op": "RM: 0F 44 /r" , "ext": "CMOV" , "io": "ZF=R"},
{"inst": "cmove|cmovz X:r64, r64/m64" , "op": "RM: REX.W 0F 44 /r" , "ext": "CMOV" , "io": "ZF=R"},
{"inst": "cmovne|cmovnz x:r16, r16/m16" , "op": "RM: 66 0F 45 /r" , "ext": "CMOV" , "io": "ZF=R"},
{"inst": "cmovne|cmovnz X:r32, r32/m32" , "op": "RM: 0F 45 /r" , "ext": "CMOV" , "io": "ZF=R"},
{"inst": "cmovne|cmovnz X:r64, r64/m64" , "op": "RM: REX.W 0F 45 /r" , "ext": "CMOV" , "io": "ZF=R"},
{"inst": "cmovbe|cmovna x:r16, r16/m16" , "op": "RM: 66 0F 46 /r" , "ext": "CMOV" , "io": "CF=R ZF=R"},
{"inst": "cmovbe|cmovna X:r32, r32/m32" , "op": "RM: 0F 46 /r" , "ext": "CMOV" , "io": "CF=R ZF=R"},
{"inst": "cmovbe|cmovna X:r64, r64/m64" , "op": "RM: REX.W 0F 46 /r" , "ext": "CMOV" , "io": "CF=R ZF=R"},
{"inst": "cmova|cmovnbe x:r16, r16/m16" , "op": "RM: 66 0F 47 /r" , "ext": "CMOV" , "io": "CF=R ZF=R"},
{"inst": "cmova|cmovnbe X:r32, r32/m32" , "op": "RM: 0F 47 /r" , "ext": "CMOV" , "io": "CF=R ZF=R"},
{"inst": "cmova|cmovnbe X:r64, r64/m64" , "op": "RM: REX.W 0F 47 /r" , "ext": "CMOV" , "io": "CF=R ZF=R"},
{"inst": "cmovs x:r16, r16/m16" , "op": "RM: 66 0F 48 /r" , "ext": "CMOV" , "io": "SF=R"},
{"inst": "cmovs X:r32, r32/m32" , "op": "RM: 0F 48 /r" , "ext": "CMOV" , "io": "SF=R"},
{"inst": "cmovs X:r64, r64/m64" , "op": "RM: REX.W 0F 48 /r" , "ext": "CMOV" , "io": "SF=R"},
{"inst": "cmovns x:r16, r16/m16" , "op": "RM: 66 0F 49 /r" , "ext": "CMOV" , "io": "SF=R"},
{"inst": "cmovns X:r32, r32/m32" , "op": "RM: 0F 49 /r" , "ext": "CMOV" , "io": "SF=R"},
{"inst": "cmovns X:r64, r64/m64" , "op": "RM: REX.W 0F 49 /r" , "ext": "CMOV" , "io": "SF=R"},
{"inst": "cmovp|cmovpe x:r16, r16/m16" , "op": "RM: 66 0F 4A /r" , "ext": "CMOV" , "io": "PF=R"},
{"inst": "cmovp|cmovpe X:r32, r32/m32" , "op": "RM: 0F 4A /r" , "ext": "CMOV" , "io": "PF=R"},
{"inst": "cmovp|cmovpe X:r64, r64/m64" , "op": "RM: REX.W 0F 4A /r" , "ext": "CMOV" , "io": "PF=R"},
{"inst": "cmovnp|cmovpo x:r16, r16/m16" , "op": "RM: 66 0F 4B /r" , "ext": "CMOV" , "io": "PF=R"},
{"inst": "cmovnp|cmovpo X:r32, r32/m32" , "op": "RM: 0F 4B /r" , "ext": "CMOV" , "io": "PF=R"},
{"inst": "cmovnp|cmovpo X:r64, r64/m64" , "op": "RM: REX.W 0F 4B /r" , "ext": "CMOV" , "io": "PF=R"},
{"inst": "cmovl|cmovnge x:r16, r16/m16" , "op": "RM: 66 0F 4C /r" , "ext": "CMOV" , "io": "SF=R OF=R"},
{"inst": "cmovl|cmovnge X:r32, r32/m32" , "op": "RM: 0F 4C /r" , "ext": "CMOV" , "io": "SF=R OF=R"},
{"inst": "cmovl|cmovnge X:r64, r64/m64" , "op": "RM: REX.W 0F 4C /r" , "ext": "CMOV" , "io": "SF=R OF=R"},
{"inst": "cmovge|cmovnl x:r16, r16/m16" , "op": "RM: 66 0F 4D /r" , "ext": "CMOV" , "io": "SF=R OF=R"},
{"inst": "cmovge|cmovnl X:r32, r32/m32" , "op": "RM: 0F 4D /r" , "ext": "CMOV" , "io": "SF=R OF=R"},
{"inst": "cmovge|cmovnl X:r64, r64/m64" , "op": "RM: REX.W 0F 4D /r" , "ext": "CMOV" , "io": "SF=R OF=R"},
{"inst": "cmovle|cmovng x:r16, r16/m16" , "op": "RM: 66 0F 4E /r" , "ext": "CMOV" , "io": "ZF=R SF=R OF=R"},
{"inst": "cmovle|cmovng X:r32, r32/m32" , "op": "RM: 0F 4E /r" , "ext": "CMOV" , "io": "ZF=R SF=R OF=R"},
{"inst": "cmovle|cmovng X:r64, r64/m64" , "op": "RM: REX.W 0F 4E /r" , "ext": "CMOV" , "io": "ZF=R SF=R OF=R"},
{"inst": "cmovg|cmovnle x:r16, r16/m16" , "op": "RM: 66 0F 4F /r" , "ext": "CMOV" , "io": "ZF=R SF=R OF=R"},
{"inst": "cmovg|cmovnle X:r32, r32/m32" , "op": "RM: 0F 4F /r" , "ext": "CMOV" , "io": "ZF=R SF=R OF=R"},
{"inst": "cmovg|cmovnle X:r64, r64/m64" , "op": "RM: REX.W 0F 4F /r" , "ext": "CMOV" , "io": "ZF=R SF=R OF=R"},
{"inst": "cmpbexadd X:m32, X:r32, R:r32" , "op": "MVR: VEX.128.66.0F38.W0 E6 /r" , "ext": "CMPCCXADD" , "io": "CF=W OF=W SF=W ZF=W AF=W PF=W"},
{"inst": "cmpbexadd X:m64, X:r64, R:r64" , "op": "MVR: VEX.128.66.0F38.W1 E6 /r" , "ext": "CMPCCXADD" , "io": "CF=W OF=W SF=W ZF=W AF=W PF=W"},
{"inst": "cmpbxadd X:m32, X:r32, R:r32" , "op": "MVR: VEX.128.66.0F38.W0 E2 /r" , "ext": "CMPCCXADD" , "io": "CF=W OF=W SF=W ZF=W AF=W PF=W"},
{"inst": "cmpbxadd X:m64, X:r64, R:r64" , "op": "MVR: VEX.128.66.0F38.W1 E2 /r" , "ext": "CMPCCXADD" , "io": "CF=W OF=W SF=W ZF=W AF=W PF=W"},
{"inst": "cmplexadd X:m32, X:r32, R:r32" , "op": "MVR: VEX.128.66.0F38.W0 EE /r" , "ext": "CMPCCXADD" , "io": "CF=W OF=W SF=W ZF=W AF=W PF=W"},
{"inst": "cmplexadd X:m64, X:r64, R:r64" , "op": "MVR: VEX.128.66.0F38.W1 EE /r" , "ext": "CMPCCXADD" , "io": "CF=W OF=W SF=W ZF=W AF=W PF=W"},
{"inst": "cmplxadd X:m32, X:r32, R:r32" , "op": "MVR: VEX.128.66.0F38.W0 EC /r" , "ext": "CMPCCXADD" , "io": "CF=W OF=W SF=W ZF=W AF=W PF=W"},
{"inst": "cmplxadd X:m64, X:r64, R:r64" , "op": "MVR: VEX.128.66.0F38.W1 EC /r" , "ext": "CMPCCXADD" , "io": "CF=W OF=W SF=W ZF=W AF=W PF=W"},
{"inst": "cmpnbexadd X:m32, X:r32, R:r32" , "op": "MVR: VEX.128.66.0F38.W0 E7 /r" , "ext": "CMPCCXADD" , "io": "CF=W OF=W SF=W ZF=W AF=W PF=W"},
{"inst": "cmpnbexadd X:m64, X:r64, R:r64" , "op": "MVR: VEX.128.66.0F38.W1 E7 /r" , "ext": "CMPCCXADD" , "io": "CF=W OF=W SF=W ZF=W AF=W PF=W"},
{"inst": "cmpnbxadd X:m32, X:r32, R:r32" , "op": "MVR: VEX.128.66.0F38.W0 E3 /r" , "ext": "CMPCCXADD" , "io": "CF=W OF=W SF=W ZF=W AF=W PF=W"},
{"inst": "cmpnbxadd X:m64, X:r64, R:r64" , "op": "MVR: VEX.128.66.0F38.W1 E3 /r" , "ext": "CMPCCXADD" , "io": "CF=W OF=W SF=W ZF=W AF=W PF=W"},
{"inst": "cmpnlexadd X:m32, X:r32, R:r32" , "op": "MVR: VEX.128.66.0F38.W0 EF /r" , "ext": "CMPCCXADD" , "io": "CF=W OF=W SF=W ZF=W AF=W PF=W"},
{"inst": "cmpnlexadd X:m64, X:r64, R:r64" , "op": "MVR: VEX.128.66.0F38.W1 EF /r" , "ext": "CMPCCXADD" , "io": "CF=W OF=W SF=W ZF=W AF=W PF=W"},
{"inst": "cmpnlxadd X:m32, X:r32, R:r32" , "op": "MVR: VEX.128.66.0F38.W0 ED /r" , "ext": "CMPCCXADD" , "io": "CF=W OF=W SF=W ZF=W AF=W PF=W"},
{"inst": "cmpnlxadd X:m64, X:r64, R:r64" , "op": "MVR: VEX.128.66.0F38.W1 ED /r" , "ext": "CMPCCXADD" , "io": "CF=W OF=W SF=W ZF=W AF=W PF=W"},
{"inst": "cmpnoxadd X:m32, X:r32, R:r32" , "op": "MVR: VEX.128.66.0F38.W0 E1 /r" , "ext": "CMPCCXADD" , "io": "CF=W OF=W SF=W ZF=W AF=W PF=W"},
{"inst": "cmpnoxadd X:m64, X:r64, R:r64" , "op": "MVR: VEX.128.66.0F38.W1 E1 /r" , "ext": "CMPCCXADD" , "io": "CF=W OF=W SF=W ZF=W AF=W PF=W"},
{"inst": "cmpnpxadd X:m32, X:r32, R:r32" , "op": "MVR: VEX.128.66.0F38.W0 EB /r" , "ext": "CMPCCXADD" , "io": "CF=W OF=W SF=W ZF=W AF=W PF=W"},
{"inst": "cmpnpxadd X:m64, X:r64, R:r64" , "op": "MVR: VEX.128.66.0F38.W1 EB /r" , "ext": "CMPCCXADD" , "io": "CF=W OF=W SF=W ZF=W AF=W PF=W"},
{"inst": "cmpnsxadd X:m32, X:r32, R:r32" , "op": "MVR: VEX.128.66.0F38.W0 E9 /r" , "ext": "CMPCCXADD" , "io": "CF=W OF=W SF=W ZF=W AF=W PF=W"},
{"inst": "cmpnsxadd X:m64, X:r64, R:r64" , "op": "MVR: VEX.128.66.0F38.W1 E9 /r" , "ext": "CMPCCXADD" , "io": "CF=W OF=W SF=W ZF=W AF=W PF=W"},
{"inst": "cmpnzxadd X:m32, X:r32, R:r32" , "op": "MVR: VEX.128.66.0F38.W0 E5 /r" , "ext": "CMPCCXADD" , "io": "CF=W OF=W SF=W ZF=W AF=W PF=W"},
{"inst": "cmpnzxadd X:m64, X:r64, R:r64" , "op": "MVR: VEX.128.66.0F38.W1 E5 /r" , "ext": "CMPCCXADD" , "io": "CF=W OF=W SF=W ZF=W AF=W PF=W"},
{"inst": "cmpoxadd X:m32, X:r32, R:r32" , "op": "MVR: VEX.128.66.0F38.W0 E0 /r" , "ext": "CMPCCXADD" , "io": "CF=W OF=W SF=W ZF=W AF=W PF=W"},
{"inst": "cmpoxadd X:m64, X:r64, R:r64" , "op": "MVR: VEX.128.66.0F38.W1 E0 /r" , "ext": "CMPCCXADD" , "io": "CF=W OF=W SF=W ZF=W AF=W PF=W"},
{"inst": "cmppxadd X:m32, X:r32, R:r32" , "op": "MVR: VEX.128.66.0F38.W0 EA /r" , "ext": "CMPCCXADD" , "io": "CF=W OF=W SF=W ZF=W AF=W PF=W"},
{"inst": "cmppxadd X:m64, X:r64, R:r64" , "op": "MVR: VEX.128.66.0F38.W1 EA /r" , "ext": "CMPCCXADD" , "io": "CF=W OF=W SF=W ZF=W AF=W PF=W"},
{"inst": "cmpsxadd X:m32, X:r32, R:r32" , "op": "MVR: VEX.128.66.0F38.W0 E8 /r" , "ext": "CMPCCXADD" , "io": "CF=W OF=W SF=W ZF=W AF=W PF=W"},
{"inst": "cmpsxadd X:m64, X:r64, R:r64" , "op": "MVR: VEX.128.66.0F38.W1 E8 /r" , "ext": "CMPCCXADD" , "io": "CF=W OF=W SF=W ZF=W AF=W PF=W"},
{"inst": "[lock|xacqrel] cmpxchg x:r8/m8, r8, <al>" , "op": "MR: 0F B0 /r" , "ext": "I486" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
{"inst": "[lock|xacqrel] cmpxchg x:r16/m16, r16, <ax>" , "op": "MR: 66 0F B1 /r" , "ext": "I486" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
{"inst": "[lock|xacqrel] cmpxchg X:r32/m32, r32, <eax>" , "op": "MR: 0F B1 /r" , "ext": "I486" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
{"inst": "[lock|xacqrel] cmpxchg X:r64/m64, r64, <rax>" , "op": "MR: REX.W 0F B1 /r" , "ext": "I486" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
{"inst": "[lock|xacqrel] cmpxchg8b X:m64,X:<edx>,X:<eax>,<ecx>,<ebx>" , "op": "0F C7 /1" , "ext": "CMPXCHG8B" , "io": "ZF=W"},
{"inst": "[lock|xacqrel] cmpxchg16b X:m128,X:<rdx>,X:<rax>,<rcx>,<rbx>","op": "REX.W 0F C7 /1" , "ext": "CMPXCHG16B" , "io": "ZF=W"},
{"inst": "cmpzxadd X:m32, X:r32, R:r32" , "op": "VEX.128.66.0F38.W0 E4 /r" , "ext": "CMPCCXADD" , "io": "CF=W OF=W SF=W ZF=W AF=W PF=W"},
{"inst": "cmpzxadd X:m64, X:r64, R:r64" , "op": "VEX.128.66.0F38.W1 E4 /r" , "ext": "CMPCCXADD" , "io": "CF=W OF=W SF=W ZF=W AF=W PF=W"},
{"inst": "cpuid X:<eax>, W:<ebx>, X:<ecx>, W:<edx>" , "op": "0F A2" , "ext": "I486" , "volatile": true},
{"inst": "lahf w:<ah>" , "op": "9F" , "ext": "LAHFSAHF" , "io": "SF=R ZF=R AF=R PF=R CF=R"},
{"inst": "lfence" , "op": "0F AE E8" , "ext": "SSE2"},
{"inst": "lzcnt w:r16, r16/m16" , "op": "RM: 66 F3 0F BD /r" , "ext": "LZCNT" , "io": "OF=U SF=U ZF=W AF=U PF=U CF=W"},
{"inst": "lzcnt W:r32, r32/m32" , "op": "RM: F3 0F BD /r" , "ext": "LZCNT" , "io": "OF=U SF=U ZF=W AF=U PF=U CF=W"},
{"inst": "lzcnt W:r64, r64/m64" , "op": "RM: REX.W F3 0F BD /r" , "ext": "LZCNT" , "io": "OF=U SF=U ZF=W AF=U PF=U CF=W"},
{"inst": "mcommit" , "op": "F3 0F 01 FA" , "ext": "MCOMMIT" , "io": "OF=0 SF=0 ZF=0 AF=0 PF=0 CF=W"},
{"inst": "mfence" , "op": "0F AE F0" , "ext": "SSE2"},
{"inst": "movbe w:r16, m16" , "op": "RM: 66 0F 38 F0 /r" , "ext": "MOVBE"},
{"inst": "movbe W:r32, m32" , "op": "RM: 0F 38 F0 /r" , "ext": "MOVBE"},
{"inst": "movbe W:r64, m64" , "op": "RM: REX.W 0F 38 F0 /r" , "ext": "MOVBE"},
{"inst": "movbe W:m16, r16" , "op": "MR: 66 0F 38 F1 /r" , "ext": "MOVBE"},
{"inst": "movbe W:m32, r32" , "op": "MR: 0F 38 F1 /r" , "ext": "MOVBE"},
{"inst": "movbe W:m64, r64" , "op": "MR: REX.W 0F 38 F1 /r" , "ext": "MOVBE"},
{"inst": "movdiri W:m32, r32" , "op": "MR: 0F 38 F9 /r" , "ext": "MOVDIRI"},
{"inst": "movdiri W:m64, r64" , "op": "MR: REX.W 0F 38 F9 /r" , "ext": "MOVDIRI"},
{"inst": "movdir64b W:m512(es:r32), m512" , "op": "RM: 66 0F 38 F8 /r" , "ext": "MOVDIR64B"},
{"inst": "movdir64b W:m512(es:r64), m512" , "op": "RM: 66 0F 38 F8 /r" , "ext": "MOVDIR64B"},
{"inst": "movnti W:m32, r32" , "op": "MR: 0F C3 /r" , "ext": "SSE2"},
{"inst": "movnti W:m64, r64" , "op": "MR: REX.W 0F C3 /r" , "ext": "SSE2"},
{"inst": "mulx W:r32, W:r32, ~r32/m32, ~<edx>" , "op": "RVM: VEX.LZ.F2.0F38.W0 F6 /r" , "ext": "BMI2"},
{"inst": "mulx W:r64, W:r64, ~r64/m64, ~<rdx>" , "op": "RVM: VEX.LZ.F2.0F38.W1 F6 /r" , "ext": "BMI2"},
{"inst": "pdep W:r32, r32, r32/m32" , "op": "RVM: VEX.LZ.F2.0F38.W0 F5 /r" , "ext": "BMI2"},
{"inst": "pdep W:r64, r64, r64/m64" , "op": "RVM: VEX.LZ.F2.0F38.W1 F5 /r" , "ext": "BMI2"},
{"inst": "pext W:r32, r32, r32/m32" , "op": "RVM: VEX.LZ.F3.0F38.W0 F5 /r" , "ext": "BMI2"},
{"inst": "pext W:r64, r64, r64/m64" , "op": "RVM: VEX.LZ.F3.0F38.W1 F5 /r" , "ext": "BMI2"},
{"inst": "popcnt w:r16, r16/m16" , "op": "RM: 66 F3 0F B8 /r" , "ext": "POPCNT" , "io": "OF=0 SF=0 ZF=W AF=0 PF=0 CF=0"},
{"inst": "popcnt W:r32, r32/m32" , "op": "RM: F3 0F B8 /r" , "ext": "POPCNT" , "io": "OF=0 SF=0 ZF=W AF=0 PF=0 CF=0"},
{"inst": "popcnt W:r64, r64/m64" , "op": "RM: REX.W F3 0F B8 /r" , "ext": "POPCNT" , "io": "OF=0 SF=0 ZF=W AF=0 PF=0 CF=0"},
{"inst": "prefetch R:mem" , "op": "0F 0D /0" , "ext": "3DNOW"},
{"inst": "prefetchit0 R:mem" , "op": "0F 18 /7" , "ext": "PREFETCHI" , "arch": "X64"},
{"inst": "prefetchit1 R:mem" , "op": "0F 18 /6" , "ext": "PREFETCHI" , "arch": "X64"},
{"inst": "prefetchnta R:mem" , "op": "0F 18 /0" , "ext": "SSE"},
{"inst": "prefetcht0 R:mem" , "op": "0F 18 /1" , "ext": "SSE"},
{"inst": "prefetcht1 R:mem" , "op": "0F 18 /2" , "ext": "SSE"},
{"inst": "prefetcht2 R:mem" , "op": "0F 18 /3" , "ext": "SSE"},
{"inst": "prefetchw R:mem" , "op": "0F 0D /1" , "ext": "PREFETCHW" , "io": "OF=U SF=U ZF=U AF=U PF=U CF=U"},
{"inst": "prefetchwt1 R:mem" , "op": "0F 0D /2" , "ext": "PREFETCHWT1", "io": "OF=U SF=U ZF=U AF=U PF=U CF=U"},
{"inst": "ptwrite R:r32/m32" , "op": "F3 0F AE /4" , "ext": "PTWRITE"},
{"inst": "ptwrite R:r64/m64" , "op": "REX.W F3 0F AE /4" , "ext": "PTWRITE"},
{"inst": "rdpid W:r32" , "op": "R: F3 0F C7 /7" , "ext": "RDPID" , "arch": "X86"},
{"inst": "rdpid W:r64" , "op": "R: F3 0F C7 /7" , "ext": "RDPID" , "arch": "X64"},
{"inst": "rdpkru W:<edx>, W:<eax>, R:<ecx>" , "op": "0F 01 EE" , "ext": "OSPKE"},
{"inst": "rdpru W:<edx>, W:<eax>, R:<ecx>" , "op": "0F 01 FD" , "ext": "RDPRU"},
{"inst": "rdrand w:r16" , "op": "66 0F C7 /6" , "ext": "RDRAND" , "io": "OF=0 SF=0 ZF=0 AF=0 PF=0 CF=W"},
{"inst": "rdrand W:r32" , "op": "0F C7 /6" , "ext": "RDRAND" , "io": "OF=0 SF=0 ZF=0 AF=0 PF=0 CF=W"},
{"inst": "rdrand W:r64" , "op": "REX.W 0F C7 /6" , "ext": "RDRAND" , "io": "OF=0 SF=0 ZF=0 AF=0 PF=0 CF=W"},
{"inst": "rdseed w:r16" , "op": "66 0F C7 /7" , "ext": "RDSEED" , "io": "OF=0 SF=0 ZF=0 AF=0 PF=0 CF=W"},
{"inst": "rdseed W:r32" , "op": "0F C7 /7" , "ext": "RDSEED" , "io": "OF=0 SF=0 ZF=0 AF=0 PF=0 CF=W"},
{"inst": "rdseed W:r64" , "op": "REX.W 0F C7 /7" , "ext": "RDSEED" , "io": "OF=0 SF=0 ZF=0 AF=0 PF=0 CF=W"},
{"inst": "rdtsc W:<edx>, W:<eax>" , "op": "0F 31" , "ext": "RDTSC"},
{"inst": "rdtscp W:<edx>, W:<eax>, W:<ecx>" , "op": "0F 01 F9" , "ext": "RDTSCP"},
{"inst": "rorx W:r32, r32/m32, ib/ub" , "op": "RM: VEX.LZ.F2.0F3A.W0 F0 /r ib" , "ext": "BMI2"},
{"inst": "rorx W:r64, r64/m64, ib/ub" , "op": "RM: VEX.LZ.F2.0F3A.W1 F0 /r ib" , "ext": "BMI2"},
{"inst": "sahf R:<ah>" , "op": "9E" , "ext": "LAHFSAHF" , "io": "SF=W ZF=W AF=W PF=W CF=W"},
{"inst": "sarx W:r32, r32/m32, r32" , "op": "RMV: VEX.LZ.F3.0F38.W0 F7 /r" , "ext": "BMI2"},
{"inst": "sarx W:r64, r64/m64, r64" , "op": "RMV: VEX.LZ.F3.0F38.W1 F7 /r" , "ext": "BMI2"},
{"inst": "serialize" , "op": "0F 01 E8" , "ext": "SERIALIZE"},
{"inst": "sfence" , "op": "0F AE F8" , "ext": "SSE"},
{"inst": "shlx W:r32, r32/m32, r32" , "op": "RMV: VEX.LZ.66.0F38.W0 F7 /r" , "ext": "BMI2"},
{"inst": "shlx W:r64, r64/m64, r64" , "op": "RMV: VEX.LZ.66.0F38.W1 F7 /r" , "ext": "BMI2"},
{"inst": "shrx W:r32, r32/m32, r32" , "op": "RMV: VEX.LZ.F2.0F38.W0 F7 /r" , "ext": "BMI2"},
{"inst": "shrx W:r64, r64/m64, r64" , "op": "RMV: VEX.LZ.F2.0F38.W1 F7 /r" , "ext": "BMI2"},
{"inst": "tzcnt w:r16, r16/m16" , "op": "RM: 66 F3 0F BC /r" , "ext": "BMI" , "io": "OF=U SF=U ZF=W AF=U PF=U CF=W"},
{"inst": "tzcnt W:r32, r32/m32" , "op": "RM: F3 0F BC /r" , "ext": "BMI" , "io": "OF=U SF=U ZF=W AF=U PF=U CF=W"},
{"inst": "tzcnt W:r64, r64/m64" , "op": "RM: REX.W F3 0F BC /r" , "ext": "BMI" , "io": "OF=U SF=U ZF=W AF=U PF=U CF=W"},
{"inst": "[lock|xacqrel] xadd x:r8/m8, x:r8" , "op": "MR: 0F C0 /r" , "ext": "I486" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
{"inst": "[lock|xacqrel] xadd x:r16/m16, x:r16" , "op": "MR: 66 0F C1 /r" , "ext": "I486" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
{"inst": "[lock|xacqrel] xadd X:r32/m32, X:r32" , "op": "MR: 0F C1 /r" , "ext": "I486" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
{"inst": "[lock|xacqrel] xadd X:r64/m64, X:r64" , "op": "MR: REX.W 0F C1 /r" , "ext": "I486" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"}
]},
{"category": "GP GP_EXT CRYPTO_HASH", "data": [
{"inst": "crc32 X:r32, r8/m8" , "op": "RM: F2 0F 38 F0 /r" , "ext": "SSE4_2"},
{"inst": "crc32 X:r32, r16/m16" , "op": "RM: 66 F2 0F 38 F1 /r" , "ext": "SSE4_2"},
{"inst": "crc32 X:r32, r32/m32" , "op": "RM: F2 0F 38 F1 /r" , "ext": "SSE4_2"},
{"inst": "crc32 X:r64, r8/m8" , "op": "RM: REX.W F2 0F 38 F0 /r" , "ext": "SSE4_2"},
{"inst": "crc32 X:r64, r64/m64" , "op": "RM: REX.W F2 0F 38 F1 /r" , "ext": "SSE4_2"}
]},
{"category": "GP", "volatile": true, "data": [
{"inst": "cli" , "op": "FA" , "io": "IF=W"},
{"inst": "int ib/ub" , "op": "CD ib"},
{"inst": "int3" , "op": "CC"},
{"inst": "lar w:r16, R:r16/m16" , "op": "RM: 66 0F 02 /r" , "io": "ZF=W"},
{"inst": "lar W:r32, R:r32/m16" , "op": "RM: 0F 02 /r" , "io": "ZF=W"},
{"inst": "lds x:r16, m16_16" , "op": "RM: 66 C5 /r" , "arch": "X86"},
{"inst": "lds X:r32, m16_32" , "op": "RM: C5 /r" , "arch": "X86"},
{"inst": "les x:r16, m16_16" , "op": "RM: 66 C4 /r" , "arch": "X86"},
{"inst": "les X:r32, m16_32" , "op": "RM: C4 /r" , "arch": "X86"},
{"inst": "lfs x:r16, m16_16" , "op": "RM: 66 0F B4 /r"},
{"inst": "lfs X:r32, m16_32" , "op": "RM: 0F B4 /r"},
{"inst": "lfs X:r64, m16_64" , "op": "RM: REX.W 0F B4 /r"},
{"inst": "lgs x:r16, m16_16" , "op": "RM: 66 0F B5 /r"},
{"inst": "lgs X:r32, m16_32" , "op": "RM: 0F B5 /r"},
{"inst": "lgs X:r64, m16_64" , "op": "RM: REX.W 0F B5 /r"},
{"inst": "lsl w:r16, R:r16/m16" , "op": "RM: 66 0F 03 /r" , "io": "ZF=W"},
{"inst": "lsl W:r32, R:r32/m16" , "op": "RM: 0F 03 /r" , "io": "ZF=W"},
{"inst": "lsl W:r64, R:r32/m16" , "op": "RM: REX.W 0F 03 /r" , "io": "ZF=W"},
{"inst": "lss x:r16, m16_16" , "op": "RM: 66 0F B2 /r"},
{"inst": "lss X:r32, m16_32" , "op": "RM: 0F B2 /r"},
{"inst": "lss X:r64, m16_64" , "op": "RM: REX.W 0F B2 /r"},
{"inst": "pause" , "op": "F3 90"},
{"inst": "rsm" , "op": "0F AA" , "arch": "X86", "io": "OF=U SF=U ZF=U AF=U PF=U CF=U"},
{"inst": "sgdt W:mem" , "op": "0F 01 /0"},
{"inst": "sidt W:mem" , "op": "0F 01 /1"},
{"inst": "sldt w:r16/m16" , "op": "66 0F 00 /0"},
{"inst": "sldt W:r32/m16" , "op": "0F 00 /0"},
{"inst": "sldt W:r64/m16" , "op": "REX.W 0F 00 /0"},
{"inst": "smsw w:r16/m16" , "op": "66 0F 01 /4"},
{"inst": "smsw W:r32/m16" , "op": "0F 01 /4"},
{"inst": "smsw W:r64/m16" , "op": "REX.W 0F 01 /4"},
{"inst": "sti" , "op": "FB" , "io": "IF=1"},
{"inst": "str w:r16/m16" , "op": "66 0F 00 /1"},
{"inst": "str W:r32/m16" , "op": "0F 00 /1"},
{"inst": "str W:r64/m16" , "op": "REX.W 0F 00 /1"},
{"inst": "syscall" , "op": "0F 05" , "arch": "X64"},
{"inst": "sysenter" , "op": "0F 34"},
{"inst": "verr R:r16/m16" , "op": "0F 00 /4" , "io": "ZF=W"},
{"inst": "verw R:r16/m16" , "op": "0F 00 /5" , "io": "ZF=W"},
{"inst": "xlatb" , "op": "D7"}
]},
{"category": "GP", "deprecated": true, "data": [
{"inst": "aaa x:<ax>" , "op": "37" , "arch": "X86", "io": "OF=U SF=U ZF=U AF=W PF=U CF=W"},
{"inst": "aas x:<ax>" , "op": "3F" , "arch": "X86", "io": "OF=U SF=U ZF=U AF=W PF=U CF=W"},
{"inst": "aad x:<ax>, ib/ub" , "op": "D5 ib" , "arch": "X86", "io": "OF=U SF=W ZF=W AF=U PF=W CF=U"},
{"inst": "aam x:<ax>, ib/ub" , "op": "D4 ib" , "arch": "X86", "io": "OF=U SF=W ZF=W AF=U PF=W CF=U"},
{"inst": "arpl x:r16/m16, R:r16" , "op": "MR: 63 /r" , "arch": "X86", "io": "ZF=W"},
{"inst": "bound R:r16, R:m32" , "op": "RM: 66 62 /r" , "arch": "X86"},
{"inst": "bound R:r32, R:m64" , "op": "RM: 62 /r" , "arch": "X86"},
{"inst": "daa x:<ax>" , "op": "27" , "arch": "X86", "io": "OF=U SF=W ZF=W AF=W PF=W CF=W"},
{"inst": "das x:<ax>" , "op": "2F" , "arch": "X86", "io": "OF=U SF=W ZF=W AF=W PF=W CF=W"},
{"inst": "into" , "op": "CE" , "arch": "X86", "io": "OF=R"},
{"inst": "popa" , "op": "66 61" , "arch": "X86"},
{"inst": "popad" , "op": "61" , "arch": "X86"},
{"inst": "pusha" , "op": "66 60" , "arch": "X86"},
{"inst": "pushad" , "op": "60" , "arch": "X86"}
]},
{"category": "GP GP_EXT", "ext": "TBM", "deprecated": true, "data": [
{"inst": "blci W:r32, r32/m32" , "op": "VM: XOP.LZ.M09.W0 02 /6"},
{"inst": "blci W:r64, r64/m64" , "op": "VM: XOP.LZ.M09.W1 02 /6"},
{"inst": "blcic W:r32, r32/m32" , "op": "VM: XOP.LZ.M09.W0 01 /5"},
{"inst": "blcic W:r64, r64/m64" , "op": "VM: XOP.LZ.M09.W1 01 /5"},
{"inst": "blsic W:r32, r32/m32" , "op": "VM: XOP.LZ.M09.W0 01 /6"},
{"inst": "blsic W:r64, r64/m64" , "op": "VM: XOP.LZ.M09.W1 01 /6"},
{"inst": "blcfill W:r32, r32/m32" , "op": "VM: XOP.LZ.M09.W0 01 /1"},
{"inst": "blcfill W:r64, r64/m64" , "op": "VM: XOP.LZ.M09.W1 01 /1"},
{"inst": "blsfill W:r32, r32/m32" , "op": "VM: XOP.LZ.M09.W0 01 /2"},
{"inst": "blsfill W:r64, r64/m64" , "op": "VM: XOP.LZ.M09.W1 01 /2"},
{"inst": "blcmsk W:r32, r32/m32" , "op": "VM: XOP.LZ.M09.W0 02 /1"},
{"inst": "blcmsk W:r64, r64/m64" , "op": "VM: XOP.LZ.M09.W1 02 /1"},
{"inst": "blcs W:r32, r32/m32" , "op": "VM: XOP.LZ.M09.W0 01 /3"},
{"inst": "blcs W:r64, r64/m64" , "op": "VM: XOP.LZ.M09.W1 01 /3"},
{"inst": "tzmsk W:r32, r32/m32" , "op": "VM: XOP.LZ.M09.W0 01 /4"},
{"inst": "tzmsk W:r64, r64/m64" , "op": "VM: XOP.LZ.M09.W1 01 /4"},
{"inst": "t1mskc W:r32, r32/m32" , "op": "VM: XOP.LZ.M09.W0 01 /7"},
{"inst": "t1mskc W:r64, r64/m64" , "op": "VM: XOP.LZ.M09.W1 01 /7"}
]},
{"category": "GP GP_EXT", "ext": "MPX", "deprecated": true, "data": [
{"inst": "bndcl R:bnd, r32/m32" , "op": "RM: F3 0F 1A /r" , "arch": "X86"},
{"inst": "bndcl R:bnd, r64/m64" , "op": "RM: F3 0F 1A /r" , "arch": "X64"},
{"inst": "bndcn R:bnd, r32/m32" , "op": "RM: F2 0F 1B /r" , "arch": "X86"},
{"inst": "bndcn R:bnd, r64/m64" , "op": "RM: F2 0F 1B /r" , "arch": "X64"},
{"inst": "bndcu R:bnd, r32/m32" , "op": "RM: F2 0F 1A /r" , "arch": "X86"},
{"inst": "bndcu R:bnd, r64/m64" , "op": "RM: F2 0F 1A /r" , "arch": "X64"},
{"inst": "bndldx W:bnd, mib" , "op": "RM: 0F 1A /r"},
{"inst": "bndmk W:bnd, mem" , "op": "RM: F3 0F 1B /r"},
{"inst": "bndmov W:bnd, bnd/mem" , "op": "RM: 66 0F 1A /r"},
{"inst": "bndmov W:bnd/mem, bnd" , "op": "MR: 66 0F 1B /r"},
{"inst": "bndstx W:mib, bnd" , "op": "MR: 0F 1B /r"}
]},
{"category": "GP GP_EXT", "volatile": true, "data": [
{"inst": "fxrstor R:mem" , "op": "0F AE /1" , "ext": "FXSR" , "io": "C0=W C1=W C2=W C3=W"},
{"inst": "fxrstor64 R:mem" , "op": "REX.W 0F AE /1" , "ext": "FXSR" , "io": "C0=W C1=W C2=W C3=W"},
{"inst": "fxsave W:mem" , "op": "0F AE /0" , "ext": "FXSR" , "io": "C0=R C1=R C2=R C3=R"},
{"inst": "fxsave64 W:mem" , "op": "REX.W 0F AE /0" , "ext": "FXSR" , "io": "C0=R C1=R C2=R C3=R"},
{"inst": "xgetbv W:<edx>, W:<eax>, R:<ecx>" , "op": "0F 01 D0" , "ext": "XSAVE" , "io": "XCR=R"},
{"inst": "xrstor R:mem, <edx>, <eax>" , "op": "0F AE /5" , "ext": "XSAVE" , "io": "XCR=R"},
{"inst": "xrstor64 R:mem, <edx>, <eax>" , "op": "REX.W 0F AE /5" , "ext": "XSAVE" , "io": "XCR=R"},
{"inst": "xsave W:mem, <edx>, <eax>" , "op": "0F AE /4" , "ext": "XSAVE" , "io": "XCR=R"},
{"inst": "xsave64 W:mem, <edx>, <eax>" , "op": "REX.W 0F AE /4" , "ext": "XSAVE" , "io": "XCR=R"},
{"inst": "xsavec W:mem, <edx>, <eax>" , "op": "0F C7 /4" , "ext": "XSAVEC" , "io": "XCR=R"},
{"inst": "xsavec64 W:mem, <edx>, <eax>" , "op": "REX.W 0F C7 /4" , "ext": "XSAVEC" , "io": "XCR=R"},
{"inst": "xsaveopt W:mem, <edx>, <eax>" , "op": "0F AE /6" , "ext": "XSAVEOPT", "io": "XCR=R"},
{"inst": "xsaveopt64 W:mem, <edx>, <eax>" , "op": "REX.W 0F AE /6" , "ext": "XSAVEOPT", "io": "XCR=R"}
]},
{"category": "GP GP_EXT", "volatile": true, "data": [
{"inst": "incsspd r32" , "op": "F3 0F AE /5" , "ext": "CET_SS"},
{"inst": "incsspq r64" , "op": "REX.W F3 0F AE /5" , "ext": "CET_SS"},
{"inst": "monitorx R:<mem(ds:zax)>, R:<ecx>, R:<edx>" , "op": "0F 01 FA" , "ext": "MONITORX"},
{"inst": "mwaitx R:<eax>, R:<ecx>, R:<ebx>" , "op": "0F 01 FB" , "ext": "MONITORX"},
{"inst": "rdsspd W:r32" , "op": "F3 0F 1E /1" , "ext": "CET_SS"},
{"inst": "rdsspq W:r64" , "op": "REX.W F3 0F 1E /1" , "ext": "CET_SS"},
{"inst": "rstorssp R:m64" , "op": "F3 0F 01 /5" , "ext": "CET_SS" , "io": "OF=0 SF=0 ZF=0 AF=0 PF=0 CF=W"},
{"inst": "saveprevssp" , "op": "F3 0F 01 EA" , "ext": "CET_SS" , "io": "OF=0 SF=0 ZF=0 AF=0 PF=0 CF=W"},
{"inst": "tpause R:r32, <edx>, <eax>" , "op": "66 0F AE /6" , "ext": "WAITPKG" , "io": "OF=0 SF=0 ZF=0 AF=0 PF=0 CF=W"},
{"inst": "umonitor R:mem(ds:r32)" , "op": "F3 0F AE /6" , "ext": "WAITPKG" , "arch": "X86"},
{"inst": "umonitor R:mem(ds:r64)" , "op": "F3 0F AE /6" , "ext": "WAITPKG" , "arch": "X64"},
{"inst": "umwait R:r32, <edx>, <eax>" , "op": "F2 0F AE /6" , "ext": "WAITPKG" , "io": "OF=0 SF=0 ZF=0 AF=0 PF=0 CF=W"}
]},
{"category": "GP GP_EXT", "ext": "LWP", "volatile": true, "data": [
{"inst": "llwpcb R:r32" , "op": "XOP.L0.P0.M09.W0 12 /0"},
{"inst": "llwpcb R:r64" , "op": "XOP.L0.P0.M09.W1 12 /0"},
{"inst": "lwpins R:r32, R:r32/m32, id/ud" , "op": "VM: XOP.L0.P0.M0A.W0 12 /0 id"},
{"inst": "lwpins R:r64, R:r32/m32, id/ud" , "op": "VM: XOP.L0.P0.M0A.W1 12 /0 id"},
{"inst": "lwpval R:r32, R:r32/m32, id/ud" , "op": "VM: XOP.L0.P0.M0A.W0 12 /1 id"},
{"inst": "lwpval R:r64, R:r32/m32, id/ud" , "op": "VM: XOP.L0.P0.M0A.W1 12 /1 id"},
{"inst": "slwpcb W:r32" , "op": "XOP.L0.P0.M09.W0 12 /1"},
{"inst": "slwpcb W:r64" , "op": "XOP.L0.P0.M09.W1 12 /1"}
]},
{"category": "GP GP_EXT", "ext": "FSGSBASE", "arch": "X64", "volatile": true, "data": [
{"inst": "rdfsbase W:r32" , "op": "F3 0F AE /0"},
{"inst": "rdfsbase W:r64" , "op": "REX.W F3 0F AE /0"},
{"inst": "rdgsbase W:r32" , "op": "F3 0F AE /1"},
{"inst": "rdgsbase W:r64" , "op": "REX.W F3 0F AE /1"},
{"inst": "wrfsbase R:r32" , "op": "F3 0F AE /2"},
{"inst": "wrfsbase R:r64" , "op": "REX.W F3 0F AE /2"},
{"inst": "wrgsbase R:r32" , "op": "F3 0F AE /3"},
{"inst": "wrgsbase R:r64" , "op": "REX.W F3 0F AE /3"}
]},
{"category": "GP GP_EXT", "ext": "UINTR", "arch": "X64", "volatile": true, "data": [
{"inst": "uiret" , "op": "F3 0F 01 EC"},
{"inst": "clui" , "op": "F3 0F 01 EE"},
{"inst": "stui" , "op": "F3 0F 01 EF"},
{"inst": "testui" , "op": "F3 0F 01 ED" , "io": "OF=0 SF=0 ZF=0 AF=0 PF=0 CF=W"},
{"inst": "senduipi R:r64" , "op": "R: F3 0F C7 /6"}
]},
{"category": "GP GP_EXT", "ext": "PCONFIG", "volatile": true, "data": [
{"inst": "pconfig" , "op": "0F 01 C5"}
]},
{"category": "GP GP_EXT", "ext": "TSE", "arch": "X64", "volatile": true, "data": [
{"inst": "pbndkb" , "op": "0F 01 C7"}
]},
{"category": "GP GP_EXT", "volatile": true, "data": [
{"inst": "xabort ib/ub" , "op": "C6 /7 ib" , "ext": "RTM"},
{"inst": "xbegin rel16" , "op": "66 C7 /7 cw" , "ext": "RTM"},
{"inst": "xbegin rel32" , "op": "C7 /7 cd" , "ext": "RTM"},
{"inst": "xend" , "op": "0F 01 D5" , "ext": "RTM"},
{"inst": "xresldtrk" , "op": "F2 0F 01 E9" , "ext": "TSXLDTRK"},
{"inst": "xsusldtrk" , "op": "F2 0F 01 E8" , "ext": "TSXLDTRK"},
{"inst": "xtest" , "op": "0F 01 D6" , "ext": "TSX" , "io": "OF=0 SF=0 ZF=W AF=0 PF=0 CF=0"}
]},
{"category": "GP", "volatile": true, "privilege": "L0", "data": [
{"inst": "clrssbsy R:m64" , "op": "F3 0F AE /6" , "ext": "CET_SS" , "io": "OF=0 SF=0 ZF=0 AF=0 PF=0 CF=W"},
{"inst": "clts" , "op": "0F 06"},
{"inst": "endbr32" , "op": "F3 0F 1E FB" , "ext": "CET_IBT"},
{"inst": "endbr64" , "op": "F3 0F 1E FA" , "ext": "CET_IBT"},
{"inst": "getsec <eax>" , "op": "0F 37" , "ext": "SMX"},
{"inst": "hlt" , "op": "F4"},
{"inst": "hreset ib/ub, W:<eax>" , "op": "F3 0F 3A F0 /0 ib" , "ext": "HRESET"},
{"inst": "invd" , "op": "0F 08" , "ext": "I486" },
{"inst": "invlpg R:mem" , "op": "0F 01 /7" , "ext": "I486"},
{"inst": "invpcid R:r32, R:m128" , "op": "RM: 66 0F 38 82 /r" , "ext": "I486" , "arch": "X86"},
{"inst": "invpcid R:r64, R:m128" , "op": "RM: 66 0F 38 82 /r" , "ext": "I486" , "arch": "X64"},
{"inst": "lgdt R:mem" , "op": "0F 01 /2"},
{"inst": "lidt R:mem" , "op": "0F 01 /3"},
{"inst": "lldt R:r16/m16" , "op": "0F 00 /2"},
{"inst": "lmsw R:r16/m16" , "op": "0F 01 /6"},
{"inst": "ltr R:r16/m16" , "op": "0F 00 /3"},
{"inst": "monitor R:<mem(ds:zax)>, R:<ecx>, R:<edx>" , "op": "0F 01 C8" , "ext": "MONITOR"},
{"inst": "mwait R:<eax>, R:<ecx>" , "op": "0F 01 C9" , "ext": "MONITOR"},
{"inst": "rdpmc W:<edx>, W:<eax>, R:<ecx>" , "op": "0F 33"},
{"inst": "rdmsr W:<edx>, W:<eax>, R:<ecx>" , "op": "0F 32" , "ext": "MSR" , "io": "MSR=R"},
{"inst": "rdmsrlist R:<mem(ds:rsi)>, W:<mem(ds:rdi)>, X:<rcx>" , "op": "F2 0F 01 C6" , "ext": "MSRLIST" , "arch": "X64", "io": "MSR=R"},
{"inst": "setssbsy" , "op": "F3 0F 01 E8" , "ext": "CET_SS"},
{"inst": "swapgs" , "op": "0F 01 F8" , "arch": "X64"},
{"inst": "sysexit" , "op": "0F 35"},
{"inst": "sysexitq" , "op": "REX.W 0F 35"},
{"inst": "sysret" , "op": "0F 07" , "arch": "X64"},
{"inst": "sysretq" , "op": "REX.W 0F 07" , "arch": "X64"},
{"inst": "wbinvd" , "op": "0F 09" , "ext": "I486"},
{"inst": "wbnoinvd" , "op": "F3 0F 09" , "ext": "WBNOINVD"},
{"inst": "wrmsrns R:<edx>, R:<eax>, R:<ecx>" , "op": "0F 01 C6" , "ext": "WRMSRNS" , "io": "MSR=W"},
{"inst": "wrmsr R:<edx>, R:<eax>, R:<ecx>" , "op": "0F 30" , "ext": "MSR" , "io": "MSR=W"},
{"inst": "wrmsrlist R:<mem(ds:rsi)>, R:<mem(ds:rdi)>, X:<rcx>" , "op": "F3 0F 01 C6" , "ext": "MSRLIST" , "arch": "X64", "io": "MSR=W"},
{"inst": "wrssd W:r32/m32, r32" , "op": "MR: 0F 38 F6 /r" , "ext": "CET_SS"},
{"inst": "wrssq W:r64/m64, r64" , "op": "MR: REX.W 0F 38 F6 /r" , "ext": "CET_SS"},
{"inst": "xrstors R:mem, <edx>, <eax>" , "op": "0F C7 /3" , "ext": "XSAVES" , "io": "XCR=R"},
{"inst": "xrstors64 R:mem, <edx>, <eax>" , "op": "REX.W 0F C7 /3" , "ext": "XSAVES" , "io": "XCR=R"},
{"inst": "wrussd W:r32/m32, r32" , "op": "MR: 66 0F 38 F5 /r" , "ext": "CET_SS"},
{"inst": "wrussq W:r64/m64, r64" , "op": "MR: REX.W 66 0F 38 F5 /r" , "ext": "CET_SS"},
{"inst": "xsaves W:mem, <edx>, <eax>" , "op": "0F C7 /5" , "ext": "XSAVES" , "io": "XCR=R"},
{"inst": "xsaves64 W:mem, <edx>, <eax>" , "op": "REX.W 0F C7 /5" , "ext": "XSAVES" , "io": "XCR=R"},
{"inst": "xsetbv R:<edx>, R:<eax>, R:<ecx>" , "op": "0F 01 D1" , "ext": "XSAVE" , "io": "XCR=W"}
]},
{"category": "VIRTUALIZATION", "volatile": true, "data": [
{"inst": "clac" , "op": "0F 01 CA" , "ext": "SMAP" , "privilege": "L0", "io": "AC=0"},
{"inst": "stac" , "op": "0F 01 CB" , "ext": "SMAP" , "privilege": "L0", "io": "AC=1"},
{"inst": "enqcmd W:m512(es:r32), m512" , "op": "RM: F2 0F 38 F8 /r" , "ext": "ENQCMD" , "io": "OF=0 SF=0 ZF=W AF=0 PF=0 CF=0", "arch": "X86"},
{"inst": "enqcmd W:m512(es:r64), m512" , "op": "RM: F2 0F 38 F8 /r" , "ext": "ENQCMD" , "io": "OF=0 SF=0 ZF=W AF=0 PF=0 CF=0", "arch": "X64"},
{"inst": "enqcmds W:m512(es:r32), m512" , "op": "RM: F3 0F 38 F8 /r" , "ext": "ENQCMD" , "io": "OF=0 SF=0 ZF=W AF=0 PF=0 CF=0", "arch": "X86"},
{"inst": "enqcmds W:m512(es:r64), m512" , "op": "RM: F3 0F 38 F8 /r" , "ext": "ENQCMD" , "io": "OF=0 SF=0 ZF=W AF=0 PF=0 CF=0", "arch": "X64"},
{"inst": "invept R:r32, R:m128" , "op": "RM: 66 0F 38 80 /r" , "ext": "VMX" , "privilege": "L0", "arch": "X86"},
{"inst": "invept R:r64, R:m128" , "op": "RM: 66 0F 38 80 /r" , "ext": "VMX" , "privilege": "L0", "arch": "X64"},
{"inst": "invvpid R:r32, R:m128" , "op": "RM: 66 0F 38 81 /r" , "ext": "VMX" , "privilege": "L0", "arch": "X86"},
{"inst": "invvpid R:r64, R:m128" , "op": "RM: 66 0F 38 81 /r" , "ext": "VMX" , "privilege": "L0", "arch": "X64"},
{"inst": "seamcall" , "op": "66 0F 01 CF" , "ext": "SEAM"},
{"inst": "seamops" , "op": "66 0F 01 CE" , "ext": "SEAM"},
{"inst": "seamret" , "op": "66 0F 01 CD" , "ext": "SEAM"},
{"inst": "tdcall" , "op": "66 0F 01 CC" , "ext": "SEAM"},
{"inst": "vmcall" , "op": "0F 01 C1" , "ext": "VMX" , "privilege": "L0"},
{"inst": "vmclear W:m64" , "op": "66 0F C7 /6" , "ext": "VMX" , "privilege": "L0"},
{"inst": "vmfunc" , "op": "0F 01 D4" , "ext": "VMX" , "privilege": "L0"},
{"inst": "vmlaunch" , "op": "0F 01 C2" , "ext": "VMX" , "privilege": "L0"},
{"inst": "vmptrld R:m64" , "op": "0F C7 /6" , "ext": "VMX" , "privilege": "L0"},
{"inst": "vmptrst W:m64" , "op": "0F C7 /7" , "ext": "VMX" , "privilege": "L0"},
{"inst": "vmread W:r32/m32, R:r32" , "op": "MR: 0F 78 /r" , "ext": "VMX" , "privilege": "L0", "arch": "X86"},
{"inst": "vmread W:r64/m64, R:r64" , "op": "MR: 0F 78 /r" , "ext": "VMX" , "privilege": "L0", "arch": "X64"},
{"inst": "vmresume" , "op": "0F 01 C3" , "ext": "VMX" , "privilege": "L0"},
{"inst": "vmwrite R:r32, R:r32/m32" , "op": "RM: 0F 79 /r" , "ext": "VMX" , "privilege": "L0", "arch": "X86"},
{"inst": "vmwrite R:r64, R:r64/m64" , "op": "RM: 0F 79 /r" , "ext": "VMX" , "privilege": "L0", "arch": "X64"},
{"inst": "vmxoff" , "op": "0F 01 C4" , "ext": "VMX" , "privilege": "L0"},
{"inst": "vmxon R:m64" , "op": "F3 0F C7 /6" , "ext": "VMX" , "privilege": "L0"}
]},
{"category": "VIRTUALIZATION", "volatile": true, "data": [
{"inst": "vmmcall" , "op": "0F 01 D9" , "ext": "SVM"},
{"inst": "clgi" , "op": "0F 01 DD" , "ext": "SVM" , "privilege": "L0"},
{"inst": "invlpga R:<eax>, R:<ecx>" , "op": "0F 01 DF" , "ext": "SVM" , "privilege": "L0", "arch": "X86"},
{"inst": "invlpga R:<eax>, R:<ecx>" , "op": "67 0F 01 DF" , "ext": "SVM" , "privilege": "L0", "arch": "X64"},
{"inst": "invlpga R:<rax>, R:<ecx>" , "op": "0F 01 DF" , "ext": "SVM" , "privilege": "L0", "arch": "X64"},
{"inst": "invlpgb R:<eax>, R:<edx>, R:<ecx>" , "op": "0F 01 FE" , "ext": "INVLPGB" , "privilege": "L0", "arch": "X86"},
{"inst": "invlpgb R:<eax>, R:<edx>, R:<ecx>" , "op": "67 0F 01 FE" , "ext": "INVLPGB" , "privilege": "L0", "arch": "X64"},
{"inst": "invlpgb R:<rax>, R:<edx>, R:<ecx>" , "op": "0F 01 FE" , "ext": "INVLPGB" , "privilege": "L0", "arch": "X64"},
{"inst": "psmash" , "op": "F3 0F 01 FF" , "ext": "SEV_SNP" , "io": "OF=W SF=W ZF=W AF=W PF=W", "arch": "X64"},
{"inst": "pvalidate" , "op": "F2 0F 01 FF" , "ext": "SEV_SNP" , "io": "OF=W SF=W ZF=W AF=W PF=W CF=W"},
{"inst": "rmpadjust" , "op": "F3 0F 01 FE" , "ext": "SEV_SNP" , "io": "OF=W SF=W ZF=W AF=W PF=W", "arch": "X64"},
{"inst": "rmpquery R:<rax>, W:<rcx>, W:<rdx>" , "op": "F3 0F 01 FD" , "ext": "RMPQUERY", "io": "OF=W SF=W ZF=W AF=W PF=W", "arch": "X64"},
{"inst": "rmpupdate" , "op": "F2 0F 01 FE" , "ext": "SEV_SNP" , "io": "OF=W SF=W ZF=W AF=W PF=W", "arch": "X64"},
{"inst": "skinit X:<eax>" , "op": "0F 01 DE" , "ext": "SKINIT"},
{"inst": "stgi" , "op": "0F 01 DC" , "ext": "SKINIT"},
{"inst": "tlbsync" , "op": "0F 01 FF" , "ext": "INVLPGB" , "privilege": "L0"},
{"inst": "vmgexit" , "op": "F2 0F 01 D9" , "ext": "SEV_ES"},
{"inst": "vmload R:<eax>" , "op": "0F 01 DA" , "ext": "SVM" , "privilege": "L0", "arch": "X86"},
{"inst": "vmload R:<rax>" , "op": "0F 01 DA" , "ext": "SVM" , "privilege": "L0", "arch": "X64"},
{"inst": "vmmcall" , "op": "0F 01 D9" , "ext": "SVM"},
{"inst": "vmrun X:<eax>" , "op": "0F 01 D8" , "ext": "SVM" , "privilege": "L0", "arch": "X86"},
{"inst": "vmrun X:<rax>" , "op": "0F 01 D8" , "ext": "SVM" , "privilege": "L0", "arch": "X64"},
{"inst": "vmsave R:<eax>" , "op": "0F 01 DB" , "ext": "SVM" , "privilege": "L0", "arch": "X86"},
{"inst": "vmsave R:<rax>" , "op": "0F 01 DB" , "ext": "SVM" , "privilege": "L0", "arch": "X64"}
]},
{"category": "FPU", "ext": "FPU", "data": [
{"inst": "f2xm1" , "op": "D9 F0" , "io": "C0=U C1=W C2=U C3=U"},
{"inst": "fabs" , "op": "D9 E1" , "io": "C0=U C1=0 C2=U C3=U"},
{"inst": "fadd R:m32fp" , "op": "D8 /0" , "io": "C0=U C1=W C2=U C3=U"},
{"inst": "fadd R:m64fp" , "op": "DC /0" , "io": "C0=U C1=W C2=U C3=U"},
{"inst": "fadd st(0), st(i)" , "op": "D8 C0+i" , "io": "C0=U C1=W C2=U C3=U"},
{"inst": "fadd st(i), st(0)" , "op": "DC C0+i" , "io": "C0=U C1=W C2=U C3=U"},
{"inst": "faddp" , "op": "DE C1" , "io": "C0=U C1=W C2=U C3=U", "fpuStack": "pop"},
{"inst": "faddp st(i)" , "op": "DE C0+i" , "io": "C0=U C1=W C2=U C3=U", "fpuStack": "pop"},
{"inst": "fbld R:m80dec" , "op": "DF /4" , "io": "C0=U C1=W C2=U C3=U", "fpuStack": "push"},
{"inst": "fbstp W:m80bcd" , "op": "DF /6" , "io": "C0=U C1=W C2=U C3=U", "fpuStack": "pop"},
{"inst": "fchs" , "op": "D9 E0" , "io": "C0=U C1=0 C2=U C3=U"},
{"inst": "fclex" , "op": "9B DB E2" , "io": "C0=U C1=U C2=U C3=U"},
{"inst": "fcmovb st(i)" , "op": "DA C0+i" , "io": "C0=U C1=W C2=U C3=U CF=R" , "ext": "CMOV"},
{"inst": "fcmovbe st(i)" , "op": "DA D0+i" , "io": "C0=U C1=W C2=U C3=U CF=R ZF=R", "ext": "CMOV"},
{"inst": "fcmove st(i)" , "op": "DA C8+i" , "io": "C0=U C1=W C2=U C3=U ZF=R" , "ext": "CMOV"},
{"inst": "fcmovnb st(i)" , "op": "DB C0+i" , "io": "C0=U C1=W C2=U C3=U CF=R" , "ext": "CMOV"},
{"inst": "fcmovnbe st(i)" , "op": "DB D0+i" , "io": "C0=U C1=W C2=U C3=U CF=R ZF=R", "ext": "CMOV"},
{"inst": "fcmovne st(i)" , "op": "DB C8+i" , "io": "C0=U C1=W C2=U C3=U ZF=R" , "ext": "CMOV"},
{"inst": "fcmovnu st(i)" , "op": "DB D8+i" , "io": "C0=U C1=W C2=U C3=U PF=R" , "ext": "CMOV"},
{"inst": "fcmovu st(i)" , "op": "DA D8+i" , "io": "C0=U C1=W C2=U C3=U PF=R" , "ext": "CMOV"},
{"inst": "fcom" , "op": "D8 D1" , "io": "C0=W C1=0 C2=W C3=W"},
{"inst": "fcom R:m32fp" , "op": "D8 /2" , "io": "C0=W C1=0 C2=W C3=W"},
{"inst": "fcom R:m64fp" , "op": "DC /2" , "io": "C0=W C1=0 C2=W C3=W"},
{"inst": "fcom R:st(i)" , "op": "D8 D0+i" , "io": "C0=W C1=0 C2=W C3=W"},
{"inst": "fcomi R:st(i)" , "op": "DB F0+i" , "io": "C1=0 ZF=W PF=W CF=W"},
{"inst": "fcomip R:st(i)" , "op": "DF F0+i" , "io": "C1=0 ZF=W PF=W CF=W", "fpuStack": "pop"},
{"inst": "fcomp" , "op": "D8 D9" , "io": "C0=W C1=W C2=W C3=W", "fpuStack": "pop"},
{"inst": "fcomp R:m32fp" , "op": "D8 /3" , "io": "C0=W C1=W C2=W C3=W", "fpuStack": "pop"},
{"inst": "fcomp R:m64fp" , "op": "DC /3" , "io": "C0=W C1=W C2=W C3=W", "fpuStack": "pop"},
{"inst": "fcomp R:st(i)" , "op": "D8 D8+i" , "io": "C0=W C1=W C2=W C3=W", "fpuStack": "pop"},
{"inst": "fcompp" , "op": "DE D9" , "io": "C0=W C1=W C2=W C3=W", "fpuStack": "pop2x"},
{"inst": "fcos" , "op": "D9 FF" , "io": "C0=U C1=W C2=W C3=U"},
{"inst": "fdecstp" , "op": "D9 F6" , "io": "C0=U C1=W C2=U C3=U", "fpuStack": "dec"},
{"inst": "fdiv R:m32fp" , "op": "D8 /6" , "io": "C0=U C1=W C2=U C3=U"},
{"inst": "fdiv R:m64fp" , "op": "DC /6" , "io": "C0=U C1=W C2=U C3=U"},
{"inst": "fdiv st(0), st(i)" , "op": "D8 F0+i" , "io": "C0=U C1=W C2=U C3=U"},
{"inst": "fdiv st(i), st(0)" , "op": "DC F8+i" , "io": "C0=U C1=W C2=U C3=U"},
{"inst": "fdivp" , "op": "DE F9" , "io": "C0=U C1=W C2=U C3=U", "fpuStack": "pop"},
{"inst": "fdivp st(i)" , "op": "DE F8+i" , "io": "C0=U C1=W C2=U C3=U", "fpuStack": "pop"},
{"inst": "fdivr R:m32fp" , "op": "D8 /7" , "io": "C0=U C1=W C2=U C3=U"},
{"inst": "fdivr R:m64fp" , "op": "DC /7" , "io": "C0=U C1=W C2=U C3=U"},
{"inst": "fdivr st(0), st(i)" , "op": "D8 F8+i" , "io": "C0=U C1=W C2=U C3=U"},
{"inst": "fdivr st(i), st(0)" , "op": "DC F0+i" , "io": "C0=U C1=W C2=U C3=U"},
{"inst": "fdivrp" , "op": "DE F1" , "io": "C0=U C1=W C2=U C3=U", "fpuStack": "pop"},
{"inst": "fdivrp st(i)" , "op": "DE F0+i" , "io": "C0=U C1=W C2=U C3=U", "fpuStack": "pop"},
{"inst": "ffree st(i)" , "op": "DD C0+i" , "io": "C0=U C1=U C2=U C3=U"},
{"inst": "fiadd R:m16int" , "op": "DE /0" , "io": "C0=U C1=W C2=U C3=U"},
{"inst": "fiadd R:m32int" , "op": "DA /0" , "io": "C0=U C1=W C2=U C3=U"},
{"inst": "ficom R:m16int" , "op": "DE /2" , "io": "C0=W C1=0 C2=W C3=W"},
{"inst": "ficom R:m32int" , "op": "DA /2" , "io": "C0=W C1=0 C2=W C3=W"},
{"inst": "ficomp R:m16int" , "op": "DE /3" , "io": "C0=W C1=0 C2=W C3=W"},
{"inst": "ficomp R:m32int" , "op": "DA /3" , "io": "C0=W C1=0 C2=W C3=W"},
{"inst": "fidiv R:m16int" , "op": "DE /6" , "io": "C0=U C1=W C2=U C3=U"},
{"inst": "fidiv R:m32int" , "op": "DA /6" , "io": "C0=U C1=W C2=U C3=U"},
{"inst": "fidivr R:m16int" , "op": "DE /7" , "io": "C0=U C1=W C2=U C3=U"},
{"inst": "fidivr R:m32int" , "op": "DA /7" , "io": "C0=U C1=W C2=U C3=U"},
{"inst": "fild R:m16int" , "op": "DF /0" , "io": "C0=U C1=W C2=U C3=U", "fpuStack": "push"},
{"inst": "fild R:m32int" , "op": "DB /0" , "io": "C0=U C1=W C2=U C3=U", "fpuStack": "push"},
{"inst": "fild R:m64int" , "op": "DF /5" , "io": "C0=U C1=W C2=U C3=U", "fpuStack": "push"},
{"inst": "fimul R:m16int" , "op": "DE /1" , "io": "C0=U C1=W C2=U C3=U"},
{"inst": "fimul R:m32int" , "op": "DA /1" , "io": "C0=U C1=W C2=U C3=U"},
{"inst": "fincstp" , "op": "D9 F7" , "io": "C0=U C1=0 C2=U C3=U", "fpuStack": "inc"},
{"inst": "finit" , "op": "9B DB E3" , "io": "C0=0 C1=0 C2=0 C3=0"},
{"inst": "fist W:m16int" , "op": "DF /2" , "io": "C0=U C1=W C2=U C3=U"},
{"inst": "fist W:m32int" , "op": "DB /2" , "io": "C0=U C1=W C2=U C3=U"},
{"inst": "fistp W:m16int" , "op": "DF /3" , "io": "C0=U C1=W C2=U C3=U", "fpuStack": "pop"},
{"inst": "fistp W:m32int" , "op": "DB /3" , "io": "C0=U C1=W C2=U C3=U", "fpuStack": "pop"},
{"inst": "fistp W:m64int" , "op": "DF /7" , "io": "C0=U C1=W C2=U C3=U", "fpuStack": "pop"},
{"inst": "fisttp W:m16int" , "op": "DF /1" , "io": "C0=U C1=0 C2=U C3=U", "fpuStack": "pop", "ext": "SSE3"},
{"inst": "fisttp W:m32int" , "op": "DB /1" , "io": "C0=U C1=0 C2=U C3=U", "fpuStack": "pop", "ext": "SSE3"},
{"inst": "fisttp W:m64int" , "op": "DD /1" , "io": "C0=U C1=0 C2=U C3=U", "fpuStack": "pop", "ext": "SSE3"},
{"inst": "fisub R:m16int" , "op": "DE /4" , "io": "C0=U C1=W C2=U C3=U"},
{"inst": "fisub R:m32int" , "op": "DA /4" , "io": "C0=U C1=W C2=U C3=U"},
{"inst": "fisubr R:m16int" , "op": "DE /5" , "io": "C0=U C1=W C2=U C3=U"},
{"inst": "fisubr R:m32int" , "op": "DA /5" , "io": "C0=U C1=W C2=U C3=U"},
{"inst": "fld R:m32fp" , "op": "D9 /0" , "io": "C0=U C1=W C2=U C3=U", "fpuStack": "push"},
{"inst": "fld R:m64fp" , "op": "DD /0" , "io": "C0=U C1=W C2=U C3=U", "fpuStack": "push"},
{"inst": "fld R:m80fp" , "op": "DB /5" , "io": "C0=U C1=W C2=U C3=U", "fpuStack": "push"},
{"inst": "fld R:st(i)" , "op": "D9 C0+i" , "io": "C0=U C1=W C2=U C3=U", "fpuStack": "push"},
{"inst": "fld1" , "op": "D9 E8" , "io": "C0=U C1=W C2=U C3=U", "fpuStack": "push"},
{"inst": "fldcw R:m16" , "op": "D9 /5" , "io": "C0=U C1=U C2=U C3=U"},
{"inst": "fldenv R:mem" , "op": "D9 /4" , "io": "C0=W C1=W C2=W C3=W"},
{"inst": "fldl2e" , "op": "D9 EA" , "io": "C0=U C1=W C2=U C3=U", "fpuStack": "push"},
{"inst": "fldl2t" , "op": "D9 E9" , "io": "C0=U C1=W C2=U C3=U", "fpuStack": "push"},
{"inst": "fldlg2" , "op": "D9 EC" , "io": "C0=U C1=W C2=U C3=U", "fpuStack": "push"},
{"inst": "fldln2" , "op": "D9 ED" , "io": "C0=U C1=W C2=U C3=U", "fpuStack": "push"},
{"inst": "fldpi" , "op": "D9 EB" , "io": "C0=U C1=W C2=U C3=U", "fpuStack": "push"},
{"inst": "fldz" , "op": "D9 EE" , "io": "C0=U C1=W C2=U C3=U", "fpuStack": "push"},
{"inst": "fmul R:m32fp" , "op": "D8 /1" , "io": "C0=U C1=W C2=U C3=U"},
{"inst": "fmul R:m64fp" , "op": "DC /1" , "io": "C0=U C1=W C2=U C3=U"},
{"inst": "fmul st(0), st(i)" , "op": "D8 C8+i" , "io": "C0=U C1=W C2=U C3=U"},
{"inst": "fmul st(i), st(0)" , "op": "DC C8+i" , "io": "C0=U C1=W C2=U C3=U"},
{"inst": "fmulp" , "op": "DE C9" , "io": "C0=U C1=W C2=U C3=U", "fpuStack": "pop"},
{"inst": "fmulp st(i)" , "op": "DE C8+i" , "io": "C0=U C1=W C2=U C3=U", "fpuStack": "pop"},
{"inst": "fnclex" , "op": "DB E2" , "io": "C0=U C1=U C2=U C3=U"},
{"inst": "fninit" , "op": "DB E3" , "io": "C0=0 C1=0 C2=0 C3=0"},
{"inst": "fnop" , "op": "D9 D0" , "io": "C0=U C1=U C2=U C3=U"},
{"inst": "fnsave W:mem" , "op": "DD /6" , "io": "C0=W C1=W C2=W C3=W"},
{"inst": "fnstcw W:m16" , "op": "D9 /7" , "io": "C0=U C1=U C2=U C3=U"},
{"inst": "fnstenv W:mem" , "op": "D9 /6" , "io": "C0=U C1=U C2=U C3=U"},
{"inst": "fnstsw w:ax" , "op": "DF E0" , "io": "C0=U C1=U C2=U C3=U"},
{"inst": "fnstsw W:m16" , "op": "DD /7" , "io": "C0=U C1=U C2=U C3=U"},
{"inst": "fpatan" , "op": "D9 F3" , "io": "C0=U C1=W C2=U C3=U", "fpuStack": "pop"},
{"inst": "fprem" , "op": "D9 F8" , "io": "C0=U C1=W C2=U C3=U"},
{"inst": "fprem1" , "op": "D9 F5" , "io": "C0=W C1=W C2=W C3=W"},
{"inst": "fptan" , "op": "D9 F2" , "io": "C0=U C1=W C2=W C3=U", "fpuStack": "pop"},
{"inst": "frndint" , "op": "D9 FC" , "io": "C0=U C1=W C2=U C3=U"},
{"inst": "frstor R:mem" , "op": "DD /4" , "io": "C0=W C1=W C2=W C3=W"},
{"inst": "fsave W:mem" , "op": "9B DD /6" , "io": "C0=W C1=W C2=W C3=W"},
{"inst": "fscale" , "op": "D9 FD" , "io": "C0=U C1=W C2=U C3=U"},
{"inst": "fsin" , "op": "D9 FE" , "io": "C0=U C1=W C2=W C3=U"},
{"inst": "fsincos" , "op": "D9 FB" , "io": "C0=U C1=W C2=W C3=U", "fpuStack": "push"},
{"inst": "fsqrt" , "op": "D9 FE" , "io": "C0=U C1=W C2=U C3=U"},
{"inst": "fst W:m32fp" , "op": "D9 /2" , "io": "C0=U C1=W C2=U C3=U"},
{"inst": "fst W:m64fp" , "op": "DD /2" , "io": "C0=U C1=W C2=U C3=U"},
{"inst": "fst W:st(i)" , "op": "DD D0+i" , "io": "C0=U C1=W C2=U C3=U"},
{"inst": "fstcw W:m16" , "op": "9B D9 /7" , "io": "C0=U C1=U C2=U C3=U"},
{"inst": "fstenv W:mem" , "op": "9B D9 /6" , "io": "C0=U C1=U C2=U C3=U"},
{"inst": "fstp W:m32fp" , "op": "D9 /3" , "io": "C0=U C1=W C2=U C3=U", "fpuStack": "pop"},
{"inst": "fstp W:m64fp" , "op": "DD /3" , "io": "C0=U C1=W C2=U C3=U", "fpuStack": "pop"},
{"inst": "fstp W:m80fp" , "op": "DB /7" , "io": "C0=U C1=W C2=U C3=U", "fpuStack": "pop"},
{"inst": "fstp W:st(i)" , "op": "DD D8+i" , "io": "C0=U C1=W C2=U C3=U", "fpuStack": "pop"},
{"inst": "fstsw w:ax" , "op": "9B DF E0" , "io": "C0=U C1=U C2=U C3=U"},
{"inst": "fstsw W:m16" , "op": "9B DD /7" , "io": "C0=U C1=U C2=U C3=U"},
{"inst": "fsub R:m32fp" , "op": "D8 /4" , "io": "C0=U C1=W C2=U C3=U"},
{"inst": "fsub R:m64fp" , "op": "DC /4" , "io": "C0=U C1=W C2=U C3=U"},
{"inst": "fsub st(0), st(i)" , "op": "D8 E0+i" , "io": "C0=U C1=W C2=U C3=U"},
{"inst": "fsub st(i), st(0)" , "op": "DC E8+i" , "io": "C0=U C1=W C2=U C3=U"},
{"inst": "fsubp" , "op": "DE E9" , "io": "C0=U C1=W C2=U C3=U", "fpuStack": "pop"},
{"inst": "fsubp st(i)" , "op": "DE E8+i" , "io": "C0=U C1=W C2=U C3=U", "fpuStack": "pop"},
{"inst": "fsubr R:m32fp" , "op": "D8 /5" , "io": "C0=U C1=W C2=U C3=U"},
{"inst": "fsubr R:m64fp" , "op": "DC /5" , "io": "C0=U C1=W C2=U C3=U"},
{"inst": "fsubr st(0), st(i)" , "op": "D8 E8+i" , "io": "C0=U C1=W C2=U C3=U"},
{"inst": "fsubr st(i), st(0)" , "op": "DC E0+i" , "io": "C0=U C1=W C2=U C3=U"},
{"inst": "fsubrp" , "op": "DE E1" , "io": "C0=U C1=W C2=U C3=U", "fpuStack": "pop"},
{"inst": "fsubrp st(i)" , "op": "DE E0+i" , "io": "C0=U C1=W C2=U C3=U", "fpuStack": "pop"},
{"inst": "ftst" , "op": "D9 E4" , "io": "C0=W C1=0 C2=W C3=W"},
{"inst": "fucom" , "op": "DD E1" , "io": "C0=W C1=0 C2=W C3=W"},
{"inst": "fucom R:st(i)" , "op": "DD E0+i" , "io": "C0=W C1=0 C2=W C3=W"},
{"inst": "fucomi R:st(i)" , "op": "DB E8+i" , "io": "C1=0 ZF=W PF=W CF=W"},
{"inst": "fucomip R:st(i)" , "op": "DF E8+i" , "io": "C1=0 ZF=W PF=W CF=W", "fpuStack": "pop"},
{"inst": "fucomp" , "op": "DD E9" , "io": "C0=W C1=W C2=W C3=W", "fpuStack": "pop"},
{"inst": "fucomp R:st(i)" , "op": "DD E8+i" , "io": "C0=W C1=W C2=W C3=W", "fpuStack": "pop"},
{"inst": "fucompp" , "op": "DA E9" , "io": "C0=W C1=W C2=W C3=W", "fpuStack": "pop2x"},
{"inst": "fwait|wait" , "op": "9B" , "io": "C0=U C1=U C2=U C3=U"},
{"inst": "fxam" , "op": "D9 E5" , "io": "C0=W C1=W C2=W C3=W"},
{"inst": "fxch" , "op": "D9 C9" , "io": "C0=U C1=0 C2=U C3=U"},
{"inst": "fxch st(i)" , "op": "D9 C8+i" , "io": "C0=U C1=0 C2=U C3=U"},
{"inst": "fxtract" , "op": "D9 F4" , "io": "C0=U C1=W C2=U C3=U", "fpuStack": "push"},
{"inst": "fyl2x" , "op": "D9 F1" , "io": "C0=U C1=W C2=U C3=U", "fpuStack": "pop"},
{"inst": "fyl2xp1" , "op": "D9 F9" , "io": "C0=U C1=W C2=U C3=U", "fpuStack": "pop"}
]},
{"category": "MMX STATE", "deprecated": true, "volatile": true, "data": [
{"inst": "emms" , "op": "0F 77" , "ext": "MMX"},
{"inst": "femms" , "op": "0F 0E" , "ext": "3DNOW"}
]},
{"category": "MMX SIMD", "ext": "MMX", "deprecated": true, "data": [
{"inst": "movd W:mm[31:0], R:r32[31:0]/m32" , "op": "RM: 0F 6E /r"},
{"inst": "movd W:r32[31:0]/m32, R:mm[31:0]" , "op": "MR: 0F 7E /r"},
{"inst": "movq W:mm, mm/m64" , "op": "RM: 0F 6F /r"},
{"inst": "movq W:mm, r64/m64" , "op": "RM: REX.W 0F 6E /r"},
{"inst": "movq W:mm/m64, mm" , "op": "MR: 0F 7F /r"},
{"inst": "movq W:r64/m64, mm" , "op": "MR: REX.W 0F 7E /r"},
{"inst": "packssdw X:mm, mm/m64" , "op": "RM: 0F 6B /r"},
{"inst": "packsswb X:mm, mm/m64" , "op": "RM: 0F 63 /r"},
{"inst": "packuswb X:mm, mm/m64" , "op": "RM: 0F 67 /r"},
{"inst": "paddb X:~mm, ~mm/m64" , "op": "RM: 0F FC /r"},
{"inst": "paddd X:~mm, ~mm/m64" , "op": "RM: 0F FE /r"},
{"inst": "paddsb X:~mm, ~mm/m64" , "op": "RM: 0F EC /r"},
{"inst": "paddsw X:~mm, ~mm/m64" , "op": "RM: 0F ED /r"},
{"inst": "paddusb X:~mm, ~mm/m64" , "op": "RM: 0F DC /r"},
{"inst": "paddusw X:~mm, ~mm/m64" , "op": "RM: 0F DD /r"},
{"inst": "paddw X:~mm, ~mm/m64" , "op": "RM: 0F FD /r"},
{"inst": "pand X:~mm, ~mm/m64" , "op": "RM: 0F DB /r"},
{"inst": "pandn X:mm, mm/m64" , "op": "RM: 0F DF /r"},
{"inst": "pcmpeqb X:~mm, ~mm/m64" , "op": "RM: 0F 74 /r"},
{"inst": "pcmpeqd X:~mm, ~mm/m64" , "op": "RM: 0F 76 /r"},
{"inst": "pcmpeqw X:~mm, ~mm/m64" , "op": "RM: 0F 75 /r"},
{"inst": "pcmpgtb X:mm, mm/m64" , "op": "RM: 0F 64 /r"},
{"inst": "pcmpgtd X:mm, mm/m64" , "op": "RM: 0F 66 /r"},
{"inst": "pcmpgtw X:mm, mm/m64" , "op": "RM: 0F 65 /r"},
{"inst": "pmaddwd X:~mm, ~mm/m64" , "op": "RM: 0F F5 /r"},
{"inst": "pmulhw X:~mm, ~mm/m64" , "op": "RM: 0F E5 /r"},
{"inst": "pmullw X:~mm, ~mm/m64" , "op": "RM: 0F D5 /r"},
{"inst": "por X:~mm, ~mm/m64" , "op": "RM: 0F EB /r"},
{"inst": "pslld X:mm, ib/ub" , "op": "M: 0F 72 /6 ib"},
{"inst": "pslld X:mm, mm/m64" , "op": "RM: 0F F2 /r"},
{"inst": "psllq X:mm, ib/ub" , "op": "M: 0F 73 /6 ib"},
{"inst": "psllq X:mm, mm/m64" , "op": "RM: 0F F3 /r"},
{"inst": "psllw X:mm, ib/ub" , "op": "M: 0F 71 /6 ib"},
{"inst": "psllw X:mm, mm/m64" , "op": "RM: 0F F1 /r"},
{"inst": "psrad X:mm, ib/ub" , "op": "M: 0F 72 /4 ib"},
{"inst": "psrad X:mm, mm/m64" , "op": "RM: 0F E2 /r"},
{"inst": "psraw X:mm, ib/ub" , "op": "M: 0F 71 /4 ib"},
{"inst": "psraw X:mm, mm/m64" , "op": "RM: 0F E1 /r"},
{"inst": "psrld X:mm, ib/ub" , "op": "M: 0F 72 /2 ib"},
{"inst": "psrld X:mm, mm/m64" , "op": "RM: 0F D2 /r"},
{"inst": "psrlq X:mm, ib/ub" , "op": "M: 0F 73 /2 ib"},
{"inst": "psrlq X:mm, mm/m64" , "op": "RM: 0F D3 /r"},
{"inst": "psrlw X:mm, ib/ub" , "op": "M: 0F 71 /2 ib"},
{"inst": "psrlw X:mm, mm/m64" , "op": "RM: 0F D1 /r"},
{"inst": "psubb X:mm, mm/m64" , "op": "RM: 0F F8 /r"},
{"inst": "psubd X:mm, mm/m64" , "op": "RM: 0F FA /r"},
{"inst": "psubsb X:mm, mm/m64" , "op": "RM: 0F E8 /r"},
{"inst": "psubsw X:mm, mm/m64" , "op": "RM: 0F E9 /r"},
{"inst": "psubusb X:mm, mm/m64" , "op": "RM: 0F D8 /r"},
{"inst": "psubusw X:mm, mm/m64" , "op": "RM: 0F D9 /r"},
{"inst": "psubw X:mm, mm/m64" , "op": "RM: 0F F9 /r"},
{"inst": "punpckhbw X:mm, mm/m64" , "op": "RM: 0F 68 /r"},
{"inst": "punpckhdq X:mm, mm/m64" , "op": "RM: 0F 6A /r"},
{"inst": "punpckhwd X:mm, mm/m64" , "op": "RM: 0F 69 /r"},
{"inst": "punpcklbw X:mm, mm/m32" , "op": "RM: 0F 60 /r"},
{"inst": "punpckldq X:mm, mm/m32" , "op": "RM: 0F 62 /r"},
{"inst": "punpcklwd X:mm, mm/m32" , "op": "RM: 0F 61 /r"},
{"inst": "pxor X:~mm, ~mm/m64" , "op": "RM: 0F EF /r"}
]},
{"category": "MMX SIMD", "ext": "MMX2", "deprecated": true, "data": [
{"inst": "maskmovq R:mm, mm, X:<m64(ds:zdi)>" , "op": "RM: 0F F7 /r"},
{"inst": "movntq W:m64, mm" , "op": "MR: 0F E7 /r"},
{"inst": "pavgb X:~mm, ~mm/m64" , "op": "RM: 0F E0 /r"},
{"inst": "pavgw X:~mm, ~mm/m64" , "op": "RM: 0F E3 /r"},
{"inst": "pextrw W:r32[15:0], mm, ib/ub" , "op": "RM: 0F C5 /r ib"},
{"inst": "pinsrw X:mm, r32[15:0]/m16, ib/ub" , "op": "RM: 0F C4 /r ib"},
{"inst": "pmaxsw X:~mm, ~mm/m64" , "op": "RM: 0F EE /r"},
{"inst": "pmaxub X:~mm, ~mm/m64" , "op": "RM: 0F DE /r"},
{"inst": "pminsw X:~mm, ~mm/m64" , "op": "RM: 0F EA /r"},
{"inst": "pminub X:~mm, ~mm/m64" , "op": "RM: 0F DA /r"},
{"inst": "pmovmskb W:r32[7:0], mm" , "op": "RM: 0F D7 /r"},
{"inst": "pmulhuw X:~mm, ~mm/m64" , "op": "RM: 0F E4 /r"},
{"inst": "psadbw X:~mm, ~mm/m64" , "op": "RM: 0F F6 /r"},
{"inst": "pshufw W:mm, mm/m64, ib/ub" , "op": "RM: 0F 70 /r ib"}
]},
{"category": "MMX SIMD", "ext": "3DNOW", "deprecated": true, "data": [
{"inst": "pavgusb X:mm, mm/m64" , "op": "RM: 0F 0F /r BF"},
{"inst": "pf2id W:mm, mm/m64" , "op": "RM: 0F 0F /r 1D"},
{"inst": "pfacc X:mm, mm/m64" , "op": "RM: 0F 0F /r AE"},
{"inst": "pfadd X:mm, mm/m64" , "op": "RM: 0F 0F /r 9E"},
{"inst": "pfcmpeq X:mm, mm/m64" , "op": "RM: 0F 0F /r B0"},
{"inst": "pfcmpge X:mm, mm/m64" , "op": "RM: 0F 0F /r 90"},
{"inst": "pfcmpgt X:mm, mm/m64" , "op": "RM: 0F 0F /r A0"},
{"inst": "pfmax X:mm, mm/m64" , "op": "RM: 0F 0F /r A4"},
{"inst": "pfmin X:mm, mm/m64" , "op": "RM: 0F 0F /r 94"},
{"inst": "pfmul X:mm, mm/m64" , "op": "RM: 0F 0F /r B4"},
{"inst": "pfrcp W:mm, mm/m64" , "op": "RM: 0F 0F /r 96"},
{"inst": "pfrcpit1 X:mm, mm/m64" , "op": "RM: 0F 0F /r A6"},
{"inst": "pfrcpit2 X:mm, mm/m64" , "op": "RM: 0F 0F /r B6"},
{"inst": "pfrsqit1 W:mm, mm/m64" , "op": "RM: 0F 0F /r A7"},
{"inst": "pfrsqrt W:mm, mm/m64" , "op": "RM: 0F 0F /r 97"},
{"inst": "pfsub X:mm, mm/m64" , "op": "RM: 0F 0F /r 9A"},
{"inst": "pfsubr X:mm, mm/m64" , "op": "RM: 0F 0F /r AA"},
{"inst": "pi2fd W:mm, mm/m64" , "op": "RM: 0F 0F /r 0D"},
{"inst": "pmulhrw X:mm, mm/m64" , "op": "RM: 0F 0F /r B7"}
]},
{"category": "MMX SIMD", "ext": "3DNOW2", "deprecated": true, "data": [
{"inst": "pf2iw W:mm, mm/m64" , "op": "RM: 0F 0F /r 1C"},
{"inst": "pfnacc X:mm, mm/m64" , "op": "RM: 0F 0F /r 8A"},
{"inst": "pfpnacc X:mm, mm/m64" , "op": "RM: 0F 0F /r 8E"},
{"inst": "pi2fw W:mm, mm/m64" , "op": "RM: 0F 0F /r 0C"},
{"inst": "pswapd W:mm, mm/m64" , "op": "RM: 0F 0F /r BB"}
]},
{"category": "MMX SIMD", "ext": "GEODE", "deprecated": true, "data": [
{"inst": "pfrcpv X:mm, mm/m64" , "op": "RM: 0F 0F /r 86"},
{"inst": "pfrsqrtv X:mm, mm/m64" , "op": "RM: 0F 0F /r 87"}
]},
{"category": "SSE STATE", "ext": "SSE", "data": [
{"inst": "ldmxcsr R:m32" , "op": "0F AE /2", "io": "MXCSR=W"},
{"inst": "stmxcsr W:m32" , "op": "0F AE /3", "io": "MXCSR=R"}
]},
{"category": "SSE SCALAR", "ext": "SSE", "data": [
{"inst": "addss x:xmm[31:0], xmm[31:0]/m32" , "op": "RM: F3 0F 58 /r"},
{"inst": "cmpss x:xmm[31:0], xmm[31:0]/m32, ib/ub" , "op": "RM: F3 0F C2 /r ib"},
{"inst": "comiss R:xmm[31:0], xmm[31:0]/m32" , "op": "RM: 0F 2F /r", "io": "OF=0 SF=0 ZF=W AF=0 PF=W CF=W"},
{"inst": "cvtsi2ss w:xmm[31:0], r64/m64" , "op": "RM: REX.W F3 0F 2A /r"},
{"inst": "cvtsi2ss w:xmm[31:0], r32/m32" , "op": "RM: F3 0F 2A /r"},
{"inst": "cvtss2si W:r32, xmm[31:0]/m32" , "op": "RM: F3 0F 2D /r"},
{"inst": "cvtss2si W:r64, xmm[31:0]/m32" , "op": "RM: REX.W F3 0F 2D /r"},
{"inst": "cvttss2si W:r64, xmm[31:0]/m32" , "op": "RM: REX.W F3 0F 2C /r"},
{"inst": "cvttss2si W:r32, xmm[31:0]/m32" , "op": "RM: F3 0F 2C /r"},
{"inst": "divss x:xmm[31:0], xmm[31:0]/m32" , "op": "RM: F3 0F 5E /r"},
{"inst": "maxss x:xmm[31:0], xmm[31:0]/m32" , "op": "RM: F3 0F 5F /r"},
{"inst": "minss x:xmm[31:0], xmm[31:0]/m32" , "op": "RM: F3 0F 5D /r"},
{"inst": "movss w:xmm[31:0], xmm[31:0]" , "op": "RM: F3 0F 10 /r"},
{"inst": "movss W:xmm[31:0], m32" , "op": "RM: F3 0F 10 /r"},
{"inst": "movss W:m32, xmm[31:0]" , "op": "MR: F3 0F 11 /r"},
{"inst": "mulss x:xmm[31:0], xmm[31:0]/m32" , "op": "RM: F3 0F 59 /r"},
{"inst": "rcpss w:xmm[31:0], xmm[31:0]/m32" , "op": "RM: F3 0F 53 /r"},
{"inst": "rsqrtss w:xmm[31:0], xmm[31:0]/m32" , "op": "RM: F3 0F 52 /r"},
{"inst": "sqrtss w:xmm[31:0], xmm[31:0]/m32" , "op": "RM: F3 0F 51 /r"},
{"inst": "subss x:xmm[31:0], xmm[31:0]/m32" , "op": "RM: F3 0F 5C /r"},
{"inst": "ucomiss R:xmm[31:0], xmm[31:0]/m32" , "op": "RM: 0F 2E /r", "io": "OF=0 SF=0 ZF=W AF=0 PF=W CF=W"}
]},
{"category": "SSE SIMD", "ext": "SSE", "data": [
{"inst": "addps X:~xmm, ~xmm/m128" , "op": "RM: 0F 58 /r"},
{"inst": "andnps X:xmm, xmm/m128" , "op": "RM: 0F 55 /r"},
{"inst": "andps X:~xmm, ~xmm/m128" , "op": "RM: 0F 54 /r"},
{"inst": "cmpps X:xmm, xmm/m128, ib/ub" , "op": "RM: 0F C2 /r ib"},
{"inst": "cvtpi2ps w:xmm[63:0], mm/m64" , "op": "RM: 0F 2A /r"},
{"inst": "cvtps2pi W:mm, xmm[63:0]/m64" , "op": "RM: 0F 2D /r"},
{"inst": "cvttps2pi W:mm, xmm[63:0]/m64" , "op": "RM: 0F 2C /r"},
{"inst": "divps X:xmm, xmm/m128" , "op": "RM: 0F 5E /r"},
{"inst": "maxps X:xmm, xmm/m128" , "op": "RM: 0F 5F /r"},
{"inst": "minps X:xmm, xmm/m128" , "op": "RM: 0F 5D /r"},
{"inst": "movaps W:xmm, xmm/m128" , "op": "RM: 0F 28 /r"},
{"inst": "movaps W:xmm/m128, xmm" , "op": "MR: 0F 29 /r"},
{"inst": "movhlps w:xmm[63:0], xmm[127:64]" , "op": "RM: 0F 12 /r"},
{"inst": "movhps W:m64, xmm[127:64]" , "op": "MR: 0F 17 /r"},
{"inst": "movhps w:xmm[127:64], m64" , "op": "RM: 0F 16 /r"},
{"inst": "movlhps w:xmm[127:64], xmm[63:0]" , "op": "RM: 0F 16 /r"},
{"inst": "movlps W:m64, xmm[63:0]" , "op": "MR: 0F 13 /r"},
{"inst": "movlps w:xmm[63:0], m64" , "op": "RM: 0F 12 /r"},
{"inst": "movmskps W:r32[3:0], xmm" , "op": "RM: 0F 50 /r"},
{"inst": "movntps W:m128, xmm" , "op": "MR: 0F 2B /r"},
{"inst": "movups W:xmm, xmm/m128" , "op": "RM: 0F 10 /r"},
{"inst": "movups W:xmm/m128, xmm" , "op": "MR: 0F 11 /r"},
{"inst": "mulps X:~xmm, ~xmm/m128" , "op": "RM: 0F 59 /r"},
{"inst": "orps X:~xmm, ~xmm/m128" , "op": "RM: 0F 56 /r"},
{"inst": "rcpps W:xmm, xmm/m128" , "op": "RM: 0F 53 /r"},
{"inst": "rsqrtps W:xmm, xmm/m128" , "op": "RM: 0F 52 /r"},
{"inst": "shufps X:xmm, xmm/m128, ib/ub" , "op": "RM: 0F C6 /r ib"},
{"inst": "sqrtps W:xmm, xmm/m128" , "op": "RM: 0F 51 /r"},
{"inst": "subps X:xmm, xmm/m128" , "op": "RM: 0F 5C /r"},
{"inst": "unpckhps X:xmm, xmm/m128" , "op": "RM: 0F 15 /r"},
{"inst": "unpcklps X:xmm, xmm/m128" , "op": "RM: 0F 14 /r"},
{"inst": "xorps X:~xmm, ~xmm/m128" , "op": "RM: 0F 57 /r"}
]},
{"category": "SSE SCALAR", "ext": "SSE2", "data": [
{"inst": "addsd x:xmm[63:0], xmm[63:0]/m64" , "op": "RM: F2 0F 58 /r"},
{"inst": "cmpsd x:xmm[63:0], xmm[63:0]/m64, ib/ub" , "op": "RM: F2 0F C2 /r ib"},
{"inst": "comisd R:xmm[63:0], xmm[63:0]/m64" , "op": "RM: 66 0F 2F /r", "io": "OF=0 SF=0 ZF=W AF=0 PF=W CF=W"},
{"inst": "cvtsd2si W:r32, xmm[63:0]/m64" , "op": "RM: F2 0F 2D /r"},
{"inst": "cvtsd2si W:r64, xmm[63:0]/m64" , "op": "RM: REX.W F2 0F 2D /r"},
{"inst": "cvtsd2ss w:xmm[31:0], xmm[63:0]/m64" , "op": "RM: F2 0F 5A /r"},
{"inst": "cvtsi2sd w:xmm[63:0], r32/m32" , "op": "RM: F2 0F 2A /r"},
{"inst": "cvtsi2sd w:xmm[63:0], r64/m64" , "op": "RM: REX.W F2 0F 2A /r"},
{"inst": "cvtss2sd w:xmm[63:0], xmm[31:0]/m32" , "op": "RM: F3 0F 5A /r"},
{"inst": "cvttsd2si W:r32, xmm[63:0]/m64" , "op": "RM: F2 0F 2C /r"},
{"inst": "cvttsd2si W:r64, xmm[63:0]/m64" , "op": "RM: REX.W F2 0F 2C /r"},
{"inst": "divsd x:xmm[63:0], xmm[63:0]/m64" , "op": "RM: F2 0F 5E /r"},
{"inst": "maxsd x:xmm[63:0], xmm[63:0]/m64" , "op": "RM: F2 0F 5F /r"},
{"inst": "minsd x:xmm[63:0], xmm[63:0]/m64" , "op": "RM: F2 0F 5D /r"},
{"inst": "movsd w:xmm[63:0], xmm[63:0]" , "op": "RM: F2 0F 10 /r"},
{"inst": "movsd W:xmm[63:0], m64" , "op": "RM: F2 0F 10 /r"},
{"inst": "movsd W:m64, xmm[63:0]" , "op": "MR: F2 0F 11 /r"},
{"inst": "mulsd x:xmm[63:0], xmm[63:0]/m64" , "op": "RM: F2 0F 59 /r"},
{"inst": "sqrtsd w:xmm[63:0], xmm[63:0]/m64" , "op": "RM: F2 0F 51 /r"},
{"inst": "subsd x:xmm[63:0], xmm[63:0]/m64" , "op": "RM: F2 0F 5C /r"},
{"inst": "ucomisd R:xmm[63:0], xmm[63:0]/m64" , "op": "RM: 66 0F 2E /r", "io": "OF=0 SF=0 ZF=W AF=0 PF=W CF=W"}
]},
{"category": "SSE SIMD", "ext": "SSE2", "data": [
{"inst": "addpd X:~xmm, ~xmm/m128" , "op": "RM: 66 0F 58 /r"},
{"inst": "andnpd X:xmm, xmm/m128" , "op": "RM: 66 0F 55 /r"},
{"inst": "andpd X:~xmm, ~xmm/m128" , "op": "RM: 66 0F 54 /r"},
{"inst": "cmppd X:xmm, xmm/m128, ib/ub" , "op": "RM: 66 0F C2 /r ib"},
{"inst": "cvtdq2pd W:xmm, xmm[63:0]/m64" , "op": "RM: F3 0F E6 /r"},
{"inst": "cvtdq2ps W:xmm, xmm/m128" , "op": "RM: 0F 5B /r"},
{"inst": "cvtpd2dq W:xmm[63:0], xmm/m128" , "op": "RM: F2 0F E6 /r"},
{"inst": "cvtpd2pi W:mm, xmm/m128" , "op": "RM: 66 0F 2D /r"},
{"inst": "cvtpd2ps W:xmm[63:0], xmm/m128" , "op": "RM: 66 0F 5A /r"},
{"inst": "cvtpi2pd W:xmm, R:mm[63:0]/m64" , "op": "RM: 66 0F 2A /r"},
{"inst": "cvtps2dq W:xmm, xmm/m128" , "op": "RM: 66 0F 5B /r"},
{"inst": "cvtps2pd W:xmm, xmm[63:0]/m64" , "op": "RM: 0F 5A /r"},
{"inst": "cvttpd2dq W:xmm[63:0], xmm/m128" , "op": "RM: 66 0F E6 /r"},
{"inst": "cvttpd2pi W:mm, xmm/m128" , "op": "RM: 66 0F 2C /r"},
{"inst": "cvttps2dq W:xmm, xmm/m128" , "op": "RM: F3 0F 5B /r"},
{"inst": "divpd X:xmm, xmm/m128" , "op": "RM: 66 0F 5E /r"},
{"inst": "maskmovdqu R:xmm, xmm, X:<m128(ds:zdi)>" , "op": "RM: 66 0F F7 /r"},
{"inst": "maxpd X:xmm, xmm/m128" , "op": "RM: 66 0F 5F /r"},
{"inst": "minpd X:xmm, xmm/m128" , "op": "RM: 66 0F 5D /r"},
{"inst": "movapd W:xmm, xmm/m128" , "op": "RM: 66 0F 28 /r"},
{"inst": "movapd W:xmm/m128, xmm" , "op": "MR: 66 0F 29 /r"},
{"inst": "movd W:r32[31:0]/m32, xmm[31:0]" , "op": "MR: 66 0F 7E /r"},
{"inst": "movd W:xmm[31:0], R:r32[31:0]/m32" , "op": "RM: 66 0F 6E /r"},
{"inst": "movdq2q W:mm, xmm[63:0]" , "op": "RM: F2 0F D6 /r"},
{"inst": "movdqa W:xmm, xmm/m128" , "op": "RM: 66 0F 6F /r"},
{"inst": "movdqa W:xmm/m128, xmm" , "op": "MR: 66 0F 7F /r"},
{"inst": "movdqu W:xmm, xmm/m128" , "op": "RM: F3 0F 6F /r"},
{"inst": "movdqu W:xmm/m128, xmm" , "op": "MR: F3 0F 7F /r"},
{"inst": "movhpd W:m64, xmm[127:64]" , "op": "MR: 66 0F 17 /r"},
{"inst": "movhpd w:xmm[127:64], m64" , "op": "RM: 66 0F 16 /r"},
{"inst": "movlpd W:m64, xmm[63:0]" , "op": "MR: 66 0F 13 /r"},
{"inst": "movlpd w:xmm[63:0], m64" , "op": "RM: 66 0F 12 /r"},
{"inst": "movmskpd W:r32[1:0], xmm" , "op": "RM: 66 0F 50 /r"},
{"inst": "movntdq W:m128, xmm" , "op": "MR: 66 0F E7 /r"},
{"inst": "movntpd W:m128, xmm" , "op": "MR: 66 0F 2B /r"},
{"inst": "movq W:r64/m64, xmm[63:0]" , "op": "MR: REX.W 66 0F 7E /r"},
{"inst": "movq W:xmm[63:0], r64[63:0]/m64" , "op": "RM: REX.W 66 0F 6E /r"},
{"inst": "movq W:xmm[63:0], xmm[63:0]/m64" , "op": "RM: F3 0F 7E /r"},
{"inst": "movq W:xmm[63:0]/m64, xmm[63:0]" , "op": "MR: 66 0F D6 /r"},
{"inst": "movq2dq W:xmm[63:0], mm" , "op": "RM: F3 0F D6 /r"},
{"inst": "movupd W:xmm, xmm/m128" , "op": "RM: 66 0F 10 /r"},
{"inst": "movupd W:xmm/m128, xmm" , "op": "MR: 66 0F 11 /r"},
{"inst": "mulpd X:~xmm, ~xmm/m128" , "op": "RM: 66 0F 59 /r"},
{"inst": "orpd X:~xmm, ~xmm/m128" , "op": "RM: 66 0F 56 /r"},
{"inst": "packssdw X:xmm, xmm/m128" , "op": "RM: 66 0F 6B /r"},
{"inst": "packsswb X:xmm, xmm/m128" , "op": "RM: 66 0F 63 /r"},
{"inst": "packuswb X:xmm, xmm/m128" , "op": "RM: 66 0F 67 /r"},
{"inst": "paddb X:~xmm, ~xmm/m128" , "op": "RM: 66 0F FC /r"},
{"inst": "paddd X:~xmm, ~xmm/m128" , "op": "RM: 66 0F FE /r"},
{"inst": "paddq X:~mm, ~mm/m64" , "op": "RM: 0F D4 /r"},
{"inst": "paddq X:~xmm, ~xmm/m128" , "op": "RM: 66 0F D4 /r"},
{"inst": "paddsb X:~xmm, ~xmm/m128" , "op": "RM: 66 0F EC /r"},
{"inst": "paddsw X:~xmm, ~xmm/m128" , "op": "RM: 66 0F ED /r"},
{"inst": "paddusb X:~xmm, ~xmm/m128" , "op": "RM: 66 0F DC /r"},
{"inst": "paddusw X:~xmm, ~xmm/m128" , "op": "RM: 66 0F DD /r"},
{"inst": "paddw X:~xmm, ~xmm/m128" , "op": "RM: 66 0F FD /r"},
{"inst": "pand X:~xmm, ~xmm/m128" , "op": "RM: 66 0F DB /r"},
{"inst": "pandn X:xmm, xmm/m128" , "op": "RM: 66 0F DF /r"},
{"inst": "pavgb X:~xmm, ~xmm/m128" , "op": "RM: 66 0F E0 /r"},
{"inst": "pavgw X:~xmm, ~xmm/m128" , "op": "RM: 66 0F E3 /r"},
{"inst": "pcmpeqb X:~xmm, ~xmm/m128" , "op": "RM: 66 0F 74 /r"},
{"inst": "pcmpeqd X:~xmm, ~xmm/m128" , "op": "RM: 66 0F 76 /r"},
{"inst": "pcmpeqw X:~xmm, ~xmm/m128" , "op": "RM: 66 0F 75 /r"},
{"inst": "pcmpgtb X:xmm, xmm/m128" , "op": "RM: 66 0F 64 /r"},
{"inst": "pcmpgtd X:xmm, xmm/m128" , "op": "RM: 66 0F 66 /r"},
{"inst": "pcmpgtw X:xmm, xmm/m128" , "op": "RM: 66 0F 65 /r"},
{"inst": "pextrw W:r32[15:0], xmm, ib/ub" , "op": "RM: 66 0F C5 /r ib"},
{"inst": "pinsrw X:xmm, r32[15:0]/m16, ib/ub" , "op": "RM: 66 0F C4 /r ib"},
{"inst": "pmaddwd X:~xmm, ~xmm/m128" , "op": "RM: 66 0F F5 /r"},
{"inst": "pmaxsw X:~xmm, ~xmm/m128" , "op": "RM: 66 0F EE /r"},
{"inst": "pmaxub X:~xmm, ~xmm/m128" , "op": "RM: 66 0F DE /r"},
{"inst": "pminsw X:~xmm, ~xmm/m128" , "op": "RM: 66 0F EA /r"},
{"inst": "pminub X:~xmm, ~xmm/m128" , "op": "RM: 66 0F DA /r"},
{"inst": "pmovmskb W:r32[15:0], xmm" , "op": "RM: 66 0F D7 /r"},
{"inst": "pmulhuw X:~xmm, ~xmm/m128" , "op": "RM: 66 0F E4 /r"},
{"inst": "pmulhw X:~xmm, ~xmm/m128" , "op": "RM: 66 0F E5 /r"},
{"inst": "pmullw X:~xmm, ~xmm/m128" , "op": "RM: 66 0F D5 /r"},
{"inst": "pmuludq X:~mm, ~mm/m64" , "op": "RM: 0F F4 /r"},
{"inst": "pmuludq X:~xmm, ~xmm/m128" , "op": "RM: 66 0F F4 /r"},
{"inst": "por X:~xmm, ~xmm/m128" , "op": "RM: 66 0F EB /r"},
{"inst": "psadbw X:~xmm, ~xmm/m128" , "op": "RM: 66 0F F6 /r"},
{"inst": "pshufd W:xmm, xmm/m128, ib/ub" , "op": "RM: 66 0F 70 /r ib"},
{"inst": "pshufhw W:xmm, xmm/m128, ib/ub" , "op": "RM: F3 0F 70 /r ib"},
{"inst": "pshuflw W:xmm, xmm/m128, ib/ub" , "op": "RM: F2 0F 70 /r ib"},
{"inst": "pslld X:xmm, ib/ub" , "op": "M: 66 0F 72 /6 ib"},
{"inst": "pslld X:xmm, xmm/m128" , "op": "RM: 66 0F F2 /r"},
{"inst": "pslldq X:xmm, ib/ub" , "op": "M: 66 0F 73 /7 ib"},
{"inst": "psllq X:xmm, ib/ub" , "op": "M: 66 0F 73 /6 ib"},
{"inst": "psllq X:xmm, xmm/m128" , "op": "RM: 66 0F F3 /r"},
{"inst": "psllw X:xmm, ib/ub" , "op": "M: 66 0F 71 /6 ib"},
{"inst": "psllw X:xmm, xmm/m128" , "op": "RM: 66 0F F1 /r"},
{"inst": "psrad X:xmm, ib/ub" , "op": "M: 66 0F 72 /4 ib"},
{"inst": "psrad X:xmm, xmm/m128" , "op": "RM: 66 0F E2 /r"},
{"inst": "psraw X:xmm, ib/ub" , "op": "M: 66 0F 71 /4 ib"},
{"inst": "psraw X:xmm, xmm/m128" , "op": "RM: 66 0F E1 /r"},
{"inst": "psrld X:xmm, ib/ub" , "op": "M: 66 0F 72 /2 ib"},
{"inst": "psrld X:xmm, xmm/m128" , "op": "RM: 66 0F D2 /r"},
{"inst": "psrldq X:xmm, ib/ub" , "op": "M: 66 0F 73 /3 ib"},
{"inst": "psrlq X:xmm, ib/ub" , "op": "M: 66 0F 73 /2 ib"},
{"inst": "psrlq X:xmm, xmm/m128" , "op": "RM: 66 0F D3 /r"},
{"inst": "psrlw X:xmm, ib/ub" , "op": "M: 66 0F 71 /2 ib"},
{"inst": "psrlw X:xmm, xmm/m128" , "op": "RM: 66 0F D1 /r"},
{"inst": "psubb X:xmm, xmm/m128" , "op": "RM: 66 0F F8 /r"},
{"inst": "psubd X:xmm, xmm/m128" , "op": "RM: 66 0F FA /r"},
{"inst": "psubq X:mm, mm/m64" , "op": "RM: 0F FB /r"},
{"inst": "psubq X:xmm, xmm/m128" , "op": "RM: 66 0F FB /r"},
{"inst": "psubsb X:xmm, xmm/m128" , "op": "RM: 66 0F E8 /r"},
{"inst": "psubsw X:xmm, xmm/m128" , "op": "RM: 66 0F E9 /r"},
{"inst": "psubusb X:xmm, xmm/m128" , "op": "RM: 66 0F D8 /r"},
{"inst": "psubusw X:xmm, xmm/m128" , "op": "RM: 66 0F D9 /r"},
{"inst": "psubw X:xmm, xmm/m128" , "op": "RM: 66 0F F9 /r"},
{"inst": "punpckhbw X:xmm, xmm/m128" , "op": "RM: 66 0F 68 /r"},
{"inst": "punpckhdq X:xmm, xmm/m128" , "op": "RM: 66 0F 6A /r"},
{"inst": "punpckhqdq X:xmm, xmm/m128" , "op": "RM: 66 0F 6D /r"},
{"inst": "punpckhwd X:xmm, xmm/m128" , "op": "RM: 66 0F 69 /r"},
{"inst": "punpcklbw X:xmm, xmm/m128" , "op": "RM: 66 0F 60 /r"},
{"inst": "punpckldq X:xmm, xmm/m128" , "op": "RM: 66 0F 62 /r"},
{"inst": "punpcklqdq X:xmm, xmm/m128" , "op": "RM: 66 0F 6C /r"},
{"inst": "punpcklwd X:xmm, xmm/m128" , "op": "RM: 66 0F 61 /r"},
{"inst": "pxor X:~xmm, ~xmm/m128" , "op": "RM: 66 0F EF /r"},
{"inst": "shufpd X:xmm, xmm/m128, ib/ub" , "op": "RM: 66 0F C6 /r ib"},
{"inst": "sqrtpd W:xmm, xmm/m128" , "op": "RM: 66 0F 51 /r"},
{"inst": "subpd X:xmm, xmm/m128" , "op": "RM: 66 0F 5C /r"},
{"inst": "unpckhpd X:xmm, xmm/m128" , "op": "RM: 66 0F 15 /r"},
{"inst": "unpcklpd X:xmm, xmm/m128" , "op": "RM: 66 0F 14 /r"},
{"inst": "xorpd X:~xmm, ~xmm/m128" , "op": "RM: 66 0F 57 /r"}
]},
{"category": "SSE SIMD", "ext": "SSE3", "data": [
{"inst": "addsubpd X:xmm, xmm/m128" , "op": "RM: 66 0F D0 /r"},
{"inst": "addsubps X:xmm, xmm/m128" , "op": "RM: F2 0F D0 /r"},
{"inst": "haddpd X:~xmm, ~xmm/m128" , "op": "RM: 66 0F 7C /r"},
{"inst": "haddps X:~xmm, ~xmm/m128" , "op": "RM: F2 0F 7C /r"},
{"inst": "hsubpd X:xmm, xmm/m128" , "op": "RM: 66 0F 7D /r"},
{"inst": "hsubps X:xmm, xmm/m128" , "op": "RM: F2 0F 7D /r"},
{"inst": "lddqu W:xmm, m128" , "op": "RM: F2 0F F0 /r"},
{"inst": "movddup W:xmm, xmm[63:0]/m64" , "op": "RM: F2 0F 12 /r"},
{"inst": "movshdup W:xmm, xmm/m128" , "op": "RM: F3 0F 16 /r"},
{"inst": "movsldup W:xmm, xmm/m128" , "op": "RM: F3 0F 12 /r"}
]},
{"category": "SSE SIMD", "ext": "SSSE3", "data": [
{"inst": "pabsb W:mm, mm/m64" , "op": "RM: 0F 38 1C /r"},
{"inst": "pabsb W:xmm, xmm/m128" , "op": "RM: 66 0F 38 1C /r"},
{"inst": "pabsd W:mm, mm/m64" , "op": "RM: 0F 38 1E /r"},
{"inst": "pabsd W:xmm, xmm/m128" , "op": "RM: 66 0F 38 1E /r"},
{"inst": "pabsw W:mm, mm/m64" , "op": "RM: 0F 38 1D /r"},
{"inst": "pabsw W:xmm, xmm/m128" , "op": "RM: 66 0F 38 1D /r"},
{"inst": "palignr X:mm, mm/m64, ib/ub" , "op": "RM: 0F 3A 0F /r ib"},
{"inst": "palignr X:xmm, xmm/m128, ib/ub" , "op": "RM: 66 0F 3A 0F /r ib"},
{"inst": "phaddd X:~mm, ~mm/m64" , "op": "RM: 0F 38 02 /r"},
{"inst": "phaddd X:~xmm, ~xmm/m128" , "op": "RM: 66 0F 38 02 /r"},
{"inst": "phaddsw X:~mm, ~mm/m64" , "op": "RM: 0F 38 03 /r"},
{"inst": "phaddsw X:~xmm, ~xmm/m128" , "op": "RM: 66 0F 38 03 /r"},
{"inst": "phaddw X:~mm, ~mm/m64" , "op": "RM: 0F 38 01 /r"},
{"inst": "phaddw X:~xmm, ~xmm/m128" , "op": "RM: 66 0F 38 01 /r"},
{"inst": "phsubd X:mm, mm/m64" , "op": "RM: 0F 38 06 /r"},
{"inst": "phsubd X:xmm, xmm/m128" , "op": "RM: 66 0F 38 06 /r"},
{"inst": "phsubsw X:mm, mm/m64" , "op": "RM: 0F 38 07 /r"},
{"inst": "phsubsw X:xmm, xmm/m128" , "op": "RM: 66 0F 38 07 /r"},
{"inst": "phsubw X:mm, mm/m64" , "op": "RM: 0F 38 05 /r"},
{"inst": "phsubw X:xmm, xmm/m128" , "op": "RM: 66 0F 38 05 /r"},
{"inst": "pmaddubsw X:~mm, ~mm/m64" , "op": "RM: 0F 38 04 /r"},
{"inst": "pmaddubsw X:~xmm, ~xmm/m128" , "op": "RM: 66 0F 38 04 /r"},
{"inst": "pmulhrsw X:~mm, ~mm/m64" , "op": "RM: 0F 38 0B /r"},
{"inst": "pmulhrsw X:~xmm, ~xmm/m128" , "op": "RM: 66 0F 38 0B /r"},
{"inst": "pshufb X:mm, mm/m64" , "op": "RM: 0F 38 00 /r"},
{"inst": "pshufb X:xmm, xmm/m128" , "op": "RM: 66 0F 38 00 /r"},
{"inst": "psignb X:mm, mm/m64" , "op": "RM: 0F 38 08 /r"},
{"inst": "psignb X:xmm, xmm/m128" , "op": "RM: 66 0F 38 08 /r"},
{"inst": "psignd X:mm, mm/m64" , "op": "RM: 0F 38 0A /r"},
{"inst": "psignd X:xmm, xmm/m128" , "op": "RM: 66 0F 38 0A /r"},
{"inst": "psignw X:mm, mm/m64" , "op": "RM: 0F 38 09 /r"},
{"inst": "psignw X:xmm, xmm/m128" , "op": "RM: 66 0F 38 09 /r"}
]},
{"category": "SSE SCALAR", "ext": "SSE4_1", "data": [
{"inst": "roundsd w:xmm[63:0], xmm[63:0]/m64, ib/ub" , "op": "RM: 66 0F 3A 0B /r ib"},
{"inst": "roundss w:xmm[31:0], xmm[31:0]/m32, ib/ub" , "op": "RM: 66 0F 3A 0A /r ib"}
]},
{"category": "SSE SIMD", "ext": "SSE4_1", "data": [
{"inst": "blendpd X:xmm, xmm/m128, ib/ub" , "op": "RM: 66 0F 3A 0D /r ib"},
{"inst": "blendps X:xmm, xmm/m128, ib/ub" , "op": "RM: 66 0F 3A 0C /r ib"},
{"inst": "blendvpd X:xmm, xmm/m128, <xmm0>" , "op": "RM: 66 0F 38 15 /r"},
{"inst": "blendvps X:xmm, xmm/m128, <xmm0>" , "op": "RM: 66 0F 38 14 /r"},
{"inst": "dppd X:xmm, xmm/m128, ib/ub" , "op": "RM: 66 0F 3A 41 /r ib"},
{"inst": "dpps X:xmm, xmm/m128, ib/ub" , "op": "RM: 66 0F 3A 40 /r ib"},
{"inst": "extractps W:r32/m32, xmm, ib/ub" , "op": "MR: 66 0F 3A 17 /r ib"},
{"inst": "insertps X:xmm, xmm[31:0]/m32, ib/ub" , "op": "RM: 66 0F 3A 21 /r ib"},
{"inst": "movntdqa W:xmm, m128" , "op": "RM: 66 0F 38 2A /r"},
{"inst": "mpsadbw X:xmm, xmm/m128, ib/ub" , "op": "RM: 66 0F 3A 42 /r ib"},
{"inst": "packusdw X:xmm, xmm/m128" , "op": "RM: 66 0F 38 2B /r"},
{"inst": "pblendvb X:xmm, xmm/m128, <xmm0>" , "op": "RM: 66 0F E0 /r"},
{"inst": "pblendw X:xmm, xmm/m128, ib/ub" , "op": "RM: 66 0F 3A 0E /r ib"},
{"inst": "pcmpeqq X:~xmm, ~xmm/m128" , "op": "RM: 66 0F 38 29 /r"},
{"inst": "pextrb W:r32[7:0]/m8, xmm, ib/ub" , "op": "MR: 66 0F 3A 14 /r ib"},
{"inst": "pextrd W:r32[31:0]/m32, xmm, ib/ub" , "op": "MR: 66 0F 3A 16 /r ib"},
{"inst": "pextrq W:r64/m64, xmm, ib/ub" , "op": "MR: REX.W 66 0F 3A 16 /r ib"},
{"inst": "pextrw W:r32[15:0]/m16, xmm, ib/ub" , "op": "MR: 66 0F 3A 15 /r ib"},
{"inst": "phminposuw W:xmm[18:0], xmm/m128" , "op": "RM: 66 0F 38 41 /r"},
{"inst": "pinsrb X:xmm, r32[7:0]/m8, ib/ub" , "op": "RM: 66 0F 3A 20 /r ib"},
{"inst": "pinsrd X:xmm, r32[31:0]/m32, ib/ub" , "op": "RM: 66 0F 3A 22 /r ib"},
{"inst": "pinsrq X:xmm, r64/m64, ib/ub" , "op": "RM: REX.W 66 0F 3A 22 /r ib"},
{"inst": "pmaxsb X:~xmm, ~xmm/m128" , "op": "RM: 66 0F 38 3C /r"},
{"inst": "pmaxsd X:~xmm, ~xmm/m128" , "op": "RM: 66 0F 38 3D /r"},
{"inst": "pmaxud X:~xmm, ~xmm/m128" , "op": "RM: 66 0F 38 3F /r"},
{"inst": "pmaxuw X:~xmm, ~xmm/m128" , "op": "RM: 66 0F 38 3E /r"},
{"inst": "pminsb X:~xmm, ~xmm/m128" , "op": "RM: 66 0F 38 38 /r"},
{"inst": "pminsd X:~xmm, ~xmm/m128" , "op": "RM: 66 0F 38 39 /r"},
{"inst": "pminud X:~xmm, ~xmm/m128" , "op": "RM: 66 0F 38 3B /r"},
{"inst": "pminuw X:~xmm, ~xmm/m128" , "op": "RM: 66 0F 38 3A /r"},
{"inst": "pmovsxbd W:xmm, xmm[31:0]/m32" , "op": "RM: 66 0F 38 21 /r"},
{"inst": "pmovsxbq W:xmm, xmm[15:0]/m16" , "op": "RM: 66 0F 38 22 /r"},
{"inst": "pmovsxbw W:xmm, xmm[63:0]/m64" , "op": "RM: 66 0F 38 20 /r"},
{"inst": "pmovsxdq W:xmm, xmm[63:0]/m64" , "op": "RM: 66 0F 38 25 /r"},
{"inst": "pmovsxwd W:xmm, xmm[63:0]/m64" , "op": "RM: 66 0F 38 23 /r"},
{"inst": "pmovsxwq W:xmm, xmm[31:0]/m32" , "op": "RM: 66 0F 38 24 /r"},
{"inst": "pmovzxbd W:xmm, xmm[31:0]/m32" , "op": "RM: 66 0F 38 31 /r"},
{"inst": "pmovzxbq W:xmm, xmm[15:0]/m16" , "op": "RM: 66 0F 38 32 /r"},
{"inst": "pmovzxbw W:xmm, xmm[63:0]/m64" , "op": "RM: 66 0F 38 30 /r"},
{"inst": "pmovzxdq W:xmm, xmm[63:0]/m64" , "op": "RM: 66 0F 38 35 /r"},
{"inst": "pmovzxwd W:xmm, xmm[63:0]/m64" , "op": "RM: 66 0F 38 33 /r"},
{"inst": "pmovzxwq W:xmm, xmm[31:0]/m32" , "op": "RM: 66 0F 38 34 /r"},
{"inst": "pmuldq X:~xmm, ~xmm/m128" , "op": "RM: 66 0F 38 28 /r"},
{"inst": "pmulld X:~xmm, ~xmm/m128" , "op": "RM: 66 0F 38 40 /r"},
{"inst": "ptest R:~xmm, ~xmm/m128" , "op": "RM: 66 0F 38 17 /r", "io": "OF=0 SF=0 ZF=W AF=0 PF=0 CF=W"},
{"inst": "roundpd W:xmm, xmm/m128, ib/ub" , "op": "RM: 66 0F 3A 09 /r ib"},
{"inst": "roundps W:xmm, xmm/m128, ib/ub" , "op": "RM: 66 0F 3A 08 /r ib"}
]},
{"category": "SSE SIMD", "ext": "SSE4_2", "data": [
{"inst": "pcmpestri R:xmm, xmm/m128, ib/ub, W:<ecx>,<eax>,<edx>" , "op": "RM: 66 0F 3A 61 /r ib", "io": "OF=W SF=W ZF=W AF=0 PF=0 CF=W"},
{"inst": "pcmpestrm R:xmm, xmm/m128, ib/ub, W:<xmm0>,<eax>,<edx>" , "op": "RM: 66 0F 3A 60 /r ib", "io": "OF=W SF=W ZF=W AF=0 PF=0 CF=W"},
{"inst": "pcmpgtq X:xmm, xmm/m128" , "op": "RM: 66 0F 38 37 /r"},
{"inst": "pcmpistri R:xmm, xmm/m128, ib/ub, W:<ecx>" , "op": "RM: 66 0F 3A 63 /r ib", "io": "OF=W SF=W ZF=W AF=0 PF=0 CF=W"},
{"inst": "pcmpistrm R:xmm, xmm/m128, ib/ub, W:<xmm0>" , "op": "RM: 66 0F 3A 62 /r ib", "io": "OF=W SF=W ZF=W AF=0 PF=0 CF=W"}
]},
{"category": "SSE SCALAR", "ext": "SSE4A", "data": [
{"inst": "movntsd W:m64, xmm[63:0]" , "op": "RM: F2 0F 2B /r"},
{"inst": "movntss W:m32, xmm[31:0]" , "op": "RM: F3 0F 2B /r"}
]},
{"category": "SSE SIMD", "ext": "SSE4A", "data": [
{"inst": "extrq X:xmm, ib/ub, ib/ub" , "op": "R: 66 0F 78 /0 ib ib"},
{"inst": "extrq X:xmm, xmm" , "op": "RM: 66 0F 79 /r"},
{"inst": "insertq X:xmm, xmm" , "op": "RM: F2 0F 79 /r"},
{"inst": "insertq X:xmm, xmm, ib/ub, ib/ub" , "op": "RM: F2 0F 78 /r ib ib"}
]},
{"category": "SSE SIMD", "ext": "PCLMULQDQ", "data": [
{"inst": "pclmulqdq X:xmm, xmm/m128, ib/ub" , "op": "RM: 66 0F 3A 44 /r ib"}
]},
{"category": "SSE SIMD CRYPTO_HASH", "ext": "AESNI", "data": [
{"inst": "aesdec X:xmm, xmm/m128" , "op": "RM: 66 0F 38 DE /r"},
{"inst": "aesdeclast X:xmm, xmm/m128" , "op": "RM: 66 0F 38 DF /r"},
{"inst": "aesenc X:xmm, xmm/m128" , "op": "RM: 66 0F 38 DC /r"},
{"inst": "aesenclast X:xmm, xmm/m128" , "op": "RM: 66 0F 38 DD /r"},
{"inst": "aesimc W:xmm, xmm/m128" , "op": "RM: 66 0F 38 DB /r"},
{"inst": "aeskeygenassist W:xmm, xmm/m128, ib/ub" , "op": "RM: 66 0F 3A DF /r ib"}
]},
{"category": "SSE SIMD CRYPTO_HASH", "ext": "SHA", "data": [
{"inst": "sha1msg1 xmm, xmm/m128" , "op": "RM: 0F 38 C9 /r"},
{"inst": "sha1msg2 xmm, xmm/m128" , "op": "RM: 0F 38 CA /r"},
{"inst": "sha1nexte xmm, xmm/m128" , "op": "RM: 0F 38 C8 /r"},
{"inst": "sha1rnds4 xmm, xmm/m128, ib/ub" , "op": "RM: 0F 3A CC /r ib"},
{"inst": "sha256msg1 xmm, xmm/m128" , "op": "RM: 0F 38 CC /r"},
{"inst": "sha256msg2 xmm, xmm/m128" , "op": "RM: 0F 38 CD /r"},
{"inst": "sha256rnds2 xmm, xmm/m128, <xmm0>" , "op": "RM: 0F 38 CB /r"}
]},
{"category": "SSE SIMD", "ext": "GFNI", "data": [
{"inst": "gf2p8affineinvqb X:xmm, xmm/m128, ib/ub" , "op": "RM: 66 0F 3A CF /r ib"},
{"inst": "gf2p8affineqb X:xmm, xmm/m128, ib/ub" , "op": "RM: 66 0F 3A CE /r ib"},
{"inst": "gf2p8mulb X:xmm, xmm/m128" , "op": "RM: 66 0F 38 CF /r"}
]},
{"category": "AVX STATE", "ext": "AVX", "data": [
{"inst": "vldmxcsr R:m32" , "op": "VEX.LZ.0F.WIG AE /2", "io": "MXCSR=W"},
{"inst": "vstmxcsr W:m32" , "op": "VEX.LZ.0F.WIG AE /3", "io": "MXCSR=R"},
{"inst": "vzeroall" , "op": "VEX.256.0F.WIG 77", "volatile": true},
{"inst": "vzeroupper" , "op": "VEX.128.0F.WIG 77", "volatile": true}
]},
{"category": "AVX SCALAR", "ext": "AVX", "data": [
{"inst": "vaddsd W:xmm, xmm, xmm[63:0]/m64" , "op": "RVM: VEX.LIG.F2.0F.WIG 58 /r"},
{"inst": "vaddss W:xmm, xmm, xmm[31:0]/m32" , "op": "RVM: VEX.LIG.F3.0F.WIG 58 /r"},
{"inst": "vcmpsd W:xmm, xmm, xmm[63:0]/m64, ib/ub" , "op": "RVM: VEX.LIG.F2.0F.WIG C2 /r ib"},
{"inst": "vcmpss W:xmm, xmm, xmm[31:0]/m32, ib/ub" , "op": "RVM: VEX.LIG.F3.0F.WIG C2 /r ib"},
{"inst": "vcomisd R:xmm[63:0], xmm[63:0]/m64" , "op": "RM: VEX.LIG.66.0F.WIG 2F /r", "io": "OF=0 SF=0 ZF=W AF=0 PF=W CF=W"},
{"inst": "vcomiss R:xmm[31:0], xmm[31:0]/m32" , "op": "RM: VEX.LIG.0F.WIG 2F /r" , "io": "OF=0 SF=0 ZF=W AF=0 PF=W CF=W"},
{"inst": "vcvtsd2si W:r32, xmm[63:0]/m64" , "op": "RM: VEX.LIG.F2.0F.W0 2D /r"},
{"inst": "vcvtsd2si W:r64, xmm[63:0]/m64" , "op": "RM: VEX.LIG.F2.0F.W1 2D /r"},
{"inst": "vcvtsd2ss W:xmm, xmm[127:32], xmm[63:0]/m64" , "op": "RVM: VEX.LIG.F2.0F.WIG 5A /r"},
{"inst": "vcvtsi2sd W:xmm, xmm[127:64], r32/m32" , "op": "RVM: VEX.LIG.F2.0F.W0 2A /r"},
{"inst": "vcvtsi2sd W:xmm, xmm[127:64], r64/m64" , "op": "RVM: VEX.LIG.F2.0F.W1 2A /r"},
{"inst": "vcvtsi2ss W:xmm, xmm[127:32], r32/m32" , "op": "RVM: VEX.LIG.F3.0F.W0 2A /r"},
{"inst": "vcvtsi2ss W:xmm, xmm[127:32], r64/m64" , "op": "RVM: VEX.LIG.F3.0F.W1 2A /r"},
{"inst": "vcvtss2sd W:xmm, xmm[127:64], xmm[31:0]/m32" , "op": "RVM: VEX.LIG.F3.0F.WIG 5A /r"},
{"inst": "vcvtss2si W:r32, xmm[31:0]/m32" , "op": "RM: VEX.LIG.F3.0F.W0 2D /r"},
{"inst": "vcvtss2si W:r64, xmm[31:0]/m32" , "op": "RM: VEX.LIG.F3.0F.W1 2D /r"},
{"inst": "vcvttsd2si W:r32, xmm[63:0]/m64" , "op": "RM: VEX.LIG.F2.0F.W0 2C /r"},
{"inst": "vcvttsd2si W:r64, xmm[63:0]/m64" , "op": "RM: VEX.LIG.F2.0F.W1 2C /r"},
{"inst": "vcvttss2si W:r32, xmm[31:0]/m32" , "op": "RM: VEX.LIG.F3.0F.W0 2C /r"},
{"inst": "vcvttss2si W:r64, xmm[31:0]/m32" , "op": "RM: VEX.LIG.F3.0F.W1 2C /r"},
{"inst": "vdivsd W:xmm, xmm, xmm[63:0]/m64" , "op": "RVM: VEX.LIG.F2.0F.WIG 5E /r"},
{"inst": "vdivss W:xmm, xmm, xmm[31:0]/m32" , "op": "RVM: VEX.LIG.F3.0F.WIG 5E /r"},
{"inst": "vmaxsd W:xmm, xmm, xmm[63:0]/m64" , "op": "RVM: VEX.LIG.F2.0F.WIG 5F /r"},
{"inst": "vmaxss W:xmm, xmm, xmm[31:0]/m32" , "op": "RVM: VEX.LIG.F3.0F.WIG 5F /r"},
{"inst": "vminsd W:xmm, xmm, xmm[63:0]/m64" , "op": "RVM: VEX.LIG.F2.0F.WIG 5D /r"},
{"inst": "vminss W:xmm, xmm, xmm[31:0]/m32" , "op": "RVM: VEX.LIG.F3.0F.WIG 5D /r"},
{"inst": "vmovsd W:m64, xmm[63:0]" , "op": "MR: VEX.LIG.F2.0F.WIG 11 /r"},
{"inst": "vmovsd W:xmm[63:0], m64" , "op": "RM: VEX.LIG.F2.0F.WIG 10 /r"},
{"inst": "vmovsd W:xmm, xmm[127:64], xmm[63:0]" , "op": "MVR: VEX.LIG.F2.0F.WIG 11 /r"},
{"inst": "vmovsd W:xmm, xmm[127:64], xmm[63:0]" , "op": "RVM: VEX.LIG.F2.0F.WIG 10 /r"},
{"inst": "vmovss W:m32, xmm[31:0]" , "op": "MR: VEX.LIG.F3.0F.WIG 11 /r"},
{"inst": "vmovss W:xmm[31:0], m32" , "op": "RM: VEX.LIG.F3.0F.WIG 10 /r"},
{"inst": "vmovss W:xmm, xmm[127:32], xmm[31:0]" , "op": "MVR: VEX.LIG.F3.0F.WIG 11 /r"},
{"inst": "vmovss W:xmm, xmm[127:32], xmm[31:0]" , "op": "RVM: VEX.LIG.F3.0F.WIG 10 /r"},
{"inst": "vmulsd W:xmm, xmm, xmm[63:0]/m64" , "op": "RVM: VEX.LIG.F2.0F.WIG 59 /r"},
{"inst": "vmulss W:xmm, xmm, xmm[31:0]/m32" , "op": "RVM: VEX.LIG.F3.0F.WIG 59 /r"},
{"inst": "vrcpss W:xmm, xmm[127:32], xmm[31:0]/m32" , "op": "RVM: VEX.LIG.F3.0F.WIG 53 /r"},
{"inst": "vroundsd W:xmm, xmm[127:64], xmm[63:0]/m64, ib/ub" , "op": "RVM: VEX.LIG.66.0F3A.WIG 0B /r ib"},
{"inst": "vroundss W:xmm, xmm[127:32], xmm[31:0]/m32, ib/ub" , "op": "RVM: VEX.LIG.66.0F3A.WIG 0A /r ib"},
{"inst": "vrsqrtss W:xmm, xmm[127:32], xmm[31:0]/m32" , "op": "RVM: VEX.LIG.F3.0F.WIG 52 /r"},
{"inst": "vsqrtsd W:xmm, xmm[127:64], xmm[63:0]/m64" , "op": "RVM: VEX.LIG.F2.0F.WIG 51 /r"},
{"inst": "vsqrtss W:xmm, xmm[127:32], xmm[31:0]/m32" , "op": "RVM: VEX.LIG.F3.0F.WIG 51 /r"},
{"inst": "vsubsd W:xmm, xmm, xmm[63:0]/m64" , "op": "RVM: VEX.LIG.F2.0F.WIG 5C /r"},
{"inst": "vsubss W:xmm, xmm, xmm[31:0]/m32" , "op": "RVM: VEX.LIG.F3.0F.WIG 5C /r"},
{"inst": "vucomisd R:xmm[63:0], xmm[63:0]/m64" , "op": "RM: VEX.LIG.66.0F.WIG 2E /r" , "io": "OF=0 SF=0 ZF=W AF=0 PF=W CF=W"},
{"inst": "vucomiss R:xmm[31:0], xmm[31:0]/m32" , "op": "RM: VEX.LIG.0F.WIG 2E /r" , "io": "OF=0 SF=0 ZF=W AF=0 PF=W CF=W"}
]},
{"category": "AVX SIMD", "ext": "AVX", "data": [
{"inst": "vaddpd W:xmm, ~xmm, ~xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG 58 /r"},
{"inst": "vaddpd W:ymm, ~ymm, ~ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG 58 /r"},
{"inst": "vaddps W:xmm, ~xmm, ~xmm/m128" , "op": "RVM: VEX.128.0F.WIG 58 /r"},
{"inst": "vaddps W:ymm, ~ymm, ~ymm/m256" , "op": "RVM: VEX.256.0F.WIG 58 /r"},
{"inst": "vaddsubpd W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG D0 /r"},
{"inst": "vaddsubpd W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG D0 /r"},
{"inst": "vaddsubps W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.F2.0F.WIG D0 /r"},
{"inst": "vaddsubps W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.F2.0F.WIG D0 /r"},
{"inst": "vandnpd W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG 55 /r"},
{"inst": "vandnpd W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG 55 /r"},
{"inst": "vandnps W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.0F.WIG 55 /r"},
{"inst": "vandnps W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.0F.WIG 55 /r"},
{"inst": "vandpd W:xmm, ~xmm, ~xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG 54 /r"},
{"inst": "vandpd W:ymm, ~ymm, ~ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG 54 /r"},
{"inst": "vandps W:xmm, ~xmm, ~xmm/m128" , "op": "RVM: VEX.128.0F.WIG 54 /r"},
{"inst": "vandps W:ymm, ~ymm, ~ymm/m256" , "op": "RVM: VEX.256.0F.WIG 54 /r"},
{"inst": "vblendpd W:xmm, xmm, xmm/m128, ib/ub" , "op": "RVM: VEX.128.66.0F3A.WIG 0D /r ib"},
{"inst": "vblendpd W:ymm, ymm, ymm/m256, ib/ub" , "op": "RVM: VEX.256.66.0F3A.WIG 0D /r ib"},
{"inst": "vblendps W:xmm, xmm, xmm/m128, ib/ub" , "op": "RVM: VEX.128.66.0F3A.WIG 0C /r ib"},
{"inst": "vblendps W:ymm, ymm, ymm/m256, ib/ub" , "op": "RVM: VEX.256.66.0F3A.WIG 0C /r ib"},
{"inst": "vblendvpd W:xmm, xmm, xmm/m128, xmm" , "op": "RVMS: VEX.128.66.0F3A.W0 4B /r /is4"},
{"inst": "vblendvpd W:ymm, ymm, ymm/m256, ymm" , "op": "RVMS: VEX.256.66.0F3A.W0 4B /r /is4"},
{"inst": "vblendvps W:xmm, xmm, xmm/m128, xmm" , "op": "RVMS: VEX.128.66.0F3A.W0 4A /r /is4"},
{"inst": "vblendvps W:ymm, ymm, ymm/m256, ymm" , "op": "RVMS: VEX.256.66.0F3A.W0 4A /r /is4"},
{"inst": "vbroadcastf128 W:ymm, m128" , "op": "RM: VEX.256.66.0F38.W0 1A /r"},
{"inst": "vbroadcastsd W:ymm, m64" , "op": "RM: VEX.256.66.0F38.W0 19 /r"},
{"inst": "vbroadcastss W:xmm, m32" , "op": "RM: VEX.128.66.0F38.W0 18 /r"},
{"inst": "vbroadcastss W:ymm, m32" , "op": "RM: VEX.256.66.0F38.W0 18 /r"},
{"inst": "vcmppd W:xmm, xmm, xmm/m128, ib/ub" , "op": "RVM: VEX.128.66.0F.WIG C2 /r ib"},
{"inst": "vcmppd W:ymm, ymm, ymm/m256, ib/ub" , "op": "RVM: VEX.256.66.0F.WIG C2 /r ib"},
{"inst": "vcmpps W:xmm, xmm, xmm/m128, ib/ub" , "op": "RVM: VEX.128.0F.WIG C2 /r ib"},
{"inst": "vcmpps W:ymm, ymm, ymm/m256, ib/ub" , "op": "RVM: VEX.256.0F.WIG C2 /r ib"},
{"inst": "vcvtdq2pd W:xmm, xmm[63:0]/m64" , "op": "RM: VEX.128.F3.0F.WIG E6 /r"},
{"inst": "vcvtdq2pd W:ymm, xmm/m128" , "op": "RM: VEX.256.F3.0F.WIG E6 /r"},
{"inst": "vcvtdq2ps W:xmm, xmm/m128" , "op": "RM: VEX.128.0F.WIG 5B /r"},
{"inst": "vcvtdq2ps W:ymm, ymm/m256" , "op": "RM: VEX.256.0F.WIG 5B /r"},
{"inst": "vcvtpd2dq W:xmm[63:0], xmm/m128" , "op": "RM: VEX.128.F2.0F.WIG E6 /r"},
{"inst": "vcvtpd2dq W:xmm, ymm/m256" , "op": "RM: VEX.256.F2.0F.WIG E6 /r"},
{"inst": "vcvtpd2ps W:xmm[63:0], xmm/m128" , "op": "RM: VEX.128.66.0F.WIG 5A /r"},
{"inst": "vcvtpd2ps W:xmm, ymm/m256" , "op": "RM: VEX.256.66.0F.WIG 5A /r"},
{"inst": "vcvtps2dq W:xmm, xmm/m128" , "op": "RM: VEX.128.66.0F.WIG 5B /r"},
{"inst": "vcvtps2dq W:ymm, ymm/m256" , "op": "RM: VEX.256.66.0F.WIG 5B /r"},
{"inst": "vcvtps2pd W:xmm, xmm[63:0]/m64" , "op": "RM: VEX.128.0F.WIG 5A /r"},
{"inst": "vcvtps2pd W:ymm, xmm/m128" , "op": "RM: VEX.256.0F.WIG 5A /r"},
{"inst": "vcvttpd2dq W:xmm[63:0], xmm/m128" , "op": "RM: VEX.128.66.0F.WIG E6 /r"},
{"inst": "vcvttpd2dq W:xmm, ymm/m256" , "op": "RM: VEX.256.66.0F.WIG E6 /r"},
{"inst": "vcvttps2dq W:xmm, xmm/m128" , "op": "RM: VEX.128.F3.0F.WIG 5B /r"},
{"inst": "vcvttps2dq W:ymm, ymm/m256" , "op": "RM: VEX.256.F3.0F.WIG 5B /r"},
{"inst": "vdivpd W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG 5E /r"},
{"inst": "vdivpd W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG 5E /r"},
{"inst": "vdivps W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.0F.WIG 5E /r"},
{"inst": "vdivps W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.0F.WIG 5E /r"},
{"inst": "vdppd W:xmm, xmm, xmm/m128, ib/ub" , "op": "RVM: VEX.128.66.0F3A.WIG 41 /r ib"},
{"inst": "vdpps W:xmm, xmm, xmm/m128, ib/ub" , "op": "RVM: VEX.128.66.0F3A.WIG 40 /r ib"},
{"inst": "vdpps W:ymm, ymm, ymm/m256, ib/ub" , "op": "RVM: VEX.256.66.0F3A.WIG 40 /r ib"},
{"inst": "vextractps W:r32[31:0]/m32, xmm, ib/ub" , "op": "MR: VEX.128.66.0F3A.WIG 17 /r ib"},
{"inst": "vextractf128 W:xmm/m128, ymm, ib/ub" , "op": "MR: VEX.256.66.0F3A.W0 19 /r ib"},
{"inst": "vhaddpd W:xmm, ~xmm, ~xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG 7C /r"},
{"inst": "vhaddpd W:ymm, ~ymm, ~ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG 7C /r"},
{"inst": "vhaddps W:xmm, ~xmm, ~xmm/m128" , "op": "RVM: VEX.128.F2.0F.WIG 7C /r"},
{"inst": "vhaddps W:ymm, ~ymm, ~ymm/m256" , "op": "RVM: VEX.256.F2.0F.WIG 7C /r"},
{"inst": "vhsubpd W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG 7D /r"},
{"inst": "vhsubpd W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG 7D /r"},
{"inst": "vhsubps W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.F2.0F.WIG 7D /r"},
{"inst": "vhsubps W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.F2.0F.WIG 7D /r"},
{"inst": "vinsertf128 W:ymm, ymm, xmm/m128, ib/ub" , "op": "RVM: VEX.256.66.0F3A.W0 18 /r ib"},
{"inst": "vinsertps W:xmm, xmm, xmm[31:0]/m32, ib/ub" , "op": "RVM: VEX.128.66.0F3A.WIG 21 /r ib"},
{"inst": "vlddqu W:xmm, m128" , "op": "RM: VEX.128.F2.0F.WIG F0 /r"},
{"inst": "vlddqu W:ymm, m256" , "op": "RM: VEX.256.F2.0F.WIG F0 /r"},
{"inst": "vmaskmovdqu R:xmm, xmm, X:<m128(ds:zdi)>" , "op": "RM: VEX.128.66.0F.WIG F7 /r"},
{"inst": "vmaskmovpd X:m128, xmm, xmm" , "op": "MVR: VEX.128.66.0F38.W0 2F /r"},
{"inst": "vmaskmovpd X:m256, ymm, ymm" , "op": "MVR: VEX.256.66.0F38.W0 2F /r"},
{"inst": "vmaskmovpd W:xmm, xmm, m128" , "op": "RVM: VEX.128.66.0F38.W0 2D /r"},
{"inst": "vmaskmovpd W:ymm, ymm, m256" , "op": "RVM: VEX.256.66.0F38.W0 2D /r"},
{"inst": "vmaskmovps X:m128, xmm, xmm" , "op": "MVR: VEX.128.66.0F38.W0 2E /r"},
{"inst": "vmaskmovps X:m256, ymm, ymm" , "op": "MVR: VEX.256.66.0F38.W0 2E /r"},
{"inst": "vmaskmovps W:xmm, xmm, m128" , "op": "RVM: VEX.128.66.0F38.W0 2C /r"},
{"inst": "vmaskmovps W:ymm, ymm, m256" , "op": "RVM: VEX.256.66.0F38.W0 2C /r"},
{"inst": "vmaxpd W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG 5F /r"},
{"inst": "vmaxpd W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG 5F /r"},
{"inst": "vmaxps W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.0F.WIG 5F /r"},
{"inst": "vmaxps W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.0F.WIG 5F /r"},
{"inst": "vminpd W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG 5D /r"},
{"inst": "vminpd W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG 5D /r"},
{"inst": "vminps W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.0F.WIG 5D /r"},
{"inst": "vminps W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.0F.WIG 5D /r"},
{"inst": "vmovapd W:xmm, xmm/m128" , "op": "RM: VEX.128.66.0F.WIG 28 /r"},
{"inst": "vmovapd W:xmm/m128, xmm" , "op": "MR: VEX.128.66.0F.WIG 29 /r"},
{"inst": "vmovapd W:ymm, ymm/m256" , "op": "RM: VEX.256.66.0F.WIG 28 /r"},
{"inst": "vmovapd W:ymm/m256, ymm" , "op": "MR: VEX.256.66.0F.WIG 29 /r"},
{"inst": "vmovaps W:xmm, xmm/m128" , "op": "RM: VEX.128.0F.WIG 28 /r"},
{"inst": "vmovaps W:xmm/m128, xmm" , "op": "MR: VEX.128.0F.WIG 29 /r"},
{"inst": "vmovaps W:ymm, ymm/m256" , "op": "RM: VEX.256.0F.WIG 28 /r"},
{"inst": "vmovaps W:ymm/m256, ymm" , "op": "MR: VEX.256.0F.WIG 29 /r"},
{"inst": "vmovd W:r32[31:0]/m32, xmm[31:0]" , "op": "MR: VEX.128.66.0F.W0 7E /r"},
{"inst": "vmovd W:xmm[31:0], r32[31:0]/m32" , "op": "RM: VEX.128.66.0F.W0 6E /r"},
{"inst": "vmovddup W:xmm, xmm[63:0]/m64" , "op": "RM: VEX.128.F2.0F.WIG 12 /r"},
{"inst": "vmovddup W:ymm, ymm/m256" , "op": "RM: VEX.256.F2.0F.WIG 12 /r"},
{"inst": "vmovdqa W:xmm, xmm/m128" , "op": "RM: VEX.128.66.0F.WIG 6F /r"},
{"inst": "vmovdqa W:xmm/m128, xmm" , "op": "MR: VEX.128.66.0F.WIG 7F /r"},
{"inst": "vmovdqa W:ymm, ymm/m256" , "op": "RM: VEX.256.66.0F.WIG 6F /r"},
{"inst": "vmovdqa W:ymm/m256, ymm" , "op": "MR: VEX.256.66.0F.WIG 7F /r"},
{"inst": "vmovdqu W:xmm, xmm/m128" , "op": "RM: VEX.128.F3.0F.WIG 6F /r"},
{"inst": "vmovdqu W:xmm/m128, xmm" , "op": "MR: VEX.128.F3.0F.WIG 7F /r"},
{"inst": "vmovdqu W:ymm, ymm/m256" , "op": "RM: VEX.256.F3.0F.WIG 6F /r"},
{"inst": "vmovdqu W:ymm/m256, ymm" , "op": "MR: VEX.256.F3.0F.WIG 7F /r"},
{"inst": "vmovhlps W:xmm, xmm[127:64], xmm[127:64]" , "op": "RVM: VEX.128.0F.WIG 12 /r"},
{"inst": "vmovhpd W:m64, xmm[127:64]" , "op": "MR: VEX.128.66.0F.WIG 17 /r"},
{"inst": "vmovhpd W:xmm, xmm[63:0], m64" , "op": "RVM: VEX.128.66.0F.WIG 16 /r"},
{"inst": "vmovhps W:m64, xmm[127:64]" , "op": "MR: VEX.128.0F.WIG 17 /r"},
{"inst": "vmovhps W:xmm, xmm[63:0], m64" , "op": "RVM: VEX.128.0F.WIG 16 /r"},
{"inst": "vmovlhps W:xmm, xmm[63:0], xmm[63:0]" , "op": "RVM: VEX.128.0F.WIG 16 /r"},
{"inst": "vmovlpd W:m64, xmm[63:0]" , "op": "MR: VEX.128.66.0F.WIG 13 /r"},
{"inst": "vmovlpd W:xmm, xmm[127:64], m64" , "op": "RVM: VEX.128.66.0F.WIG 12 /r"},
{"inst": "vmovlps W:m64, xmm[63:0]" , "op": "MR: VEX.128.0F.WIG 13 /r"},
{"inst": "vmovlps W:xmm, xmm[127:64], m64" , "op": "RVM: VEX.128.0F.WIG 12 /r"},
{"inst": "vmovmskpd W:r32[1:0], xmm" , "op": "RM: VEX.128.66.0F.WIG 50 /r"},
{"inst": "vmovmskpd W:r32[3:0], ymm" , "op": "RM: VEX.256.66.0F.WIG 50 /r"},
{"inst": "vmovmskps W:r32[3:0], xmm" , "op": "RM: VEX.128.0F.WIG 50 /r"},
{"inst": "vmovmskps W:r32[7:0], ymm" , "op": "RM: VEX.256.0F.WIG 50 /r"},
{"inst": "vmovntdq W:m128, xmm" , "op": "MR: VEX.128.66.0F.WIG E7 /r"},
{"inst": "vmovntdq W:m256, ymm" , "op": "MR: VEX.256.66.0F.WIG E7 /r"},
{"inst": "vmovntdqa W:xmm, m128" , "op": "RM: VEX.128.66.0F38.WIG 2A /r"},
{"inst": "vmovntpd W:m128, xmm" , "op": "MR: VEX.128.66.0F.WIG 2B /r"},
{"inst": "vmovntpd W:m256, ymm" , "op": "MR: VEX.256.66.0F.WIG 2B /r"},
{"inst": "vmovntps W:m128, xmm" , "op": "MR: VEX.128.0F.WIG 2B /r"},
{"inst": "vmovntps W:m256, ymm" , "op": "MR: VEX.256.0F.WIG 2B /r"},
{"inst": "vmovq W:r64/m64, xmm[63:0]" , "op": "MR: VEX.128.66.0F.W1 7E /r"},
{"inst": "vmovq W:xmm[63:0], xmm[63:0]/m64" , "op": "RM: VEX.128.F3.0F.WIG 7E /r"},
{"inst": "vmovq W:xmm[63:0], r64/m64" , "op": "RM: VEX.128.66.0F.W1 6E /r"},
{"inst": "vmovq W:xmm[63:0]/m64, xmm[63:0]" , "op": "MR: VEX.128.66.0F.WIG D6 /r"},
{"inst": "vmovshdup W:xmm, xmm/m128" , "op": "RM: VEX.128.F3.0F.WIG 16 /r"},
{"inst": "vmovshdup W:ymm, ymm/m256" , "op": "RM: VEX.256.F3.0F.WIG 16 /r"},
{"inst": "vmovsldup W:xmm, xmm/m128" , "op": "RM: VEX.128.F3.0F.WIG 12 /r"},
{"inst": "vmovsldup W:ymm, ymm/m256" , "op": "RM: VEX.256.F3.0F.WIG 12 /r"},
{"inst": "vmovupd W:xmm, xmm/m128" , "op": "RM: VEX.128.0F.WIG 10 /r"},
{"inst": "vmovupd W:xmm/m128, xmm" , "op": "MR: VEX.128.0F.WIG 11 /r"},
{"inst": "vmovupd W:ymm, ymm/m256" , "op": "RM: VEX.256.0F.WIG 10 /r"},
{"inst": "vmovupd W:ymm/m256, ymm" , "op": "MR: VEX.256.0F.WIG 11 /r"},
{"inst": "vmovups W:xmm, xmm/m128" , "op": "RM: VEX.128.66.0F.WIG 10 /r"},
{"inst": "vmovups W:xmm/m128, xmm" , "op": "MR: VEX.128.66.0F.WIG 11 /r"},
{"inst": "vmovups W:ymm, ymm/m256" , "op": "RM: VEX.256.66.0F.WIG 10 /r"},
{"inst": "vmovups W:ymm/m256, ymm" , "op": "MR: VEX.256.66.0F.WIG 11 /r"},
{"inst": "vmpsadbw W:xmm, xmm, xmm/m128, ib/ub" , "op": "RVM: VEX.128.66.0F3A.WIG 42 /r ib"},
{"inst": "vmulpd W:xmm, ~xmm, ~xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG 59 /r"},
{"inst": "vmulpd W:ymm, ~ymm, ~ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG 59 /r"},
{"inst": "vmulps W:xmm, ~xmm, ~xmm/m128" , "op": "RVM: VEX.128.0F.WIG 59 /r"},
{"inst": "vmulps W:ymm, ~ymm, ~ymm/m256" , "op": "RVM: VEX.256.0F.WIG 59 /r"},
{"inst": "vorpd W:xmm, ~xmm, ~xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG 56 /r"},
{"inst": "vorpd W:ymm, ~ymm, ~ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG 56 /r"},
{"inst": "vorps W:xmm, ~xmm, ~xmm/m128" , "op": "RVM: VEX.128.0F.WIG 56 /r"},
{"inst": "vorps W:ymm, ~ymm, ~ymm/m256" , "op": "RVM: VEX.256.0F.WIG 56 /r"},
{"inst": "vpabsb W:xmm, xmm/m128" , "op": "RM: VEX.128.66.0F38.WIG 1C /r"},
{"inst": "vpabsd W:xmm, xmm/m128" , "op": "RM: VEX.128.66.0F38.WIG 1E /r"},
{"inst": "vpabsw W:xmm, xmm/m128" , "op": "RM: VEX.128.66.0F38.WIG 1D /r"},
{"inst": "vpackssdw W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG 6B /r"},
{"inst": "vpacksswb W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG 63 /r"},
{"inst": "vpackusdw W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.WIG 2B /r"},
{"inst": "vpackuswb W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG 67 /r"},
{"inst": "vpaddb W:xmm, ~xmm, ~xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG FC /r"},
{"inst": "vpaddd W:xmm, ~xmm, ~xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG FE /r"},
{"inst": "vpaddq W:xmm, ~xmm, ~xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG D4 /r"},
{"inst": "vpaddsb W:xmm, ~xmm, ~xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG EC /r"},
{"inst": "vpaddsw W:xmm, ~xmm, ~xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG ED /r"},
{"inst": "vpaddusb W:xmm, ~xmm, ~xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG DC /r"},
{"inst": "vpaddusw W:xmm, ~xmm, ~xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG DD /r"},
{"inst": "vpaddw W:xmm, ~xmm, ~xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG FD /r"},
{"inst": "vpalignr W:xmm, xmm, xmm/m128, ib/ub" , "op": "RVM: VEX.128.66.0F3A.WIG 0F /r ib"},
{"inst": "vpand W:xmm, ~xmm, ~xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG DB /r"},
{"inst": "vpandn W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG DF /r"},
{"inst": "vpavgb W:xmm, ~xmm, ~xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG E0 /r"},
{"inst": "vpavgw W:xmm, ~xmm, ~xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG E3 /r"},
{"inst": "vpblendvb W:xmm, xmm, xmm/m128, xmm" , "op": "RVMS: VEX.128.66.0F3A.W0 4C /r /is4"},
{"inst": "vpblendw W:xmm, xmm, xmm/m128, ib/ub" , "op": "RVM: VEX.128.66.0F3A.WIG 0E /r ib"},
{"inst": "vpcmpeqb W:xmm, ~xmm, ~xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG 74 /r"},
{"inst": "vpcmpeqd W:xmm, ~xmm, ~xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG 76 /r"},
{"inst": "vpcmpeqq W:xmm, ~xmm, ~xmm/m128" , "op": "RVM: VEX.128.66.0F38.WIG 29 /r"},
{"inst": "vpcmpeqw W:xmm, ~xmm, ~xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG 75 /r"},
{"inst": "vpcmpestri R:xmm, xmm/m128, ib/ub, W:<ecx>,<eax>,<edx>" , "op": "RM: VEX.128.66.0F3A.WIG 61 /r ib", "io": "OF=W SF=W ZF=W AF=0 PF=0 CF=W"},
{"inst": "vpcmpestrm R:xmm, xmm/m128, ib/ub, W:<xmm0>,<eax>,<edx>" , "op": "RM: VEX.128.66.0F3A.WIG 60 /r ib", "io": "OF=W SF=W ZF=W AF=0 PF=0 CF=W"},
{"inst": "vpcmpgtb W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG 64 /r"},
{"inst": "vpcmpgtd W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG 66 /r"},
{"inst": "vpcmpgtq W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.WIG 37 /r"},
{"inst": "vpcmpgtw W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG 65 /r"},
{"inst": "vpcmpistri R:xmm, xmm/m128, ib/ub, W:<ecx>" , "op": "RM: VEX.128.66.0F3A.WIG 63 /r ib", "io": "OF=W SF=W ZF=W AF=0 PF=0 CF=W"},
{"inst": "vpcmpistrm R:xmm, xmm/m128, ib/ub, W:<xmm0>" , "op": "RM: VEX.128.66.0F3A.WIG 62 /r ib", "io": "OF=W SF=W ZF=W AF=0 PF=0 CF=W"},
{"inst": "vperm2f128 W:ymm, ymm, ymm/m256, ib/ub" , "op": "RVM: VEX.256.66.0F3A.W0 06 /r ib"},
{"inst": "vpermilpd W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.W0 0D /r"},
{"inst": "vpermilpd W:xmm, xmm/m128, ib/ub" , "op": "RM: VEX.128.66.0F3A.W0 05 /r ib"},
{"inst": "vpermilpd W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.W0 0D /r"},
{"inst": "vpermilpd W:ymm, ymm/m256, ib/ub" , "op": "RM: VEX.256.66.0F3A.W0 05 /r ib"},
{"inst": "vpermilps W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.W0 0C /r"},
{"inst": "vpermilps W:xmm, xmm/m128, ib/ub" , "op": "RM: VEX.128.66.0F3A.W0 04 /r ib"},
{"inst": "vpermilps W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.W0 0C /r"},
{"inst": "vpermilps W:ymm, ymm/m256, ib/ub" , "op": "RM: VEX.256.66.0F3A.W0 04 /r ib"},
{"inst": "vpextrb W:r32[7:0]/m8, xmm, ib/ub" , "op": "MR: VEX.128.66.0F3A.W0 14 /r ib"},
{"inst": "vpextrd W:r32/m32, xmm, ib/ub" , "op": "MR: VEX.128.66.0F3A.W0 16 /r ib"},
{"inst": "vpextrq W:r64/m64, xmm, ib/ub" , "op": "MR: VEX.128.66.0F3A.W1 16 /r ib"},
{"inst": "vpextrw W:r32[15:0], xmm, ib/ub" , "op": "RM: VEX.128.66.0F.W0 C5 /r ib"},
{"inst": "vpextrw W:r32[15:0]/m16, xmm, ib/ub" , "op": "MR: VEX.128.66.0F3A.W0 15 /r ib"},
{"inst": "vphaddd W:xmm, ~xmm, ~xmm/m128" , "op": "RVM: VEX.128.66.0F38.WIG 02 /r"},
{"inst": "vphaddsw W:xmm, ~xmm, ~xmm/m128" , "op": "RVM: VEX.128.66.0F38.WIG 03 /r"},
{"inst": "vphaddw W:xmm, ~xmm, ~xmm/m128" , "op": "RVM: VEX.128.66.0F38.WIG 01 /r"},
{"inst": "vphminposuw W:xmm[18:0], xmm/m128" , "op": "RM: VEX.128.66.0F38.WIG 41 /r"},
{"inst": "vphsubd W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.WIG 06 /r"},
{"inst": "vphsubsw W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.WIG 07 /r"},
{"inst": "vphsubw W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.WIG 05 /r"},
{"inst": "vpinsrb W:xmm, xmm, r32[7:0]/m8, ib/ub" , "op": "RVM: VEX.128.66.0F3A.W0 20 /r ib"},
{"inst": "vpinsrd W:xmm, xmm, r32/m32, ib/ub" , "op": "RVM: VEX.128.66.0F3A.W0 22 /r ib"},
{"inst": "vpinsrq W:xmm, xmm, r64/m64, ib/ub" , "op": "RVM: VEX.128.66.0F3A.W1 22 /r ib"},
{"inst": "vpinsrw W:xmm, xmm, r32[15:0]/m16, ib/ub" , "op": "RVM: VEX.128.66.0F.W0 C4 /r ib"},
{"inst": "vpmaddubsw W:xmm, ~xmm, ~xmm/m128" , "op": "RVM: VEX.128.66.0F38.WIG 04 /r"},
{"inst": "vpmaddwd W:xmm, ~xmm, ~xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG F5 /r"},
{"inst": "vpmaxsb W:xmm, ~xmm, ~xmm/m128" , "op": "RVM: VEX.128.66.0F38.WIG 3C /r"},
{"inst": "vpmaxsd W:xmm, ~xmm, ~xmm/m128" , "op": "RVM: VEX.128.66.0F38.WIG 3D /r"},
{"inst": "vpmaxsw W:xmm, ~xmm, ~xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG EE /r"},
{"inst": "vpmaxub W:xmm, ~xmm, ~xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG DE /r"},
{"inst": "vpmaxud W:xmm, ~xmm, ~xmm/m128" , "op": "RVM: VEX.128.66.0F38.WIG 3F /r"},
{"inst": "vpmaxuw W:xmm, ~xmm, ~xmm/m128" , "op": "RVM: VEX.128.66.0F38.WIG 3E /r"},
{"inst": "vpminsb W:xmm, ~xmm, ~xmm/m128" , "op": "RVM: VEX.128.66.0F38.WIG 38 /r"},
{"inst": "vpminsd W:xmm, ~xmm, ~xmm/m128" , "op": "RVM: VEX.128.66.0F38.WIG 39 /r"},
{"inst": "vpminsw W:xmm, ~xmm, ~xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG EA /r"},
{"inst": "vpminub W:xmm, ~xmm, ~xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG DA /r"},
{"inst": "vpminud W:xmm, ~xmm, ~xmm/m128" , "op": "RVM: VEX.128.66.0F38.WIG 3B /r"},
{"inst": "vpminuw W:xmm, ~xmm, ~xmm/m128" , "op": "RVM: VEX.128.66.0F38.WIG 3A /r"},
{"inst": "vpmovmskb W:r32[15:0], xmm" , "op": "RVM: VEX.128.66.0F.WIG D7 /r"},
{"inst": "vpmovsxwq W:xmm, xmm[31:0]/m32" , "op": "RM: VEX.128.66.0F38.WIG 24 /r"},
{"inst": "vpmovsxbd W:xmm, xmm[31:0]/m32" , "op": "RM: VEX.128.66.0F38.WIG 21 /r"},
{"inst": "vpmovsxbq W:xmm, xmm[15:0]/m16" , "op": "RM: VEX.128.66.0F38.WIG 22 /r"},
{"inst": "vpmovsxbw W:xmm, xmm[63:0]/m64" , "op": "RM: VEX.128.66.0F38.WIG 20 /r"},
{"inst": "vpmovsxdq W:xmm, xmm[63:0]/m64" , "op": "RM: VEX.128.66.0F38.WIG 25 /r"},
{"inst": "vpmovsxwd W:xmm, xmm[63:0]/m64" , "op": "RM: VEX.128.66.0F38.WIG 23 /r"},
{"inst": "vpmovzxbd W:xmm, xmm[31:0]/m32" , "op": "RM: VEX.128.66.0F38.WIG 31 /r"},
{"inst": "vpmovzxbq W:xmm, xmm[15:0]/m16" , "op": "RM: VEX.128.66.0F38.WIG 32 /r"},
{"inst": "vpmovzxbw W:xmm, xmm[63:0]/m64" , "op": "RM: VEX.128.66.0F38.WIG 30 /r"},
{"inst": "vpmovzxdq W:xmm, xmm[63:0]/m64" , "op": "RM: VEX.128.66.0F38.WIG 35 /r"},
{"inst": "vpmovzxwd W:xmm, xmm[63:0]/m64" , "op": "RM: VEX.128.66.0F38.WIG 33 /r"},
{"inst": "vpmovzxwq W:xmm, xmm[31:0]/m32" , "op": "RM: VEX.128.66.0F38.WIG 34 /r"},
{"inst": "vpmuldq W:xmm, ~xmm, ~xmm/m128" , "op": "RVM: VEX.128.66.0F38.WIG 28 /r"},
{"inst": "vpmulhrsw W:xmm, ~xmm, ~xmm/m128" , "op": "RVM: VEX.128.66.0F38.WIG 0B /r"},
{"inst": "vpmulhuw W:xmm, ~xmm, ~xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG E4 /r"},
{"inst": "vpmulhw W:xmm, ~xmm, ~xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG E5 /r"},
{"inst": "vpmulld W:xmm, ~xmm, ~xmm/m128" , "op": "RVM: VEX.128.66.0F38.WIG 40 /r"},
{"inst": "vpmullw W:xmm, ~xmm, ~xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG D5 /r"},
{"inst": "vpmuludq W:xmm, ~xmm, ~xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG F4 /r"},
{"inst": "vpor W:xmm, ~xmm, ~xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG EB /r"},
{"inst": "vpsadbw W:xmm, ~xmm, ~xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG F6 /r"},
{"inst": "vpshufb W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.WIG 00 /r"},
{"inst": "vpshufd W:xmm, xmm/m128, ib/ub" , "op": "RM: VEX.128.66.0F.WIG 70 /r ib"},
{"inst": "vpshufhw W:xmm, xmm/m128, ib/ub" , "op": "RM: VEX.128.F3.0F.WIG 70 /r ib"},
{"inst": "vpshuflw W:xmm, xmm/m128, ib/ub" , "op": "RM: VEX.128.F2.0F.WIG 70 /r ib"},
{"inst": "vpsignb W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.WIG 08 /r"},
{"inst": "vpsignd W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.WIG 0A /r"},
{"inst": "vpsignw W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.WIG 09 /r"},
{"inst": "vpslld W:xmm, xmm, ib/ub" , "op": "VM: VEX.128.66.0F.WIG 72 /6 ib"},
{"inst": "vpslld W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG F2 /r"},
{"inst": "vpslldq W:xmm, xmm, ib/ub" , "op": "VM: VEX.128.66.0F.WIG 73 /7 ib"},
{"inst": "vpsllq W:xmm, xmm, ib/ub" , "op": "VM: VEX.128.66.0F.WIG 73 /6 ib"},
{"inst": "vpsllq W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG F3 /r"},
{"inst": "vpsllw W:xmm, xmm, ib/ub" , "op": "VM: VEX.128.66.0F.WIG 71 /6 ib"},
{"inst": "vpsllw W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG F1 /r"},
{"inst": "vpsrad W:xmm, xmm, ib/ub" , "op": "VM: VEX.128.66.0F.WIG 72 /4 ib"},
{"inst": "vpsrad W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG E2 /r"},
{"inst": "vpsraw W:xmm, xmm, ib/ub" , "op": "VM: VEX.128.66.0F.WIG 71 /4 ib"},
{"inst": "vpsraw W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG E1 /r"},
{"inst": "vpsrld W:xmm, xmm, ib/ub" , "op": "VM: VEX.128.66.0F.WIG 72 /2 ib"},
{"inst": "vpsrld W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG D2 /r"},
{"inst": "vpsrldq W:xmm, xmm, ib/ub" , "op": "VM: VEX.128.66.0F.WIG 73 /3 ib"},
{"inst": "vpsrlq W:xmm, xmm, ib/ub" , "op": "VM: VEX.128.66.0F.WIG 73 /2 ib"},
{"inst": "vpsrlq W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG D3 /r"},
{"inst": "vpsrlw W:xmm, xmm, ib/ub" , "op": "VM: VEX.128.66.0F.WIG 71 /2 ib"},
{"inst": "vpsrlw W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG D1 /r"},
{"inst": "vpsubb W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG F8 /r"},
{"inst": "vpsubd W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG FA /r"},
{"inst": "vpsubq W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG FB /r"},
{"inst": "vpsubsb W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG E8 /r"},
{"inst": "vpsubsw W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG E9 /r"},
{"inst": "vpsubusb W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG D8 /r"},
{"inst": "vpsubusw W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG D9 /r"},
{"inst": "vpsubw W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG F9 /r"},
{"inst": "vptest R:~xmm, ~xmm/m128" , "op": "RM: VEX.128.66.0F38.WIG 17 /r", "io": "OF=0 SF=0 ZF=W AF=0 PF=0 CF=W"},
{"inst": "vptest R:~ymm, ~ymm/m256" , "op": "RM: VEX.256.66.0F38.WIG 17 /r", "io": "OF=0 SF=0 ZF=W AF=0 PF=0 CF=W"},
{"inst": "vpunpckhbw W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG 68 /r"},
{"inst": "vpunpckhdq W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG 6A /r"},
{"inst": "vpunpckhqdq W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG 6D /r"},
{"inst": "vpunpckhwd W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG 69 /r"},
{"inst": "vpunpcklbw W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG 60 /r"},
{"inst": "vpunpckldq W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG 62 /r"},
{"inst": "vpunpcklqdq W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG 6C /r"},
{"inst": "vpunpcklwd W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG 61 /r"},
{"inst": "vpxor W:xmm, ~xmm, ~xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG EF /r"},
{"inst": "vrcpps W:xmm, xmm/m128" , "op": "RM: VEX.128.0F.WIG 53 /r"},
{"inst": "vrcpps W:ymm, ymm/m256" , "op": "RM: VEX.256.0F.WIG 53 /r"},
{"inst": "vroundpd W:xmm, xmm/m128, ib/ub" , "op": "RM: VEX.128.66.0F3A.WIG 09 /r ib"},
{"inst": "vroundpd W:ymm, ymm/m256, ib/ub" , "op": "RM: VEX.256.66.0F3A.WIG 09 /r ib"},
{"inst": "vroundps W:xmm, xmm/m128, ib/ub" , "op": "RM: VEX.128.66.0F3A.WIG 08 /r ib"},
{"inst": "vroundps W:ymm, ymm/m256, ib/ub" , "op": "RM: VEX.256.66.0F3A.WIG 08 /r ib"},
{"inst": "vrsqrtps W:xmm, xmm/m128" , "op": "RM: VEX.128.0F.WIG 52 /r"},
{"inst": "vrsqrtps W:ymm, ymm/m256" , "op": "RM: VEX.256.0F.WIG 52 /r"},
{"inst": "vshufpd W:xmm, xmm, xmm/m128, ib/ub" , "op": "RVM: VEX.128.66.0F.WIG C6 /r ib"},
{"inst": "vshufpd W:ymm, ymm, ymm/m256, ib/ub" , "op": "RVM: VEX.256.66.0F.WIG C6 /r ib"},
{"inst": "vshufps W:xmm, xmm, xmm/m128, ib/ub" , "op": "RVM: VEX.128.0F.WIG C6 /r ib"},
{"inst": "vshufps W:ymm, ymm, ymm/m256, ib/ub" , "op": "RVM: VEX.256.0F.WIG C6 /r ib"},
{"inst": "vsqrtpd W:xmm, xmm/m128" , "op": "RM: VEX.128.66.0F.WIG 51 /r"},
{"inst": "vsqrtpd W:ymm, ymm/m256" , "op": "RM: VEX.256.66.0F.WIG 51 /r"},
{"inst": "vsqrtps W:xmm, xmm/m128" , "op": "RM: VEX.128.0F.WIG 51 /r"},
{"inst": "vsqrtps W:ymm, ymm/m256" , "op": "RM: VEX.256.0F.WIG 51 /r"},
{"inst": "vsubpd W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG 5C /r"},
{"inst": "vsubpd W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG 5C /r"},
{"inst": "vsubps W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.0F.WIG 5C /r"},
{"inst": "vsubps W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.0F.WIG 5C /r"},
{"inst": "vtestpd R:~xmm, ~xmm/m128" , "op": "RM: VEX.128.66.0F38.W0 0F /r", "io": "OF=0 SF=0 ZF=W AF=0 PF=0 CF=W"},
{"inst": "vtestpd R:~ymm, ~ymm/m256" , "op": "RM: VEX.256.66.0F38.W0 0F /r", "io": "OF=0 SF=0 ZF=W AF=0 PF=0 CF=W"},
{"inst": "vtestps R:~xmm, ~xmm/m128" , "op": "RM: VEX.128.66.0F38.W0 0E /r", "io": "OF=0 SF=0 ZF=W AF=0 PF=0 CF=W"},
{"inst": "vtestps R:~ymm, ~ymm/m256" , "op": "RM: VEX.256.66.0F38.W0 0E /r", "io": "OF=0 SF=0 ZF=W AF=0 PF=0 CF=W"},
{"inst": "vunpckhpd W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG 15 /r"},
{"inst": "vunpckhpd W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG 15 /r"},
{"inst": "vunpckhps W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.0F.WIG 15 /r"},
{"inst": "vunpckhps W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.0F.WIG 15 /r"},
{"inst": "vunpcklpd W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG 14 /r"},
{"inst": "vunpcklpd W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG 14 /r"},
{"inst": "vunpcklps W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.0F.WIG 14 /r"},
{"inst": "vunpcklps W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.0F.WIG 14 /r"},
{"inst": "vxorpd W:xmm, ~xmm, ~xmm/m128" , "op": "RVM: VEX.128.66.0F.WIG 57 /r"},
{"inst": "vxorpd W:ymm, ~ymm, ~ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG 57 /r"},
{"inst": "vxorps W:xmm, ~xmm, ~xmm/m128" , "op": "RVM: VEX.128.0F.WIG 57 /r"},
{"inst": "vxorps W:ymm, ~ymm, ~ymm/m256" , "op": "RVM: VEX.256.0F.WIG 57 /r"}
]},
{"category": "AVX SIMD CRYPTO_HASH", "ext": "AVX AESNI", "data": [
{"inst": "vaesdec W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.WIG DE /r"},
{"inst": "vaesdeclast W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.WIG DF /r"},
{"inst": "vaesenc W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.WIG DC /r"},
{"inst": "vaesenclast W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.WIG DD /r"},
{"inst": "vaesimc W:xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.WIG DB /r"},
{"inst": "vaeskeygenassist W:xmm, xmm/m128, ib/ub" , "op": "RVM: VEX.128.66.0F3A.WIG DF /r ib"}
]},
{"category": "AVX SIMD CRYPTO_HASH", "ext": "VAES", "data": [
{"inst": "vaesdec W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.WIG DE /r"},
{"inst": "vaesdeclast W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.WIG DF /r"},
{"inst": "vaesenc W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.WIG DC /r"},
{"inst": "vaesenclast W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.WIG DD /r"}
]},
{"category": "AVX SIMD", "ext": "AVX GFNI", "data": [
{"inst": "vgf2p8affineinvqb W:xmm, xmm, xmm/m128, ib/ub" , "op": "RVM: VEX.128.66.0F3A.W1 CF /r ib"},
{"inst": "vgf2p8affineinvqb W:ymm, ymm, ymm/m256, ib/ub" , "op": "RVM: VEX.256.66.0F3A.W1 CF /r ib"},
{"inst": "vgf2p8affineqb W:xmm, xmm, xmm/m128, ib/ub" , "op": "RVM: VEX.128.66.0F3A.W1 CE /r ib"},
{"inst": "vgf2p8affineqb W:ymm, ymm, ymm/m256, ib/ub" , "op": "RVM: VEX.256.66.0F3A.W1 CE /r ib"},
{"inst": "vgf2p8mulb W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.W0 CF /r"},
{"inst": "vgf2p8mulb W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.W0 CF /r"}
]},
{"category": "AVX SIMD", "ext": "AVX PCLMULQDQ", "data": [
{"inst": "vpclmulqdq W:xmm, xmm, xmm/m128, ib/ub" , "op": "RVM: VEX.128.66.0F3A.WIG 44 /r ib"}
]},
{"category": "AVX SIMD", "ext": "AVX2", "data": [
{"inst": "vbroadcasti128 W:ymm, m128" , "op": "RM: VEX.256.66.0F38.W0 5A /r"},
{"inst": "vbroadcastsd W:ymm, xmm[63:0]" , "op": "RM: VEX.256.66.0F38.W0 19 /r"},
{"inst": "vbroadcastss W:xmm, xmm[31:0]" , "op": "RM: VEX.128.66.0F38.W0 18 /r"},
{"inst": "vbroadcastss W:ymm, xmm[31:0]" , "op": "RM: VEX.256.66.0F38.W0 18 /r"},
{"inst": "vextracti128 W:xmm/m128, ymm, ib/ub" , "op": "MR: VEX.256.66.0F3A.W0 39 /r ib"},
{"inst": "vgatherdpd X:xmm, vm32x, X:xmm" , "op": "RMV: VEX.128.66.0F38.W1 92 /r"},
{"inst": "vgatherdpd X:ymm, vm32x, X:ymm" , "op": "RMV: VEX.256.66.0F38.W1 92 /r"},
{"inst": "vgatherdps X:xmm, vm32x, X:xmm" , "op": "RMV: VEX.128.66.0F38.W0 92 /r"},
{"inst": "vgatherdps X:ymm, vm32y, X:ymm" , "op": "RMV: VEX.256.66.0F38.W0 92 /r"},
{"inst": "vgatherqpd X:xmm, vm64x, X:xmm" , "op": "RMV: VEX.128.66.0F38.W1 93 /r"},
{"inst": "vgatherqpd X:ymm, vm64y, X:ymm" , "op": "RMV: VEX.256.66.0F38.W1 93 /r"},
{"inst": "vgatherqps X:xmm, vm64x, X:xmm" , "op": "RMV: VEX.128.66.0F38.W0 93 /r"},
{"inst": "vgatherqps X:xmm, vm64y, X:xmm" , "op": "RMV: VEX.256.66.0F38.W0 93 /r"},
{"inst": "vinserti128 W:ymm, ymm, xmm/m128, ib/ub" , "op": "RVM: VEX.256.66.0F3A.W0 38 /r ib"},
{"inst": "vmovntdqa W:ymm, m256" , "op": "RM: VEX.256.66.0F38.WIG 2A /r"},
{"inst": "vmpsadbw W:ymm, ymm, ymm/m256, ib/ub" , "op": "RVM: VEX.256.66.0F3A.WIG 42 /r ib"},
{"inst": "vpabsb W:ymm, ymm/m256" , "op": "RM: VEX.256.66.0F38.WIG 1C /r"},
{"inst": "vpabsd W:ymm, ymm/m256" , "op": "RM: VEX.256.66.0F38.WIG 1E /r"},
{"inst": "vpabsw W:ymm, ymm/m256" , "op": "RM: VEX.256.66.0F38.WIG 1D /r"},
{"inst": "vpackssdw W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG 6B /r"},
{"inst": "vpacksswb W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG 63 /r"},
{"inst": "vpackusdw W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.WIG 2B /r"},
{"inst": "vpackuswb W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG 67 /r"},
{"inst": "vpaddb W:ymm, ~ymm, ~ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG FC /r"},
{"inst": "vpaddd W:ymm, ~ymm, ~ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG FE /r"},
{"inst": "vpaddq W:ymm, ~ymm, ~ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG D4 /r"},
{"inst": "vpaddsb W:ymm, ~ymm, ~ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG EC /r"},
{"inst": "vpaddsw W:ymm, ~ymm, ~ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG ED /r"},
{"inst": "vpaddusb W:ymm, ~ymm, ~ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG DC /r"},
{"inst": "vpaddusw W:ymm, ~ymm, ~ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG DD /r"},
{"inst": "vpaddw W:ymm, ~ymm, ~ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG FD /r"},
{"inst": "vpalignr W:ymm, ymm, ymm/m256, ib/ub" , "op": "RVM: VEX.256.66.0F3A.WIG 0F /r ib"},
{"inst": "vpand W:ymm, ~ymm, ~ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG DB /r"},
{"inst": "vpandn W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG DF /r"},
{"inst": "vpavgb W:ymm, ~ymm, ~ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG E0 /r"},
{"inst": "vpavgw W:ymm, ~ymm, ~ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG E3 /r"},
{"inst": "vpblendd W:xmm, xmm, xmm/m128, ib/ub" , "op": "RVM: VEX.128.66.0F3A.W0 02 /r ib"},
{"inst": "vpblendd W:ymm, ymm, ymm/m256, ib/ub" , "op": "RVM: VEX.256.66.0F3A.W0 02 /r ib"},
{"inst": "vpblendvb W:ymm, ymm, ymm/m256, ymm" , "op": "RVMS: VEX.256.66.0F3A.W0 4C /r /is4"},
{"inst": "vpblendw W:ymm, ymm, ymm/m256, ib/ub" , "op": "RVM: VEX.256.66.0F3A.WIG 0E /r ib"},
{"inst": "vpbroadcastb W:xmm, xmm[7:0]/m8" , "op": "RM: VEX.128.66.0F38.W0 78 /r"},
{"inst": "vpbroadcastb W:ymm, xmm[7:0]/m8" , "op": "RM: VEX.256.66.0F38.W0 78 /r"},
{"inst": "vpbroadcastd W:xmm, xmm[31:0]/m32" , "op": "RM: VEX.128.66.0F38.W0 58 /r"},
{"inst": "vpbroadcastd W:ymm, xmm[31:0]/m32" , "op": "RM: VEX.256.66.0F38.W0 58 /r"},
{"inst": "vpbroadcastq W:xmm, xmm[63:0]/m64" , "op": "RM: VEX.128.66.0F38.W0 59 /r"},
{"inst": "vpbroadcastq W:ymm, xmm[63:0]/m64" , "op": "RM: VEX.256.66.0F38.W0 59 /r"},
{"inst": "vpbroadcastw W:xmm, xmm[15:0]/m16" , "op": "RM: VEX.128.66.0F38.W0 79 /r"},
{"inst": "vpbroadcastw W:ymm, xmm[15:0]/m16" , "op": "RM: VEX.256.66.0F38.W0 79 /r"},
{"inst": "vpcmpeqb W:ymm, ~ymm, ~ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG 74 /r"},
{"inst": "vpcmpeqd W:ymm, ~ymm, ~ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG 76 /r"},
{"inst": "vpcmpeqq W:ymm, ~ymm, ~ymm/m256" , "op": "RVM: VEX.256.66.0F38.WIG 29 /r"},
{"inst": "vpcmpeqw W:ymm, ~ymm, ~ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG 75 /r"},
{"inst": "vpcmpgtb W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG 64 /r"},
{"inst": "vpcmpgtd W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG 66 /r"},
{"inst": "vpcmpgtq W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.WIG 37 /r"},
{"inst": "vpcmpgtw W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG 65 /r"},
{"inst": "vperm2i128 W:ymm, ymm, ymm/m256, ib/ub" , "op": "RVM: VEX.256.66.0F3A.W0 46 /r ib"},
{"inst": "vpermd W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.W0 36 /r"},
{"inst": "vpermpd W:ymm, ymm/m256, ib/ub" , "op": "RM: VEX.256.66.0F3A.W1 01 /r ib"},
{"inst": "vpermps W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.W0 16 /r"},
{"inst": "vpermq W:ymm, ymm/m256, ib/ub" , "op": "RM: VEX.256.66.0F3A.W1 00 /r ib"},
{"inst": "vpgatherdd X:xmm, vm32x, X:xmm" , "op": "RMV: VEX.128.66.0F38.W0 90 /r"},
{"inst": "vpgatherdd X:ymm, vm32y, X:ymm" , "op": "RMV: VEX.256.66.0F38.W0 90 /r"},
{"inst": "vpgatherdq X:xmm, vm32x, X:xmm" , "op": "RMV: VEX.128.66.0F38.W1 90 /r"},
{"inst": "vpgatherdq X:ymm, vm32x, X:ymm" , "op": "RMV: VEX.256.66.0F38.W1 90 /r"},
{"inst": "vpgatherqd X:xmm, vm64x, X:xmm" , "op": "RMV: VEX.128.66.0F38.W0 91 /r"},
{"inst": "vpgatherqd X:xmm, vm64y, X:xmm" , "op": "RMV: VEX.256.66.0F38.W0 91 /r"},
{"inst": "vpgatherqq X:xmm, vm64x, X:xmm" , "op": "RMV: VEX.128.66.0F38.W1 91 /r"},
{"inst": "vpgatherqq X:ymm, vm64y, X:ymm" , "op": "RMV: VEX.256.66.0F38.W1 91 /r"},
{"inst": "vphaddd W:ymm, ~ymm, ~ymm/m256" , "op": "RVM: VEX.256.66.0F38.WIG 02 /r"},
{"inst": "vphaddsw W:ymm, ~ymm, ~ymm/m256" , "op": "RVM: VEX.256.66.0F38.WIG 03 /r"},
{"inst": "vphaddw W:ymm, ~ymm, ~ymm/m256" , "op": "RVM: VEX.256.66.0F38.WIG 01 /r"},
{"inst": "vphsubd W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.WIG 06 /r"},
{"inst": "vphsubsw W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.WIG 07 /r"},
{"inst": "vphsubw W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.WIG 05 /r"},
{"inst": "vpmaddubsw W:ymm, ~ymm, ~ymm/m256" , "op": "RVM: VEX.256.66.0F38.WIG 04 /r"},
{"inst": "vpmaddwd W:ymm, ~ymm, ~ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG F5 /r"},
{"inst": "vpmaskmovd X:m128, xmm, xmm" , "op": "MVR: VEX.128.66.0F38.W0 8E /r"},
{"inst": "vpmaskmovd X:m256, ymm, ymm" , "op": "MVR: VEX.256.66.0F38.W0 8E /r"},
{"inst": "vpmaskmovd W:xmm, xmm, m128" , "op": "RVM: VEX.128.66.0F38.W0 8C /r"},
{"inst": "vpmaskmovd W:ymm, ymm, m256" , "op": "RVM: VEX.256.66.0F38.W0 8C /r"},
{"inst": "vpmaskmovq X:m128, xmm, xmm" , "op": "MVR: VEX.128.66.0F38.W1 8E /r"},
{"inst": "vpmaskmovq X:m256, ymm, ymm" , "op": "MVR: VEX.256.66.0F38.W1 8E /r"},
{"inst": "vpmaskmovq W:xmm, xmm, m128" , "op": "RVM: VEX.128.66.0F38.W1 8C /r"},
{"inst": "vpmaskmovq W:ymm, ymm, m256" , "op": "RVM: VEX.256.66.0F38.W1 8C /r"},
{"inst": "vpmaxsb W:ymm, ~ymm, ~ymm/m256" , "op": "RVM: VEX.256.66.0F38.WIG 3C /r"},
{"inst": "vpmaxsd W:ymm, ~ymm, ~ymm/m256" , "op": "RVM: VEX.256.66.0F38.WIG 3D /r"},
{"inst": "vpmaxsw W:ymm, ~ymm, ~ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG EE /r"},
{"inst": "vpmaxub W:ymm, ~ymm, ~ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG DE /r"},
{"inst": "vpmaxud W:ymm, ~ymm, ~ymm/m256" , "op": "RVM: VEX.256.66.0F38.WIG 3F /r"},
{"inst": "vpmaxuw W:ymm, ~ymm, ~ymm/m256" , "op": "RVM: VEX.256.66.0F38.WIG 3E /r"},
{"inst": "vpminsb W:ymm, ~ymm, ~ymm/m256" , "op": "RVM: VEX.256.66.0F38.WIG 38 /r"},
{"inst": "vpminsd W:ymm, ~ymm, ~ymm/m256" , "op": "RVM: VEX.256.66.0F38.WIG 39 /r"},
{"inst": "vpminsw W:ymm, ~ymm, ~ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG EA /r"},
{"inst": "vpminub W:ymm, ~ymm, ~ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG DA /r"},
{"inst": "vpminud W:ymm, ~ymm, ~ymm/m256" , "op": "RVM: VEX.256.66.0F38.WIG 3B /r"},
{"inst": "vpminuw W:ymm, ~ymm, ~ymm/m256" , "op": "RVM: VEX.256.66.0F38.WIG 3A /r"},
{"inst": "vpmovmskb W:r32[31:0], ymm" , "op": "RVM: VEX.256.66.0F.WIG D7 /r"},
{"inst": "vpmovsxbd W:ymm, xmm[63:0]/m64" , "op": "RM: VEX.256.66.0F38.WIG 21 /r"},
{"inst": "vpmovsxbq W:ymm, xmm[31:0]/m32" , "op": "RM: VEX.256.66.0F38.WIG 22 /r"},
{"inst": "vpmovsxbw W:ymm, xmm/m128" , "op": "RM: VEX.256.66.0F38.WIG 20 /r"},
{"inst": "vpmovsxdq W:ymm, xmm/m128" , "op": "RM: VEX.256.66.0F38.WIG 25 /r"},
{"inst": "vpmovsxwd W:ymm, xmm/m128" , "op": "RM: VEX.256.66.0F38.WIG 23 /r"},
{"inst": "vpmovsxwq W:ymm, xmm[63:0]/m64" , "op": "RM: VEX.256.66.0F38.WIG 24 /r"},
{"inst": "vpmovzxbd W:ymm, xmm[63:0]/m64" , "op": "RM: VEX.256.66.0F38.WIG 31 /r"},
{"inst": "vpmovzxbq W:ymm, xmm[31:0]/m32" , "op": "RM: VEX.256.66.0F38.WIG 32 /r"},
{"inst": "vpmovzxbw W:ymm, xmm/m128" , "op": "RM: VEX.256.66.0F38.WIG 30 /r"},
{"inst": "vpmovzxdq W:ymm, xmm/m128" , "op": "RM: VEX.256.66.0F38.WIG 35 /r"},
{"inst": "vpmovzxwd W:ymm, xmm/m128" , "op": "RM: VEX.256.66.0F38.WIG 33 /r"},
{"inst": "vpmovzxwq W:ymm, xmm[63:0]/m64" , "op": "RM: VEX.256.66.0F38.WIG 34 /r"},
{"inst": "vpmuldq W:ymm, ~ymm, ~ymm/m256" , "op": "RVM: VEX.256.66.0F38.WIG 28 /r"},
{"inst": "vpmulhrsw W:ymm, ~ymm, ~ymm/m256" , "op": "RVM: VEX.256.66.0F38.WIG 0B /r"},
{"inst": "vpmulhuw W:ymm, ~ymm, ~ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG E4 /r"},
{"inst": "vpmulhw W:ymm, ~ymm, ~ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG E5 /r"},
{"inst": "vpmulld W:ymm, ~ymm, ~ymm/m256" , "op": "RVM: VEX.256.66.0F38.WIG 40 /r"},
{"inst": "vpmullw W:ymm, ~ymm, ~ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG D5 /r"},
{"inst": "vpmuludq W:ymm, ~ymm, ~ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG F4 /r"},
{"inst": "vpor W:ymm, ~ymm, ~ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG EB /r"},
{"inst": "vpsadbw W:ymm, ~ymm, ~ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG F6 /r"},
{"inst": "vpshufb W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.WIG 00 /r"},
{"inst": "vpshufd W:ymm, ymm/m256, ib/ub" , "op": "RM: VEX.256.66.0F.WIG 70 /r ib"},
{"inst": "vpshufhw W:ymm, ymm/m256, ib/ub" , "op": "RM: VEX.256.F3.0F.WIG 70 /r ib"},
{"inst": "vpshuflw W:ymm, ymm/m256, ib/ub" , "op": "RM: VEX.256.F2.0F.WIG 70 /r ib"},
{"inst": "vpsignb W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.WIG 08 /r"},
{"inst": "vpsignd W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.WIG 0A /r"},
{"inst": "vpsignw W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.WIG 09 /r"},
{"inst": "vpslld W:ymm, ymm, ib/ub" , "op": "VM: VEX.256.66.0F.WIG 72 /6 ib"},
{"inst": "vpslld W:ymm, ymm, xmm/m128" , "op": "RVM: VEX.256.66.0F.WIG F2 /r"},
{"inst": "vpslldq W:ymm, ymm, ib/ub" , "op": "VM: VEX.256.66.0F.WIG 73 /7 ib"},
{"inst": "vpsllq W:ymm, ymm, ib/ub" , "op": "VM: VEX.256.66.0F.WIG 73 /6 ib"},
{"inst": "vpsllq W:ymm, ymm, xmm/m128" , "op": "RVM: VEX.256.66.0F.WIG F3 /r"},
{"inst": "vpsllvd W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.W0 47 /r"},
{"inst": "vpsllvd W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.W0 47 /r"},
{"inst": "vpsllvq W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.W1 47 /r"},
{"inst": "vpsllvq W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.W1 47 /r"},
{"inst": "vpsllw W:ymm, ymm, ib/ub" , "op": "VM: VEX.256.66.0F.WIG 71 /6 ib"},
{"inst": "vpsllw W:ymm, ymm, xmm/m128" , "op": "RVM: VEX.256.66.0F.WIG F1 /r"},
{"inst": "vpsrad W:ymm, ymm, ib/ub" , "op": "VM: VEX.256.66.0F.WIG 72 /4 ib"},
{"inst": "vpsrad W:ymm, ymm, xmm/m128" , "op": "RVM: VEX.256.66.0F.WIG E2 /r"},
{"inst": "vpsravd W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.W0 46 /r"},
{"inst": "vpsravd W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.W0 46 /r"},
{"inst": "vpsraw W:ymm, ymm, ib/ub" , "op": "VM: VEX.256.66.0F.WIG 71 /4 ib"},
{"inst": "vpsraw W:ymm, ymm, xmm/m128" , "op": "RVM: VEX.256.66.0F.WIG E1 /r"},
{"inst": "vpsrld W:ymm, ymm, ib/ub" , "op": "VM: VEX.256.66.0F.WIG 72 /2 ib"},
{"inst": "vpsrld W:ymm, ymm, xmm/m128" , "op": "RVM: VEX.256.66.0F.WIG D2 /r"},
{"inst": "vpsrldq W:ymm, ymm, ib/ub" , "op": "VM: VEX.256.66.0F.WIG 73 /3 ib"},
{"inst": "vpsrlq W:ymm, ymm, ib/ub" , "op": "VM: VEX.256.66.0F.WIG 73 /2 ib"},
{"inst": "vpsrlq W:ymm, ymm, xmm/m128" , "op": "RVM: VEX.256.66.0F.WIG D3 /r"},
{"inst": "vpsrlvd W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.W0 45 /r"},
{"inst": "vpsrlvd W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.W0 45 /r"},
{"inst": "vpsrlvq W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.W1 45 /r"},
{"inst": "vpsrlvq W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.W1 45 /r"},
{"inst": "vpsrlw W:ymm, ymm, ib/ub" , "op": "VM: VEX.256.66.0F.WIG 71 /2 ib"},
{"inst": "vpsrlw W:ymm, ymm, xmm/m128" , "op": "RVM: VEX.256.66.0F.WIG D1 /r"},
{"inst": "vpsubb W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG F8 /r"},
{"inst": "vpsubd W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG FA /r"},
{"inst": "vpsubq W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG FB /r"},
{"inst": "vpsubsb W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG E8 /r"},
{"inst": "vpsubsw W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG E9 /r"},
{"inst": "vpsubusb W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG D8 /r"},
{"inst": "vpsubusw W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG D9 /r"},
{"inst": "vpsubw W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG F9 /r"},
{"inst": "vpunpckhbw W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG 68 /r"},
{"inst": "vpunpckhdq W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG 6A /r"},
{"inst": "vpunpckhqdq W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG 6D /r"},
{"inst": "vpunpckhwd W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG 69 /r"},
{"inst": "vpunpcklbw W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG 60 /r"},
{"inst": "vpunpckldq W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG 62 /r"},
{"inst": "vpunpcklqdq W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG 6C /r"},
{"inst": "vpunpcklwd W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG 61 /r"},
{"inst": "vpxor W:ymm, ~ymm, ~ymm/m256" , "op": "RVM: VEX.256.66.0F.WIG EF /r"}
]},
{"category": "AVX SIMD", "ext": "F16C", "data": [
{"inst": "vcvtph2ps W:xmm, xmm[63:0]/m64" , "op": "RM: VEX.128.66.0F38.W0 13 /r"},
{"inst": "vcvtph2ps W:ymm, xmm/m128" , "op": "RM: VEX.256.66.0F38.W0 13 /r"},
{"inst": "vcvtps2ph W:xmm[63:0]/m64, xmm, ib/ub" , "op": "MR: VEX.128.66.0F3A.W0 1D /r ib"},
{"inst": "vcvtps2ph W:xmm/m128, ymm, ib/ub" , "op": "MR: VEX.256.66.0F3A.W0 1D /r ib"}
]},
{"category": "AVX SCALAR", "ext": "FMA", "data": [
{"inst": "vfmadd132sd x:xmm[63:0], xmm[63:0], xmm[63:0]/m64" , "op": "RVM: VEX.LIG.66.0F38.W1 99 /r"},
{"inst": "vfmadd132ss x:xmm[31:0], xmm[31:0], xmm[31:0]/m32" , "op": "RVM: VEX.LIG.66.0F38.W0 99 /r"},
{"inst": "vfmadd213sd x:xmm[63:0], xmm[63:0], xmm[63:0]/m64" , "op": "RVM: VEX.LIG.66.0F38.W1 A9 /r"},
{"inst": "vfmadd213ss x:xmm[31:0], xmm[31:0], xmm[31:0]/m32" , "op": "RVM: VEX.LIG.66.0F38.W0 A9 /r"},
{"inst": "vfmadd231sd x:xmm[63:0], xmm[63:0], xmm[63:0]/m64" , "op": "RVM: VEX.LIG.66.0F38.W1 B9 /r"},
{"inst": "vfmadd231ss x:xmm[31:0], xmm[31:0], xmm[31:0]/m32" , "op": "RVM: VEX.LIG.66.0F38.W0 B9 /r"},
{"inst": "vfmsub132sd x:xmm[63:0], xmm[63:0], xmm[63:0]/m64" , "op": "RVM: VEX.LIG.66.0F38.W1 9B /r"},
{"inst": "vfmsub132ss x:xmm[31:0], xmm[31:0], xmm[31:0]/m32" , "op": "RVM: VEX.LIG.66.0F38.W0 9B /r"},
{"inst": "vfmsub213sd x:xmm[63:0], xmm[63:0], xmm[63:0]/m64" , "op": "RVM: VEX.LIG.66.0F38.W1 AB /r"},
{"inst": "vfmsub213ss x:xmm[31:0], xmm[31:0], xmm[31:0]/m32" , "op": "RVM: VEX.LIG.66.0F38.W0 AB /r"},
{"inst": "vfmsub231sd x:xmm[63:0], xmm[63:0], xmm[63:0]/m64" , "op": "RVM: VEX.LIG.66.0F38.W1 BB /r"},
{"inst": "vfmsub231ss x:xmm[31:0], xmm[31:0], xmm[31:0]/m32" , "op": "RVM: VEX.LIG.66.0F38.W0 BB /r"},
{"inst": "vfnmadd132sd x:xmm[63:0], xmm[63:0], xmm[63:0]/m64" , "op": "RVM: VEX.LIG.66.0F38.W1 9D /r"},
{"inst": "vfnmadd132ss x:xmm[31:0], xmm[31:0], xmm[31:0]/m32" , "op": "RVM: VEX.LIG.66.0F38.W0 9D /r"},
{"inst": "vfnmadd213sd x:xmm[63:0], xmm[63:0], xmm[63:0]/m64" , "op": "RVM: VEX.LIG.66.0F38.W1 AD /r"},
{"inst": "vfnmadd213ss x:xmm[31:0], xmm[31:0], xmm[31:0]/m32" , "op": "RVM: VEX.LIG.66.0F38.W0 AD /r"},
{"inst": "vfnmadd231sd x:xmm[63:0], xmm[63:0], xmm[63:0]/m64" , "op": "RVM: VEX.LIG.66.0F38.W1 BD /r"},
{"inst": "vfnmadd231ss x:xmm[31:0], xmm[31:0], xmm[31:0]/m32" , "op": "RVM: VEX.LIG.66.0F38.W0 BD /r"},
{"inst": "vfnmsub132sd x:xmm[63:0], xmm[63:0], xmm[63:0]/m64" , "op": "RVM: VEX.LIG.66.0F38.W1 9F /r"},
{"inst": "vfnmsub132ss x:xmm[31:0], xmm[31:0], xmm[31:0]/m32" , "op": "RVM: VEX.LIG.66.0F38.W0 9F /r"},
{"inst": "vfnmsub213sd x:xmm[63:0], xmm[63:0], xmm[63:0]/m64" , "op": "RVM: VEX.LIG.66.0F38.W1 AF /r"},
{"inst": "vfnmsub213ss x:xmm[31:0], xmm[31:0], xmm[31:0]/m32" , "op": "RVM: VEX.LIG.66.0F38.W0 AF /r"},
{"inst": "vfnmsub231sd x:xmm[63:0], xmm[63:0], xmm[63:0]/m64" , "op": "RVM: VEX.LIG.66.0F38.W1 BF /r"},
{"inst": "vfnmsub231ss x:xmm[31:0], xmm[31:0], xmm[31:0]/m32" , "op": "RVM: VEX.LIG.66.0F38.W0 BF /r"}
]},
{"category": "AVX SIMD", "ext": "FMA", "data": [
{"inst": "vfmadd132pd X:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.W1 98 /r"},
{"inst": "vfmadd132pd X:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.W1 98 /r"},
{"inst": "vfmadd132ps X:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.W0 98 /r"},
{"inst": "vfmadd132ps X:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.W0 98 /r"},
{"inst": "vfmadd213pd X:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.W1 A8 /r"},
{"inst": "vfmadd213pd X:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.W1 A8 /r"},
{"inst": "vfmadd213ps X:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.W0 A8 /r"},
{"inst": "vfmadd213ps X:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.W0 A8 /r"},
{"inst": "vfmadd231pd X:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.W1 B8 /r"},
{"inst": "vfmadd231pd X:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.W1 B8 /r"},
{"inst": "vfmadd231ps X:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.W0 B8 /r"},
{"inst": "vfmadd231ps X:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.W0 B8 /r"},
{"inst": "vfmaddsub132pd X:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.W1 96 /r"},
{"inst": "vfmaddsub132pd X:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.W1 96 /r"},
{"inst": "vfmaddsub132ps X:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.W0 96 /r"},
{"inst": "vfmaddsub132ps X:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.W0 96 /r"},
{"inst": "vfmaddsub213pd X:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.W1 A6 /r"},
{"inst": "vfmaddsub213pd X:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.W1 A6 /r"},
{"inst": "vfmaddsub213ps X:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.W0 A6 /r"},
{"inst": "vfmaddsub213ps X:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.W0 A6 /r"},
{"inst": "vfmaddsub231pd X:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.W1 B6 /r"},
{"inst": "vfmaddsub231pd X:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.W1 B6 /r"},
{"inst": "vfmaddsub231ps X:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.W0 B6 /r"},
{"inst": "vfmaddsub231ps X:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.W0 B6 /r"},
{"inst": "vfmsub132pd X:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.W1 9A /r"},
{"inst": "vfmsub132pd X:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.W1 9A /r"},
{"inst": "vfmsub132ps X:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.W0 9A /r"},
{"inst": "vfmsub132ps X:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.W0 9A /r"},
{"inst": "vfmsub213pd X:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.W1 AA /r"},
{"inst": "vfmsub213pd X:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.W1 AA /r"},
{"inst": "vfmsub213ps X:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.W0 AA /r"},
{"inst": "vfmsub213ps X:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.W0 AA /r"},
{"inst": "vfmsub231pd X:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.W1 BA /r"},
{"inst": "vfmsub231pd X:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.W1 BA /r"},
{"inst": "vfmsub231ps X:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.W0 BA /r"},
{"inst": "vfmsub231ps X:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.W0 BA /r"},
{"inst": "vfmsubadd132pd X:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.W1 97 /r"},
{"inst": "vfmsubadd132pd X:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.W1 97 /r"},
{"inst": "vfmsubadd132ps X:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.W0 97 /r"},
{"inst": "vfmsubadd132ps X:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.W0 97 /r"},
{"inst": "vfmsubadd213pd X:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.W1 A7 /r"},
{"inst": "vfmsubadd213pd X:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.W1 A7 /r"},
{"inst": "vfmsubadd213ps X:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.W0 A7 /r"},
{"inst": "vfmsubadd213ps X:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.W0 A7 /r"},
{"inst": "vfmsubadd231pd X:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.W1 B7 /r"},
{"inst": "vfmsubadd231pd X:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.W1 B7 /r"},
{"inst": "vfmsubadd231ps X:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.W0 B7 /r"},
{"inst": "vfmsubadd231ps X:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.W0 B7 /r"},
{"inst": "vfnmadd132pd X:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.W1 9C /r"},
{"inst": "vfnmadd132pd X:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.W1 9C /r"},
{"inst": "vfnmadd132ps X:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.W0 9C /r"},
{"inst": "vfnmadd132ps X:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.W0 9C /r"},
{"inst": "vfnmadd213pd X:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.W1 AC /r"},
{"inst": "vfnmadd213pd X:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.W1 AC /r"},
{"inst": "vfnmadd213ps X:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.W0 AC /r"},
{"inst": "vfnmadd213ps X:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.W0 AC /r"},
{"inst": "vfnmadd231pd X:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.W1 BC /r"},
{"inst": "vfnmadd231pd X:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.W1 BC /r"},
{"inst": "vfnmadd231ps X:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.W0 BC /r"},
{"inst": "vfnmadd231ps X:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.W0 BC /r"},
{"inst": "vfnmsub132pd X:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.W1 9E /r"},
{"inst": "vfnmsub132pd X:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.W1 9E /r"},
{"inst": "vfnmsub132ps X:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.W0 9E /r"},
{"inst": "vfnmsub132ps X:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.W0 9E /r"},
{"inst": "vfnmsub213pd X:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.W1 AE /r"},
{"inst": "vfnmsub213pd X:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.W1 AE /r"},
{"inst": "vfnmsub213ps X:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.W0 AE /r"},
{"inst": "vfnmsub213ps X:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.W0 AE /r"},
{"inst": "vfnmsub231pd X:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.W1 BE /r"},
{"inst": "vfnmsub231pd X:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.W1 BE /r"},
{"inst": "vfnmsub231ps X:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.W0 BE /r"},
{"inst": "vfnmsub231ps X:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.W0 BE /r"}
]},
{"category": "AVX SCALAR", "ext": "FMA4", "deprecated": true, "data": [
{"inst": "vfmaddsd W:xmm[63:0], xmm[63:0], xmm[63:0],xmm[63:0]/m64" , "op": "RVSM: VEX.128.66.0F3A.W1 6b /r /is4"},
{"inst": "vfmaddsd W:xmm[63:0], xmm[63:0], xmm[63:0]/m64,xmm[63:0]" , "op": "RVMS: VEX.128.66.0F3A.W0 6b /r /is4"},
{"inst": "vfmaddss W:xmm[31:0], xmm[31:0], xmm[31:0],xmm[31:0]/m32" , "op": "RVSM: VEX.128.66.0F3A.W1 6a /r /is4"},
{"inst": "vfmaddss W:xmm[31:0], xmm[31:0], xmm[31:0]/m32,xmm[31:0]" , "op": "RVMS: VEX.128.66.0F3A.W0 6a /r /is4"},
{"inst": "vfmsubsd W:xmm[63:0], xmm[63:0], xmm[63:0],xmm[63:0]/m64" , "op": "RVSM: VEX.128.66.0F3A.W1 6F /r /is4"},
{"inst": "vfmsubsd W:xmm[63:0], xmm[63:0], xmm[63:0]/m64,xmm[63:0]" , "op": "RVMS: VEX.128.66.0F3A.W0 6F /r /is4"},
{"inst": "vfmsubss W:xmm[31:0], xmm[31:0], xmm[31:0],xmm[31:0]/m32" , "op": "RVSM: VEX.128.66.0F3A.W1 6E /r /is4"},
{"inst": "vfmsubss W:xmm[31:0], xmm[31:0], xmm[31:0]/m32,xmm[31:0]" , "op": "RVMS: VEX.128.66.0F3A.W0 6E /r /is4"},
{"inst": "vfnmaddsd W:xmm[63:0], xmm[63:0],xmm[63:0],xmm[63:0]/m64" , "op": "RVSM: VEX.128.66.0F3A.W1 7B /r /is4"},
{"inst": "vfnmaddsd W:xmm[63:0], xmm[63:0],xmm[63:0]/m64,xmm[63:0]" , "op": "RVMS: VEX.128.66.0F3A.W0 7B /r /is4"},
{"inst": "vfnmaddss W:xmm[31:0], xmm[31:0],xmm[31:0],xmm[31:0]/m32" , "op": "RVSM: VEX.128.66.0F3A.W1 7A /r /is4"},
{"inst": "vfnmaddss W:xmm[31:0], xmm[31:0],xmm[31:0]/m32,xmm[31:0]" , "op": "RVMS: VEX.128.66.0F3A.W0 7A /r /is4"},
{"inst": "vfnmsubsd W:xmm[63:0], xmm[63:0],xmm[63:0],xmm[63:0]/m64" , "op": "RVSM: VEX.128.66.0F3A.W1 7F /r /is4"},
{"inst": "vfnmsubsd W:xmm[63:0], xmm[63:0],xmm[63:0]/m64,xmm[63:0]" , "op": "RVMS: VEX.128.66.0F3A.W0 7F /r /is4"},
{"inst": "vfnmsubss W:xmm[31:0], xmm[31:0],xmm[31:0],xmm[31:0]/m32" , "op": "RVSM: VEX.128.66.0F3A.W1 7E /r /is4"},
{"inst": "vfnmsubss W:xmm[31:0], xmm[31:0],xmm[31:0]/m32,xmm[31:0]" , "op": "RVMS: VEX.128.66.0F3A.W0 7E /r /is4"}
]},
{"category": "AVX SIMD", "ext": "FMA4", "deprecated": true, "data": [
{"inst": "vfmaddpd W:xmm, xmm, xmm, xmm/m128" , "op": "RVSM: VEX.128.66.0F3A.W1 69 /r /is4"},
{"inst": "vfmaddpd W:xmm, xmm, xmm/m128, xmm" , "op": "RVMS: VEX.128.66.0F3A.W0 69 /r /is4"},
{"inst": "vfmaddpd W:ymm, ymm, ymm, ymm/m256" , "op": "RVSM: VEX.256.66.0F3A.W1 69 /r /is4"},
{"inst": "vfmaddpd W:ymm, ymm, ymm/m256, ymm" , "op": "RVMS: VEX.256.66.0F3A.W0 69 /r /is4"},
{"inst": "vfmaddps W:xmm, xmm, xmm, xmm/m128" , "op": "RVSM: VEX.128.66.0F3A.W1 68 /r /is4"},
{"inst": "vfmaddps W:xmm, xmm, xmm/m128, xmm" , "op": "RVMS: VEX.128.66.0F3A.W0 68 /r /is4"},
{"inst": "vfmaddps W:ymm, ymm, ymm, ymm/m256" , "op": "RVSM: VEX.256.66.0F3A.W1 68 /r /is4"},
{"inst": "vfmaddps W:ymm, ymm, ymm/m256, ymm" , "op": "RVMS: VEX.256.66.0F3A.W0 68 /r /is4"},
{"inst": "vfmaddsubpd W:xmm, xmm, xmm, xmm/m128" , "op": "RVSM: VEX.128.66.0F3A.W1 5D /r /is4"},
{"inst": "vfmaddsubpd W:xmm, xmm, xmm/m128, xmm" , "op": "RVMS: VEX.128.66.0F3A.W0 5D /r /is4"},
{"inst": "vfmaddsubpd W:ymm, ymm, ymm, ymm/m256" , "op": "RVSM: VEX.256.66.0F3A.W1 5D /r /is4"},
{"inst": "vfmaddsubpd W:ymm, ymm, ymm/m256, ymm" , "op": "RVMS: VEX.256.66.0F3A.W0 5D /r /is4"},
{"inst": "vfmaddsubps W:xmm, xmm, xmm, xmm/m128" , "op": "RVSM: VEX.128.66.0F3A.W1 5C /r /is4"},
{"inst": "vfmaddsubps W:xmm, xmm, xmm/m128, xmm" , "op": "RVMS: VEX.128.66.0F3A.W0 5C /r /is4"},
{"inst": "vfmaddsubps W:ymm, ymm, ymm, ymm/m256" , "op": "RVSM: VEX.256.66.0F3A.W1 5C /r /is4"},
{"inst": "vfmaddsubps W:ymm, ymm, ymm/m256, ymm" , "op": "RVMS: VEX.256.66.0F3A.W0 5C /r /is4"},
{"inst": "vfmsubaddpd W:xmm, xmm, xmm, xmm/m128" , "op": "RVSM: VEX.128.66.0F3A.W1 5F /r /is4"},
{"inst": "vfmsubaddpd W:xmm, xmm, xmm/m128, xmm" , "op": "RVMS: VEX.128.66.0F3A.W0 5F /r /is4"},
{"inst": "vfmsubaddpd W:ymm, ymm, ymm, ymm/m256" , "op": "RVSM: VEX.256.66.0F3A.W1 5F /r /is4"},
{"inst": "vfmsubaddpd W:ymm, ymm, ymm/m256, ymm" , "op": "RVMS: VEX.256.66.0F3A.W0 5F /r /is4"},
{"inst": "vfmsubaddps W:xmm, xmm, xmm, xmm/m128" , "op": "RVSM: VEX.128.66.0F3A.W1 5E /r /is4"},
{"inst": "vfmsubaddps W:xmm, xmm, xmm/m128, xmm" , "op": "RVMS: VEX.128.66.0F3A.W0 5E /r /is4"},
{"inst": "vfmsubaddps W:ymm, ymm, ymm, ymm/m256" , "op": "RVSM: VEX.256.66.0F3A.W1 5E /r /is4"},
{"inst": "vfmsubaddps W:ymm, ymm, ymm/m256, ymm" , "op": "RVMS: VEX.256.66.0F3A.W0 5E /r /is4"},
{"inst": "vfmsubpd W:xmm, xmm, xmm, xmm/m128" , "op": "RVSM: VEX.128.66.0F3A.W1 6D /r /is4"},
{"inst": "vfmsubpd W:xmm, xmm, xmm/m128, xmm" , "op": "RVMS: VEX.128.66.0F3A.W0 6D /r /is4"},
{"inst": "vfmsubpd W:ymm, ymm, ymm, ymm/m256" , "op": "RVSM: VEX.256.66.0F3A.W1 6D /r /is4"},
{"inst": "vfmsubpd W:ymm, ymm, ymm/m256, ymm" , "op": "RVMS: VEX.256.66.0F3A.W0 6D /r /is4"},
{"inst": "vfmsubps W:xmm, xmm, xmm, xmm/m128" , "op": "RVSM: VEX.128.66.0F3A.W1 6C /r /is4"},
{"inst": "vfmsubps W:xmm, xmm, xmm/m128, xmm" , "op": "RVMS: VEX.128.66.0F3A.W0 6C /r /is4"},
{"inst": "vfmsubps W:ymm, ymm, ymm, ymm/m256" , "op": "RVSM: VEX.256.66.0F3A.W1 6C /r /is4"},
{"inst": "vfmsubps W:ymm, ymm, ymm/m256, ymm" , "op": "RVMS: VEX.256.66.0F3A.W0 6C /r /is4"},
{"inst": "vfnmaddpd W:xmm, xmm, xmm, xmm/m128" , "op": "RVSM: VEX.128.66.0F3A.W1 79 /r /is4"},
{"inst": "vfnmaddpd W:xmm, xmm, xmm/m128, xmm" , "op": "RVMS: VEX.128.66.0F3A.W0 79 /r /is4"},
{"inst": "vfnmaddpd W:ymm, ymm, ymm, ymm/m256" , "op": "RVSM: VEX.256.66.0F3A.W1 79 /r /is4"},
{"inst": "vfnmaddpd W:ymm, ymm, ymm/m256, ymm" , "op": "RVMS: VEX.256.66.0F3A.W0 79 /r /is4"},
{"inst": "vfnmaddps W:xmm, xmm, xmm, xmm/m128" , "op": "RVSM: VEX.128.66.0F3A.W1 78 /r /is4"},
{"inst": "vfnmaddps W:xmm, xmm, xmm/m128, xmm" , "op": "RVMS: VEX.128.66.0F3A.W0 78 /r /is4"},
{"inst": "vfnmaddps W:ymm, ymm, ymm, ymm/m256" , "op": "RVSM: VEX.256.66.0F3A.W1 78 /r /is4"},
{"inst": "vfnmaddps W:ymm, ymm, ymm/m256, ymm" , "op": "RVMS: VEX.256.66.0F3A.W0 78 /r /is4"},
{"inst": "vfnmsubpd W:xmm, xmm, xmm, xmm/m128" , "op": "RVSM: VEX.128.66.0F3A.W1 7D /r /is4"},
{"inst": "vfnmsubpd W:xmm, xmm, xmm/m128, xmm" , "op": "RVMS: VEX.128.66.0F3A.W0 7D /r /is4"},
{"inst": "vfnmsubpd W:ymm, ymm, ymm, ymm/m256" , "op": "RVSM: VEX.256.66.0F3A.W1 7D /r /is4"},
{"inst": "vfnmsubpd W:ymm, ymm, ymm/m256, ymm" , "op": "RVMS: VEX.256.66.0F3A.W0 7D /r /is4"},
{"inst": "vfnmsubps W:xmm, xmm, xmm, xmm/m128" , "op": "RVSM: VEX.128.66.0F3A.W1 7C /r /is4"},
{"inst": "vfnmsubps W:xmm, xmm, xmm/m128, xmm" , "op": "RVMS: VEX.128.66.0F3A.W0 7C /r /is4"},
{"inst": "vfnmsubps W:ymm, ymm, ymm, ymm/m256" , "op": "RVSM: VEX.256.66.0F3A.W1 7C /r /is4"},
{"inst": "vfnmsubps W:ymm, ymm, ymm/m256, ymm" , "op": "RVMS: VEX.256.66.0F3A.W0 7C /r /is4"}
]},
{"category": "AVX SCALAR", "ext": "XOP", "deprecated": true, "data": [
{"inst": "vfrczsd W:xmm[63:0], xmm[63:0]/m64" , "op": "RM: XOP.L0.P0.M09.W0 83 /r"},
{"inst": "vfrczss W:xmm[31:0], xmm[31:0]/m32" , "op": "RM: XOP.L0.P0.M09.W0 82 /r"}
]},
{"category": "AVX SIMD", "ext": "XOP", "deprecated": true, "data": [
{"inst": "vfrczpd W:xmm, xmm/m128" , "op": "RM: XOP.L0.P0.M09.W0 81 /r"},
{"inst": "vfrczpd W:ymm, ymm/m256" , "op": "RM: XOP.L1.P0.M09.W0 81 /r"},
{"inst": "vfrczps W:xmm, xmm/m128" , "op": "RM: XOP.L0.P0.M09.W0 80 /r"},
{"inst": "vfrczps W:ymm, ymm/m256" , "op": "RM: XOP.L1.P0.M09.W0 80 /r"},
{"inst": "vpcmov W:xmm, xmm, xmm, xmm/m128" , "op": "RVSM: XOP.L0.P0.M08.W1 A2 /r /is4"},
{"inst": "vpcmov W:xmm, xmm, xmm/m128, xmm" , "op": "RVMS: XOP.L0.P0.M08.W0 A2 /r /is4"},
{"inst": "vpcmov W:ymm, ymm, ymm, ymm/m256" , "op": "RVSM: XOP.L1.P0.M08.W1 A2 /r /is4"},
{"inst": "vpcmov W:ymm, ymm, ymm/m256, ymm" , "op": "RVMS: XOP.L1.P0.M08.W0 A2 /r /is4"},
{"inst": "vpcomb W:xmm, xmm, xmm/m128, ib/ub" , "op": "RVM: XOP.L0.P0.M08.W0 CC /r ib"},
{"inst": "vpcomd W:xmm, xmm, xmm/m128, ib/ub" , "op": "RVM: XOP.L0.P0.M08.W0 CE /r ib"},
{"inst": "vpcomq W:xmm, xmm, xmm/m128, ib/ub" , "op": "RVM: XOP.L0.P0.M08.W0 CF /r ib"},
{"inst": "vpcomub W:xmm, xmm, xmm/m128, ib/ub" , "op": "RVM: XOP.L0.P0.M08.W0 EC /r ib"},
{"inst": "vpcomud W:xmm, xmm, xmm/m128, ib/ub" , "op": "RVM: XOP.L0.P0.M08.W0 EE /r ib"},
{"inst": "vpcomuq W:xmm, xmm, xmm/m128, ib/ub" , "op": "RVM: XOP.L0.P0.M08.W0 EF /r ib"},
{"inst": "vpcomuw W:xmm, xmm, xmm/m128, ib/ub" , "op": "RVM: XOP.L0.P0.M08.W0 ED /r ib"},
{"inst": "vpcomw W:xmm, xmm, xmm/m128, ib/ub" , "op": "RVM: XOP.L0.P0.M08.W0 CD /r ib"},
{"inst": "vpermil2pd W:xmm, xmm, xmm/m128, xmm, i4/u4" , "op": "RVMS: VEX.L0.66.0F3A.W0 49 /r /is4"},
{"inst": "vpermil2pd W:xmm, xmm, xmm, xmm/m128, i4/u4" , "op": "RVSM: VEX.L0.66.0F3A.W1 49 /r /is4"},
{"inst": "vpermil2pd W:ymm, ymm, ymm/m256, ymm, i4/u4" , "op": "RVMS: VEX.L1.66.0F3A.W0 49 /r /is4"},
{"inst": "vpermil2pd W:ymm, ymm, ymm, ymm/m256, i4/u4" , "op": "RVSM: VEX.L1.66.0F3A.W1 49 /r /is4"},
{"inst": "vpermil2ps W:xmm, xmm, xmm/m128, xmm, i4/u4" , "op": "RVMS: VEX.L0.66.0F3A.W0 48 /r /is4"},
{"inst": "vpermil2ps W:xmm, xmm, xmm, xmm/m128, i4/u4" , "op": "RVSM: VEX.L0.66.0F3A.W1 48 /r /is4"},
{"inst": "vpermil2ps W:ymm, ymm, ymm/m256, ymm, i4/u4" , "op": "RVMS: VEX.L1.66.0F3A.W0 48 /r /is4"},
{"inst": "vpermil2ps W:ymm, ymm, ymm, ymm/m256, i4/u4" , "op": "RVSM: VEX.L1.66.0F3A.W1 48 /r /is4"},
{"inst": "vphaddbd W:xmm, xmm/m128" , "op": "RM: XOP.L0.P0.M09.W0 C2 /r"},
{"inst": "vphaddbq W:xmm, xmm/m128" , "op": "RM: XOP.L0.P0.M09.W0 C3 /r"},
{"inst": "vphaddbw W:xmm, xmm/m128" , "op": "RM: XOP.L0.P0.M09.W0 C1 /r"},
{"inst": "vphadddq W:xmm, xmm/m128" , "op": "RM: XOP.L0.P0.M09.W0 CB /r"},
{"inst": "vphaddubd W:xmm, xmm/m128" , "op": "RM: XOP.L0.P0.M09.W0 D2 /r"},
{"inst": "vphaddubq W:xmm, xmm/m128" , "op": "RM: XOP.L0.P0.M09.W0 D3 /r"},
{"inst": "vphaddubw W:xmm, xmm/m128" , "op": "RM: XOP.L0.P0.M09.W0 D1 /r"},
{"inst": "vphaddudq W:xmm, xmm/m128" , "op": "RM: XOP.L0.P0.M09.W0 DB /r"},
{"inst": "vphadduwd W:xmm, xmm/m128" , "op": "RM: XOP.L0.P0.M09.W0 D6 /r"},
{"inst": "vphadduwq W:xmm, xmm/m128" , "op": "RM: XOP.L0.P0.M09.W0 D7 /r"},
{"inst": "vphaddwd W:xmm, xmm/m128" , "op": "RM: XOP.L0.P0.M09.W0 C6 /r"},
{"inst": "vphaddwq W:xmm, xmm/m128" , "op": "RM: XOP.L0.P0.M09.W0 C7 /r"},
{"inst": "vphsubbw W:xmm, xmm/m128" , "op": "RM: XOP.L0.P0.M09.W0 E1 /r"},
{"inst": "vphsubdq W:xmm, xmm/m128" , "op": "RM: XOP.L0.P0.M09.W0 E3 /r"},
{"inst": "vphsubwd W:xmm, xmm/m128" , "op": "RM: XOP.L0.P0.M09.W0 E2 /r"},
{"inst": "vpmacsdd W:xmm, xmm, xmm/m128, xmm" , "op": "RVMS: XOP.L0.P0.M08.W0 9E /r /is4"},
{"inst": "vpmacsdqh W:xmm, xmm, xmm/m128, xmm" , "op": "RVMS: XOP.L0.P0.M08.W0 9F /r /is4"},
{"inst": "vpmacsdql W:xmm, xmm, xmm/m128, xmm" , "op": "RVMS: XOP.L0.P0.M08.W0 97 /r /is4"},
{"inst": "vpmacssdd W:xmm, xmm, xmm/m128, xmm" , "op": "RVMS: XOP.L0.P0.M08.W0 8E /r /is4"},
{"inst": "vpmacssdqh W:xmm, xmm, xmm/m128, xmm" , "op": "RVMS: XOP.L0.P0.M08.W0 8F /r /is4"},
{"inst": "vpmacssdql W:xmm, xmm, xmm/m128, xmm" , "op": "RVMS: XOP.L0.P0.M08.W0 87 /r /is4"},
{"inst": "vpmacsswd W:xmm, xmm, xmm/m128, xmm" , "op": "RVMS: XOP.L0.P0.M08.W0 86 /r /is4"},
{"inst": "vpmacssww W:xmm, xmm, xmm/m128, xmm" , "op": "RVMS: XOP.L0.P0.M08.W0 85 /r /is4"},
{"inst": "vpmacswd W:xmm, xmm, xmm/m128, xmm" , "op": "RVMS: XOP.L0.P0.M08.W0 96 /r /is4"},
{"inst": "vpmacsww W:xmm, xmm, xmm/m128, xmm" , "op": "RVMS: XOP.L0.P0.M08.W0 95 /r /is4"},
{"inst": "vpmadcsswd W:xmm, xmm, xmm/m128, xmm" , "op": "RVMS: XOP.L0.P0.M08.W0 A6 /r /is4"},
{"inst": "vpmadcswd W:xmm, xmm, xmm/m128, xmm" , "op": "RVMS: XOP.L0.P0.M08.W0 B6 /r /is4"},
{"inst": "vpperm W:xmm, xmm, xmm, xmm/m128" , "op": "RVSM: XOP.L0.P0.M08.W1 A3 /r /is4"},
{"inst": "vpperm W:xmm, xmm, xmm/m128, xmm" , "op": "RVMS: XOP.L0.P0.M08.W0 A3 /r /is4"},
{"inst": "vprotb W:xmm, xmm, xmm/m128" , "op": "RVM: XOP.L0.P0.M09.W1 90 /r"},
{"inst": "vprotb W:xmm, xmm/m128, ib/ub" , "op": "RM: XOP.L0.P0.M08.W0 C0 /r ib"},
{"inst": "vprotb W:xmm, xmm/m128, xmm" , "op": "RMV: XOP.L0.P0.M09.W0 90 /r"},
{"inst": "vprotd W:xmm, xmm, xmm/m128" , "op": "RVM: XOP.L0.P0.M09.W1 92 /r"},
{"inst": "vprotd W:xmm, xmm/m128, ib/ub" , "op": "RM: XOP.L0.P0.M08.W0 C2 /r ib"},
{"inst": "vprotd W:xmm, xmm/m128, xmm" , "op": "RMV: XOP.L0.P0.M09.W0 92 /r"},
{"inst": "vprotq W:xmm, xmm, xmm/m128" , "op": "RVM: XOP.L0.P0.M09.W1 93 /r"},
{"inst": "vprotq W:xmm, xmm/m128, ib/ub" , "op": "RM: XOP.L0.P0.M08.W0 C3 /r ib"},
{"inst": "vprotq W:xmm, xmm/m128, xmm" , "op": "RMV: XOP.L0.P0.M09.W0 93 /r"},
{"inst": "vprotw W:xmm, xmm, xmm/m128" , "op": "RVM: XOP.L0.P0.M09.W1 91 /r"},
{"inst": "vprotw W:xmm, xmm/m128, ib/ub" , "op": "RM: XOP.L0.P0.M08.W0 C1 /r ib"},
{"inst": "vprotw W:xmm, xmm/m128, xmm" , "op": "RMV: XOP.L0.P0.M09.W0 91 /r"},
{"inst": "vpshab W:xmm, xmm, xmm/m128" , "op": "RVM: XOP.L0.P0.M09.W1 98 /r"},
{"inst": "vpshab W:xmm, xmm/m128, xmm" , "op": "RMV: XOP.L0.P0.M09.W0 98 /r"},
{"inst": "vpshad W:xmm, xmm, xmm/m128" , "op": "RVM: XOP.L0.P0.M09.W1 9A /r"},
{"inst": "vpshad W:xmm, xmm/m128, xmm" , "op": "RMV: XOP.L0.P0.M09.W0 9A /r"},
{"inst": "vpshaq W:xmm, xmm, xmm/m128" , "op": "RVM: XOP.L0.P0.M09.W1 9B /r"},
{"inst": "vpshaq W:xmm, xmm/m128, xmm" , "op": "RMV: XOP.L0.P0.M09.W0 9B /r"},
{"inst": "vpshaw W:xmm, xmm, xmm/m128" , "op": "RVM: XOP.L0.P0.M09.W1 99 /r"},
{"inst": "vpshaw W:xmm, xmm/m128, xmm" , "op": "RMV: XOP.L0.P0.M09.W0 99 /r"},
{"inst": "vpshlb W:xmm, xmm, xmm/m128" , "op": "RVM: XOP.L0.P0.M09.W1 94 /r"},
{"inst": "vpshlb W:xmm, xmm/m128, xmm" , "op": "RMV: XOP.L0.P0.M09.W0 94 /r"},
{"inst": "vpshld W:xmm, xmm, xmm/m128" , "op": "RVM: XOP.L0.P0.M09.W1 96 /r"},
{"inst": "vpshld W:xmm, xmm/m128, xmm" , "op": "RMV: XOP.L0.P0.M09.W0 96 /r"},
{"inst": "vpshlq W:xmm, xmm, xmm/m128" , "op": "RVM: XOP.L0.P0.M09.W1 97 /r"},
{"inst": "vpshlq W:xmm, xmm/m128, xmm" , "op": "RMV: XOP.L0.P0.M09.W0 97 /r"},
{"inst": "vpshlw W:xmm, xmm, xmm/m128" , "op": "RVM: XOP.L0.P0.M09.W1 95 /r"},
{"inst": "vpshlw W:xmm, xmm/m128, xmm" , "op": "RMV: XOP.L0.P0.M09.W0 95 /r"}
]},
{"category": "AVX SIMD", "ext": "AVX_IFMA", "data": [
{"inst": "vpmadd52huq X:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.W1 B5 /r"},
{"inst": "vpmadd52huq X:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.W1 B5 /r"},
{"inst": "vpmadd52luq X:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.W1 B4 /r"},
{"inst": "vpmadd52luq X:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.W1 B4 /r"}
]},
{"category": "AVX SIMD", "ext": "AVX_NE_CONVERT", "data": [
{"inst": "vbcstnebf162ps W:xmm, m16" , "op": "RM: VEX.128.F3.0F38.W0 B1 /r"},
{"inst": "vbcstnebf162ps W:ymm, m16" , "op": "RM: VEX.256.F3.0F38.W0 B1 /r"},
{"inst": "vbcstnesh2ps W:xmm, m16" , "op": "RM: VEX.128.66.0F38.W0 B1 /r"},
{"inst": "vbcstnesh2ps W:ymm, m16" , "op": "RM: VEX.256.66.0F38.W0 B1 /r"},
{"inst": "vcvtneebf162ps W:xmm, m128" , "op": "RM: VEX.128.F3.0F38.W0 B0 /r"},
{"inst": "vcvtneebf162ps W:ymm, m256" , "op": "RM: VEX.256.F3.0F38.W0 B0 /r"},
{"inst": "vcvtneeph2ps W:xmm, m128" , "op": "RM: VEX.128.66.0F38.W0 B0 /r"},
{"inst": "vcvtneeph2ps W:ymm, m256" , "op": "RM: VEX.256.66.0F38.W0 B0 /r"},
{"inst": "vcvtneobf162ps W:xmm, m128" , "op": "RM: VEX.128.F2.0F38.W0 B0 /r"},
{"inst": "vcvtneobf162ps W:ymm, m256" , "op": "RM: VEX.256.F2.0F38.W0 B0 /r"},
{"inst": "vcvtneoph2ps W:xmm, m128" , "op": "RM: VEX.128.NP.0F38.W0 B0 /r"},
{"inst": "vcvtneoph2ps W:ymm, m256" , "op": "RM: VEX.256.NP.0F38.W0 B0 /r"},
{"inst": "vcvtneps2bf16 W:xmm, xmm/m128" , "op": "RM: VEX.128.F3.0F38.W0 72 /r"},
{"inst": "vcvtneps2bf16 W:xmm, ymm/m256" , "op": "RM: VEX.256.F3.0F38.W0 72 /r"}
]},
{"category": "AVX SIMD", "ext": "AVX SHA512", "data": [
{"inst": "vsha512msg1 X:ymm, xmm" , "op": "RM: VEX.256.F2.0F38.W0 CC /r"},
{"inst": "vsha512msg2 X:ymm, ymm" , "op": "RM: VEX.256.F2.0F38.W0 CD /r"},
{"inst": "vsha512rnds2 X:ymm, ymm, xmm" , "op": "RVM: VEX.256.F2.0F38.W0 CB /r"}
]},
{"category": "AVX SIMD", "ext": "AVX SM3", "data": [
{"inst": "vsm3msg1 X:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.NP.0F38.W0 DA /r"},
{"inst": "vsm3msg2 X:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.W0 DA /r"},
{"inst": "vsm3rnds2 X:xmm, xmm, xmm/m128, ib/ub" , "op": "RVM: VEX.128.66.0F3A.W0 DE /r /ib"}
]},
{"category": "AVX SIMD", "ext": "AVX SM4", "data": [
{"inst": "vsm4key4 W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.F3.0F38.W0 DA /r"},
{"inst": "vsm4key4 W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.F3.0F38.W0 DA /r"},
{"inst": "vsm4rnds4 W:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.F2.0F38.W0 DA /r"},
{"inst": "vsm4rnds4 W:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.F2.0F38.W0 DA /r"}
]},
{"category": "AVX SIMD", "ext": "AVX_VNNI", "data": [
{"inst": "vpdpbusd X:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.W0 50 /r"},
{"inst": "vpdpbusd X:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.W0 50 /r"},
{"inst": "vpdpbusds X:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.W0 51 /r"},
{"inst": "vpdpbusds X:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.W0 51 /r"},
{"inst": "vpdpwssd X:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.W0 52 /r"},
{"inst": "vpdpwssd X:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.W0 52 /r"},
{"inst": "vpdpwssds X:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.W0 53 /r"},
{"inst": "vpdpwssds X:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.W0 53 /r"}
]},
{"category": "AVX SIMD", "ext": "AVX_VNNI_INT8", "data": [
{"inst": "vpdpbssd X:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.F2.0F38.W0 50 /r"},
{"inst": "vpdpbssd X:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.F2.0F38.W0 50 /r"},
{"inst": "vpdpbssds X:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.F2.0F38.W0 51 /r"},
{"inst": "vpdpbssds X:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.F2.0F38.W0 51 /r"},
{"inst": "vpdpbsud X:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.F3.0F38.W0 50 /r"},
{"inst": "vpdpbsud X:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.F3.0F38.W0 50 /r"},
{"inst": "vpdpbsuds X:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.F3.0F38.W0 51 /r"},
{"inst": "vpdpbsuds X:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.F3.0F38.W0 51 /r"},
{"inst": "vpdpbuud X:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.NP.0F38.W0 50 /r"},
{"inst": "vpdpbuud X:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.NP.0F38.W0 50 /r"},
{"inst": "vpdpbuuds X:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.NP.0F38.W0 51 /r"},
{"inst": "vpdpbuuds X:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.NP.0F38.W0 51 /r"}
]},
{"category": "AVX SIMD", "ext": "AVX_VNNI_INT16", "data": [
{"inst": "vpdpwsud X:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.F3.0F38.W0 D2 /r"},
{"inst": "vpdpwsud X:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.F3.0F38.W0 D2 /r"},
{"inst": "vpdpwsuds X:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.F3.0F38.W0 D3 /r"},
{"inst": "vpdpwsuds X:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.F3.0F38.W0 D3 /r"},
{"inst": "vpdpwusd X:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.W0 D2 /r"},
{"inst": "vpdpwusd X:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.W0 D2 /r"},
{"inst": "vpdpwusds X:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.66.0F38.W0 D3 /r"},
{"inst": "vpdpwusds X:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.66.0F38.W0 D3 /r"},
{"inst": "vpdpwuud X:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.NP.0F38.W0 D2 /r"},
{"inst": "vpdpwuud X:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.NP.0F38.W0 D2 /r"},
{"inst": "vpdpwuuds X:xmm, xmm, xmm/m128" , "op": "RVM: VEX.128.NP.0F38.W0 D3 /r"},
{"inst": "vpdpwuuds X:ymm, ymm, ymm/m256" , "op": "RVM: VEX.256.NP.0F38.W0 D3 /r"}
]},
{"category": "AVX SIMD", "ext": "VPCLMULQDQ", "data": [
{"inst": "vpclmulqdq W:ymm, ymm, ymm/m256, ib/ub" , "op": "RVM: VEX.256.66.0F3A.WIG 44 /r ib"}
]},
{"category": "AVX512 MASK", "ext": "AVX512_F", "data": [
{"inst": "kandnw W:k[15:0], k[15:0], k[15:0]" , "op": "RVM: VEX.L1.0F.W0 42 /r"},
{"inst": "kandw W:k[15:0], ~k[15:0], ~k[15:0]" , "op": "RVM: VEX.L1.0F.W0 41 /r"},
{"inst": "kmovw W:k[15:0], k[15:0]/m16" , "op": "RM: VEX.L0.0F.W0 90 /r"},
{"inst": "kmovw W:k[15:0], r32[15:0]" , "op": "RM: VEX.L0.0F.W0 92 /r"},
{"inst": "kmovw W:m16, k[15:0]" , "op": "MR: VEX.L0.0F.W0 91 /r"},
{"inst": "kmovw W:r32[15:0], k[15:0]" , "op": "RM: VEX.L0.0F.W0 93 /r"},
{"inst": "knotw W:k[15:0], k[15:0]" , "op": "RM: VEX.L0.0F.W0 44 /r"},
{"inst": "kortestw R:~k[15:0], ~k[15:0]" , "op": "RM: VEX.L0.0F.W0 98 /r" , "io": "OF=0 SF=0 ZF=W AF=0 PF=0 CF=W"},
{"inst": "korw W:k[15:0], ~k[15:0], ~k[15:0]" , "op": "RVM: VEX.L1.0F.W0 45 /r"},
{"inst": "kshiftlw W:k[15:0], k[15:0], ib/ub" , "op": "RM: VEX.L0.66.0F3A.W1 32 /r ib"},
{"inst": "kshiftrw W:k[15:0], k[15:0], ib/ub" , "op": "RM: VEX.L0.66.0F3A.W1 30 /r ib"},
{"inst": "kunpckbw W:k[15:0], k[7:0], k[7:0]" , "op": "RVM: VEX.L1.66.0F.W0 4B /r"},
{"inst": "kxnorw W:k[15:0], k[15:0], k[15:0]" , "op": "RVM: VEX.L1.0F.W0 46 /r"},
{"inst": "kxorw W:k[15:0], ~k[15:0], ~k[15:0]" , "op": "RVM: VEX.L1.0F.W0 47 /r"}
]},
{"category": "AVX512 MASK", "ext": "AVX512_DQ", "data": [
{"inst": "kaddb W:k[7:0], ~k[7:0], ~k[7:0]" , "op": "RVM: VEX.L1.66.0F.W0 4A /r"},
{"inst": "kaddw W:k[15:0], ~k[15:0], ~k[15:0]" , "op": "RVM: VEX.L1.0F.W0 4A /r"},
{"inst": "kandb W:k[7:0], ~k[7:0], ~k[7:0]" , "op": "RVM: VEX.L1.66.0F.W0 41 /r"},
{"inst": "kandnb W:k[7:0], k[7:0], k[7:0]" , "op": "RVM: VEX.L1.66.0F.W0 42 /r"},
{"inst": "kmovb W:k[7:0], k[7:0]/m8" , "op": "RM: VEX.L0.66.0F.W0 90 /r"},
{"inst": "kmovb W:k[7:0], r32[7:0]" , "op": "RM: VEX.L0.66.0F.W0 92 /r"},
{"inst": "kmovb W:m8, k[7:0]" , "op": "MR: VEX.L0.66.0F.W0 91 /r"},
{"inst": "kmovb W:r32[7:0], k[7:0]" , "op": "RM: VEX.L0.66.0F.W0 93 /r"},
{"inst": "knotb W:k[7:0], k[7:0]" , "op": "RM: VEX.L0.66.0F.W0 44 /r"},
{"inst": "korb W:k[7:0], ~k[7:0], ~k[7:0]" , "op": "RVM: VEX.L1.66.0F.W0 45 /r"},
{"inst": "kortestb R:~k[7:0], ~k[7:0]" , "op": "RM: VEX.L0.66.0F.W0 98 /r" , "io": "OF=0 SF=0 ZF=W AF=0 PF=0 CF=W"},
{"inst": "kshiftlb W:k[7:0], k[7:0], ib/ub" , "op": "RM: VEX.L0.66.0F3A.W0 32 /r ib"},
{"inst": "kshiftrb W:k[7:0], k[7:0], ib/ub" , "op": "RM: VEX.L0.66.0F3A.W0 30 /r ib"},
{"inst": "ktestb R:~k[7:0], ~k[7:0]" , "op": "RM: VEX.L0.66.0F.W0 99 /r" , "io": "OF=0 SF=0 ZF=W AF=0 PF=0 CF=W"},
{"inst": "ktestw R:~k[15:0], ~k[15:0]" , "op": "RM: VEX.L0.0F.W0 99 /r" , "io": "OF=0 SF=0 ZF=W AF=0 PF=0 CF=W"},
{"inst": "kxnorb W:k[7:0], k[7:0], k[7:0]" , "op": "RVM: VEX.L1.66.0F.W0 46 /r"},
{"inst": "kxorb W:k[7:0], ~k[7:0], ~k[7:0]" , "op": "RVM: VEX.L1.66.0F.W0 47 /r"}
]},
{"category": "AVX512 MASK", "ext": "AVX512_BW", "data": [
{"inst": "kaddd W:k[31:0], ~k[31:0], ~k[31:0]" , "op": "RVM: VEX.L1.66.0F.W1 4A /r"},
{"inst": "kaddq W:k[63:0], ~k[63:0], ~k[63:0]" , "op": "RVM: VEX.L1.0F.W1 4A /r"},
{"inst": "kandd W:k[31:0], ~k[31:0], ~k[31:0]" , "op": "RVM: VEX.L1.66.0F.W1 41 /r"},
{"inst": "kandnd W:k[31:0], k[31:0], k[31:0]" , "op": "RVM: VEX.L1.66.0F.W1 42 /r"},
{"inst": "kandnq W:k[63:0], k[63:0], k[63:0]" , "op": "RVM: VEX.L1.0F.W1 42 /r"},
{"inst": "kandq W:k[63:0], ~k[63:0], ~k[63:0]" , "op": "RVM: VEX.L1.0F.W1 41 /r"},
{"inst": "kmovd W:k[31:0], k[31:0]/m32" , "op": "RM: VEX.L0.66.0F.W1 90 /r"},
{"inst": "kmovd W:k[31:0], r32[31:0]" , "op": "RM: VEX.L0.F2.0F.W0 92 /r"},
{"inst": "kmovd W:m32, k[31:0]" , "op": "MR: VEX.L0.66.0F.W1 91 /r"},
{"inst": "kmovd W:r32[31:0], k[31:0]" , "op": "RM: VEX.L0.F2.0F.W0 93 /r"},
{"inst": "kmovq W:k[63:0], k[63:0]/m64" , "op": "RM: VEX.L0.0F.W1 90 /r"},
{"inst": "kmovq W:k[63:0], r64" , "op": "RM: VEX.L0.F2.0F.W1 92 /r"},
{"inst": "kmovq W:m64, k[63:0]" , "op": "MR: VEX.L0.0F.W1 91 /r"},
{"inst": "kmovq W:r64, k[63:0]" , "op": "RM: VEX.L0.F2.0F.W1 93 /r"},
{"inst": "knotd W:k[31:0], k[31:0]" , "op": "RM: VEX.L0.66.0F.W1 44 /r"},
{"inst": "knotq W:k[63:0], k[63:0]" , "op": "RM: VEX.L0.0F.W1 44 /r"},
{"inst": "kord W:k[31:0], ~k[31:0], ~k[31:0]" , "op": "RVM: VEX.L1.66.0F.W1 45 /r"},
{"inst": "korq W:k[63:0], ~k[63:0], ~k[63:0]" , "op": "RVM: VEX.L1.0F.W1 45 /r"},
{"inst": "kortestd R:~k[31:0], ~k[31:0]" , "op": "RM: VEX.L0.66.0F.W1 98 /r" , "io": "OF=0 SF=0 ZF=W AF=0 PF=0 CF=W"},
{"inst": "kortestq R:~k[63:0], ~k[63:0]" , "op": "RM: VEX.L0.0F.W1 98 /r" , "io": "OF=0 SF=0 ZF=W AF=0 PF=0 CF=W"},
{"inst": "kshiftld W:k[31:0], k[31:0], ib/ub" , "op": "RM: VEX.L0.66.0F3A.W0 33 /r ib"},
{"inst": "kshiftlq W:k[63:0], k[63:0], ib/ub" , "op": "RM: VEX.L0.66.0F3A.W1 33 /r ib"},
{"inst": "kshiftrd W:k[31:0], k[31:0], ib/ub" , "op": "RM: VEX.L0.66.0F3A.W0 31 /r ib"},
{"inst": "kshiftrq W:k[63:0], k[63:0], ib/ub" , "op": "RM: VEX.L0.66.0F3A.W1 31 /r ib"},
{"inst": "ktestd R:~k[31:0], ~k[31:0]" , "op": "RM: VEX.L0.66.0F.W1 99 /r" , "io": "OF=0 SF=0 ZF=W AF=0 PF=0 CF=W"},
{"inst": "ktestq R:~k[63:0], ~k[63:0]" , "op": "RM: VEX.L0.0F.W1 99 /r" , "io": "OF=0 SF=0 ZF=W AF=0 PF=0 CF=W"},
{"inst": "kunpckdq W:k[63:0], k[31:0], k[31:0]" , "op": "RVM: VEX.L1.0F.W1 4B /r"},
{"inst": "kunpckwd W:k[31:0], k[15:0], k[15:0]" , "op": "RVM: VEX.L1.0F.W0 4B /r"},
{"inst": "kxnord W:k[31:0], k[31:0], k[31:0]" , "op": "RVM: VEX.L1.66.0F.W1 46 /r"},
{"inst": "kxnorq W:k[63:0], k[63:0], k[63:0]" , "op": "RVM: VEX.L1.0F.W1 46 /r"},
{"inst": "kxord W:k[31:0], ~k[31:0], ~k[31:0]" , "op": "RVM: VEX.L1.66.0F.W1 47 /r"},
{"inst": "kxorq W:k[63:0], ~k[63:0], ~k[63:0]" , "op": "RVM: VEX.L1.0F.W1 47 /r"}
]},
{"category": "AVX512 SCALAR", "ext": "AVX512_F", "data": [
{"inst": "vaddsd W:xmm {kz}, xmm, xmm[63:0]/m64 {er}" , "op": "RVM-T1S: EVEX.LIG.F2.0F.W1 58 /r" , "vl": 0},
{"inst": "vaddss W:xmm {kz}, xmm, xmm[31:0]/m32 {er}" , "op": "RVM-T1S: EVEX.LIG.F3.0F.W0 58 /r" , "vl": 0},
{"inst": "vcmpsd W:k {k}, xmm, xmm[63:0]/m64, ib/ub {sae}" , "op": "RVM-T1S: EVEX.LIG.F2.0F.W1 C2 /r ib" , "vl": 0, "k": "zeroing"},
{"inst": "vcmpss W:k {k}, xmm, xmm[31:0]/m32, ib/ub {sae}" , "op": "RVM-T1S: EVEX.LIG.F3.0F.W0 C2 /r ib" , "vl": 0, "k": "zeroing"},
{"inst": "vcomisd R:xmm[63:0], xmm[63:0]/m64 {sae}" , "op": "RM-T1S: EVEX.LIG.66.0F.W1 2F /r" , "vl": 0, "io": "OF=0 SF=0 ZF=W AF=0 PF=W CF=W"},
{"inst": "vcomiss R:xmm[31:0], xmm[31:0]/m32 {sae}" , "op": "RM-T1S: EVEX.LIG.0F.W0 2F /r" , "vl": 0, "io": "OF=0 SF=0 ZF=W AF=0 PF=W CF=W"},
{"inst": "vcvtsd2si W:r32, xmm[63:0]/m64 {er}" , "op": "RM-T1F: EVEX.LIG.F2.0F.W0 2D /r" , "vl": 0},
{"inst": "vcvtsd2si W:r64, xmm[63:0]/m64 {er}" , "op": "RM-T1F: EVEX.LIG.F2.0F.W1 2D /r" , "vl": 0},
{"inst": "vcvtsd2ss W:xmm {kz}, xmm[127:32], xmm[63:0]/m64 {er}" , "op": "RVM-T1S: EVEX.LIG.F2.0F.W1 5A /r" , "vl": 0},
{"inst": "vcvtsd2usi W:r32, xmm[63:0]/m64 {er}" , "op": "RM-T1F: EVEX.LIG.F2.0F.W0 79 /r" , "vl": 0},
{"inst": "vcvtsd2usi W:r64, xmm[63:0]/m64 {er}" , "op": "RM-T1F: EVEX.LIG.F2.0F.W1 79 /r" , "vl": 0},
{"inst": "vcvtsi2sd W:xmm, xmm[127:64], r32/m32 {er}" , "op": "RVM-T1S: EVEX.LIG.F2.0F.W0 2A /r" , "vl": 0},
{"inst": "vcvtsi2sd W:xmm, xmm[127:64], r64/m64 {er}" , "op": "RVM-T1S: EVEX.LIG.F2.0F.W1 2A /r" , "vl": 0},
{"inst": "vcvtsi2ss W:xmm, xmm[127:32], r32/m32 {er}" , "op": "RVM-T1S: EVEX.LIG.F3.0F.W0 2A /r" , "vl": 0},
{"inst": "vcvtsi2ss W:xmm, xmm[127:32], r64/m64 {er}" , "op": "RVM-T1S: EVEX.LIG.F3.0F.W1 2A /r" , "vl": 0},
{"inst": "vcvtss2sd W:xmm {kz}, xmm[127:64], xmm[31:0]/m32 {sae}" , "op": "RVM-T1S: EVEX.LIG.F3.0F.W0 5A /r" , "vl": 0},
{"inst": "vcvtss2si W:r32, xmm[31:0]/m32 {er}" , "op": "RM-T1F: EVEX.LIG.F3.0F.W0 2D /r" , "vl": 0},
{"inst": "vcvtss2si W:r64, xmm[31:0]/m32 {er}" , "op": "RM-T1F: EVEX.LIG.F3.0F.W1 2D /r" , "vl": 0},
{"inst": "vcvtss2usi W:r32, xmm[31:0]/m32 {er}" , "op": "RM-T1F: EVEX.LIG.F3.0F.W0 79 /r" , "vl": 0},
{"inst": "vcvtss2usi W:r64, xmm[31:0]/m32 {er}" , "op": "RM-T1F: EVEX.LIG.F3.0F.W1 79 /r" , "vl": 0},
{"inst": "vcvttsd2si W:r32, xmm[63:0]/m64 {sae}" , "op": "RM-T1F: EVEX.LIG.F2.0F.W0 2C /r" , "vl": 0},
{"inst": "vcvttsd2si W:r64, xmm[63:0]/m64 {sae}" , "op": "RM-T1F: EVEX.LIG.F2.0F.W1 2C /r" , "vl": 0},
{"inst": "vcvttsd2usi W:r32, xmm[63:0]/m64 {sae}" , "op": "RM-T1F: EVEX.LIG.F2.0F.W0 78 /r" , "vl": 0},
{"inst": "vcvttsd2usi W:r64, xmm[63:0]/m64 {sae}" , "op": "RM-T1F: EVEX.LIG.F2.0F.W1 78 /r" , "vl": 0},
{"inst": "vcvttss2si W:r32, xmm[31:0]/m32 {sae}" , "op": "RM-T1F: EVEX.LIG.F3.0F.W0 2C /r" , "vl": 0},
{"inst": "vcvttss2si W:r64, xmm[31:0]/m32 {sae}" , "op": "RM-T1F: EVEX.LIG.F3.0F.W1 2C /r" , "vl": 0},
{"inst": "vcvttss2usi W:r32, xmm[31:0]/m32 {sae}" , "op": "RM-T1F: EVEX.LIG.F3.0F.W0 78 /r" , "vl": 0},
{"inst": "vcvttss2usi W:r64, xmm[31:0]/m32 {sae}" , "op": "RM-T1F: EVEX.LIG.F3.0F.W1 78 /r" , "vl": 0},
{"inst": "vcvtusi2sd W:xmm, xmm[127:64], r32/m32 {er}" , "op": "RVM-T1S: EVEX.LIG.F2.0F.W0 7B /r" , "vl": 0},
{"inst": "vcvtusi2sd W:xmm, xmm[127:64], r64/m64 {er}" , "op": "RVM-T1S: EVEX.LIG.F2.0F.W1 7B /r" , "vl": 0},
{"inst": "vcvtusi2ss W:xmm, xmm[127:32], r32/m32 {er}" , "op": "RVM-T1S: EVEX.LIG.F3.0F.W0 7B /r" , "vl": 0},
{"inst": "vcvtusi2ss W:xmm, xmm[127:32], r64/m64 {er}" , "op": "RVM-T1S: EVEX.LIG.F3.0F.W1 7B /r" , "vl": 0},
{"inst": "vdivsd W:xmm {kz}, xmm, xmm[63:0]/m64 {er}" , "op": "RVM-T1S: EVEX.LIG.F2.0F.W1 5E /r" , "vl": 0},
{"inst": "vdivss W:xmm {kz}, xmm, xmm[31:0]/m32 {er}" , "op": "RVM-T1S: EVEX.LIG.F3.0F.W0 5E /r" , "vl": 0},
{"inst": "vfixupimmsd X:xmm {kz},xmm[127:64],xmm[63:0]/m64,ib/ub {sae}","op": "RVM-T1S: EVEX.LIG.66.0F3A.W1 55 /r ib" , "vl": 0},
{"inst": "vfixupimmss X:xmm {kz},xmm[127:32],xmm[31:0]/m32,ib/ub {sae}","op": "RVM-T1S: EVEX.LIG.66.0F3A.W0 55 /r ib" , "vl": 0},
{"inst": "vfmadd132sd x:xmm[63:0] {kz}, xmm[63:0], xmm[63:0]/m64 {er}", "op": "RVM-T1S: EVEX.LIG.66.0F38.W1 99 /r" , "vl": 0},
{"inst": "vfmadd132ss x:xmm[31:0] {kz}, xmm[31:0], xmm[31:0]/m32 {er}", "op": "RVM-T1S: EVEX.LIG.66.0F38.W0 99 /r" , "vl": 0},
{"inst": "vfmadd213sd x:xmm[63:0] {kz}, xmm[63:0], xmm[63:0]/m64 {er}", "op": "RVM-T1S: EVEX.LIG.66.0F38.W1 A9 /r" , "vl": 0},
{"inst": "vfmadd213ss x:xmm[31:0] {kz}, xmm[31:0], xmm[31:0]/m32 {er}", "op": "RVM-T1S: EVEX.LIG.66.0F38.W0 A9 /r" , "vl": 0},
{"inst": "vfmadd231sd x:xmm[63:0] {kz}, xmm[63:0], xmm[63:0]/m64 {er}", "op": "RVM-T1S: EVEX.LIG.66.0F38.W1 B9 /r" , "vl": 0},
{"inst": "vfmadd231ss x:xmm[31:0] {kz}, xmm[31:0], xmm[31:0]/m32 {er}", "op": "RVM-T1S: EVEX.LIG.66.0F38.W0 B9 /r" , "vl": 0},
{"inst": "vfmsub132sd x:xmm[63:0] {kz}, xmm[63:0], xmm[63:0]/m64 {er}", "op": "RVM-T1S: EVEX.LIG.66.0F38.W1 9B /r" , "vl": 0},
{"inst": "vfmsub132ss x:xmm[31:0] {kz}, xmm[31:0], xmm[31:0]/m32 {er}", "op": "RVM-T1S: EVEX.LIG.66.0F38.W0 9B /r" , "vl": 0},
{"inst": "vfmsub213sd x:xmm[63:0] {kz}, xmm[63:0], xmm[63:0]/m64 {er}", "op": "RVM-T1S: EVEX.LIG.66.0F38.W1 AB /r" , "vl": 0},
{"inst": "vfmsub213ss x:xmm[31:0] {kz}, xmm[31:0], xmm[31:0]/m32 {er}", "op": "RVM-T1S: EVEX.LIG.66.0F38.W0 AB /r" , "vl": 0},
{"inst": "vfmsub231sd x:xmm[63:0] {kz}, xmm[63:0], xmm[63:0]/m64 {er}", "op": "RVM-T1S: EVEX.LIG.66.0F38.W1 BB /r" , "vl": 0},
{"inst": "vfmsub231ss x:xmm[31:0] {kz}, xmm[31:0], xmm[31:0]/m32 {er}", "op": "RVM-T1S: EVEX.LIG.66.0F38.W0 BB /r" , "vl": 0},
{"inst": "vfnmadd132sd x:xmm[63:0] {kz}, xmm[63:0],xmm[63:0]/m64 {er}", "op": "RVM-T1S: EVEX.LIG.66.0F38.W1 9D /r" , "vl": 0},
{"inst": "vfnmadd132ss x:xmm[31:0] {kz}, xmm[31:0],xmm[31:0]/m32 {er}", "op": "RVM-T1S: EVEX.LIG.66.0F38.W0 9D /r" , "vl": 0},
{"inst": "vfnmadd213sd x:xmm[63:0] {kz}, xmm[63:0],xmm[63:0]/m64 {er}", "op": "RVM-T1S: EVEX.LIG.66.0F38.W1 AD /r" , "vl": 0},
{"inst": "vfnmadd213ss x:xmm[31:0] {kz}, xmm[31:0],xmm[31:0]/m32 {er}", "op": "RVM-T1S: EVEX.LIG.66.0F38.W0 AD /r" , "vl": 0},
{"inst": "vfnmadd231sd x:xmm[63:0] {kz}, xmm[63:0],xmm[63:0]/m64 {er}", "op": "RVM-T1S: EVEX.LIG.66.0F38.W1 BD /r" , "vl": 0},
{"inst": "vfnmadd231ss x:xmm[31:0] {kz}, xmm[31:0],xmm[31:0]/m32 {er}", "op": "RVM-T1S: EVEX.LIG.66.0F38.W0 BD /r" , "vl": 0},
{"inst": "vfnmsub132sd x:xmm[63:0] {kz}, xmm[63:0],xmm[63:0]/m64 {er}", "op": "RVM-T1S: EVEX.LIG.66.0F38.W1 9F /r" , "vl": 0},
{"inst": "vfnmsub132ss x:xmm[31:0] {kz}, xmm[31:0],xmm[31:0]/m32 {er}", "op": "RVM-T1S: EVEX.LIG.66.0F38.W0 9F /r" , "vl": 0},
{"inst": "vfnmsub213sd x:xmm[63:0] {kz}, xmm[63:0],xmm[63:0]/m64 {er}", "op": "RVM-T1S: EVEX.LIG.66.0F38.W1 AF /r" , "vl": 0},
{"inst": "vfnmsub213ss x:xmm[31:0] {kz}, xmm[31:0],xmm[31:0]/m32 {er}", "op": "RVM-T1S: EVEX.LIG.66.0F38.W0 AF /r" , "vl": 0},
{"inst": "vfnmsub231sd X:xmm[63:0] {kz}, xmm[63:0],xmm[63:0]/m64 {er}", "op": "RVM-T1S: EVEX.LIG.66.0F38.W1 BF /r" , "vl": 0},
{"inst": "vfnmsub231ss X:xmm[31:0] {kz}, xmm[31:0],xmm[31:0]/m32 {er}", "op": "RVM-T1S: EVEX.LIG.66.0F38.W0 BF /r" , "vl": 0},
{"inst": "vgetexpsd W:xmm {kz}, xmm[127:64], xmm[63:0]/m64 {sae}" , "op": "RM-T1S: EVEX.LIG.66.0F38.W1 43 /r" , "vl": 0},
{"inst": "vgetexpss W:xmm {kz}, xmm[127:32], xmm[31:0]/m32 {sae}" , "op": "RM-T1S: EVEX.LIG.66.0F38.W0 43 /r" , "vl": 0},
{"inst": "vgetmantsd W:xmm {kz},xmm[127:64],xmm[63:0]/m64,ib/ub {sae}", "op": "RM-T1S: EVEX.LIG.66.0F3A.W1 27 /r ib" , "vl": 0},
{"inst": "vgetmantss W:xmm {kz},xmm[127:32],xmm[31:0]/m32,ib/ub {sae}", "op": "RM-T1S: EVEX.LIG.66.0F3A.W0 27 /r ib" , "vl": 0},
{"inst": "vmaxsd W:xmm {kz}, xmm, xmm[63:0]/m64 {sae}" , "op": "RVM-T1S: EVEX.LIG.F2.0F.W1 5F /r" , "vl": 0},
{"inst": "vmaxss W:xmm {kz}, xmm, xmm[31:0]/m32 {sae}" , "op": "RVM-T1S: EVEX.LIG.F3.0F.W0 5F /r" , "vl": 0},
{"inst": "vminsd W:xmm {kz}, xmm, xmm[63:0]/m64 {sae}" , "op": "RVM-T1S: EVEX.LIG.F2.0F.W1 5D /r" , "vl": 0},
{"inst": "vminss W:xmm {kz}, xmm, xmm[31:0]/m32 {sae}" , "op": "RVM-T1S: EVEX.LIG.F3.0F.W0 5D /r" , "vl": 0},
{"inst": "vmovsd W:m64, xmm[63:0]" , "op": "MR-T1S: EVEX.LIG.F2.0F.W1 11 /r" , "vl": 0},
{"inst": "vmovsd W:xmm[63:0] {kz}, m64" , "op": "MR-T1S: EVEX.LIG.F2.0F.W1 10 /r" , "vl": 0},
{"inst": "vmovsd W:xmm {kz}, xmm[127:64], xmm[63:0]" , "op": "MVR: EVEX.LIG.F2.0F.W1 11 /r" , "vl": 0},
{"inst": "vmovsd W:xmm {kz}, xmm[127:64], xmm[63:0]" , "op": "RVM: EVEX.LIG.F2.0F.W1 10 /r" , "vl": 0},
{"inst": "vmovss W:m32, xmm[31:0]" , "op": "MR-T1S: EVEX.LIG.F3.0F.W0 11 /r" , "vl": 0},
{"inst": "vmovss W:xmm[31:0] {kz}, m32" , "op": "MR-T1S: EVEX.LIG.F3.0F.W0 10 /r" , "vl": 0},
{"inst": "vmovss W:xmm {kz}, xmm[127:32], xmm[31:0]" , "op": "MVR: EVEX.LIG.F3.0F.W0 11 /r" , "vl": 0},
{"inst": "vmovss W:xmm {kz}, xmm[127:32], xmm[31:0]" , "op": "RVM: EVEX.LIG.F3.0F.W0 10 /r" , "vl": 0},
{"inst": "vmulsd W:xmm {kz}, xmm, xmm[63:0]/m64 {er}" , "op": "RVM-T1S: EVEX.LIG.F2.0F.W1 59 /r" , "vl": 0},
{"inst": "vmulss W:xmm {kz}, xmm, xmm[31:0]/m32 {er}" , "op": "RVM-T1S: EVEX.LIG.F3.0F.W0 59 /r" , "vl": 0},
{"inst": "vrcp14sd W:xmm {kz}, xmm[127:64], xmm[63:0]/m64" , "op": "RVM-T1S: EVEX.LIG.66.0F38.W1 4D /r" , "vl": 0},
{"inst": "vrcp14ss W:xmm {kz}, xmm[127:32], xmm[31:0]/m32" , "op": "RVM-T1S: EVEX.LIG.66.0F38.W0 4D /r" , "vl": 0},
{"inst": "vrndscalesd W:xmm {kz},xmm[127:64],xmm[63:0]/m64,ib/ub {sae}","op": "RVM-T1S: EVEX.LIG.66.0F3A.W1 0B /r ib" , "vl": 0},
{"inst": "vrndscaless W:xmm {kz},xmm[127:32],xmm[31:0]/m32,ib/ub {sae}","op": "RVM-T1S: EVEX.LIG.66.0F3A.W0 0A /r ib" , "vl": 0},
{"inst": "vrsqrt14sd W:xmm {kz}, xmm[127:64], xmm[63:0]/m64" , "op": "RVM-T1S: EVEX.LIG.66.0F38.W1 4F /r" , "vl": 0},
{"inst": "vrsqrt14ss W:xmm {kz}, xmm[127:32], xmm[31:0]/m32" , "op": "RVM-T1S: EVEX.LIG.66.0F38.W0 4F /r" , "vl": 0},
{"inst": "vscalefsd W:xmm {kz}, xmm, xmm[63:0]/m64 {er}" , "op": "RVM-T1S: EVEX.LIG.66.0F38.W1 2D /r" , "vl": 0},
{"inst": "vscalefss W:xmm {kz}, xmm, xmm[31:0]/m32 {er}" , "op": "RVM-T1S: EVEX.LIG.66.0F38.W0 2D /r" , "vl": 0},
{"inst": "vsqrtsd W:xmm {kz}, xmm[127:64], xmm[63:0]/m64 {er}" , "op": "RVM-T1S: EVEX.LIG.F2.0F.W1 51 /r" , "vl": 0},
{"inst": "vsqrtss W:xmm {kz}, xmm[127:32], xmm[31:0]/m32 {er}" , "op": "RVM-T1S: EVEX.LIG.F3.0F.W0 51 /r" , "vl": 0},
{"inst": "vsubsd W:xmm {kz}, xmm, xmm[63:0]/m64 {er}" , "op": "RVM-T1S: EVEX.LIG.F2.0F.W1 5C /r" , "vl": 0},
{"inst": "vsubss W:xmm {kz}, xmm, xmm[31:0]/m32 {er}" , "op": "RVM-T1S: EVEX.LIG.F3.0F.W0 5C /r" , "vl": 0},
{"inst": "vucomisd R:xmm[63:0], xmm[63:0]/m64 {sae}" , "op": "RM-T1S: EVEX.LIG.66.0F.W1 2E /r" , "vl": 0, "io": "OF=0 SF=0 ZF=W AF=0 PF=W CF=W"},
{"inst": "vucomiss R:xmm[31:0], xmm[31:0]/m32 {sae}" , "op": "RM-T1S: EVEX.LIG.0F.W0 2E /r" , "vl": 0, "io": "OF=0 SF=0 ZF=W AF=0 PF=W CF=W"}
]},
{"category": "AVX512 SIMD", "ext": "AVX512_F", "data": [
{"inst": "vaddpd W:xmm {kz}, ~xmm, ~xmm/m128/b64" , "op": "RVM-FV: EVEX.128.66.0F.W1 58 /r" , "vl": 1},
{"inst": "vaddpd W:ymm {kz}, ~ymm, ~ymm/m256/b64" , "op": "RVM-FV: EVEX.256.66.0F.W1 58 /r" , "vl": 1},
{"inst": "vaddpd W:zmm {kz}, ~zmm, ~zmm/m512/b64 {er}" , "op": "RVM-FV: EVEX.512.66.0F.W1 58 /r" , "vl": 0},
{"inst": "vaddps W:xmm {kz}, ~xmm, ~xmm/m128/b32" , "op": "RVM-FV: EVEX.128.0F.W0 58 /r" , "vl": 1},
{"inst": "vaddps W:ymm {kz}, ~ymm, ~ymm/m256/b32" , "op": "RVM-FV: EVEX.256.0F.W0 58 /r" , "vl": 1},
{"inst": "vaddps W:zmm {kz}, ~zmm, ~zmm/m512/b32 {er}" , "op": "RVM-FV: EVEX.512.0F.W0 58 /r" , "vl": 0},
{"inst": "valignd W:xmm {kz}, xmm, xmm/m128/b32, ib/ub" , "op": "RVM-FV: EVEX.128.66.0F3A.W0 03 /r ib" , "vl": 1},
{"inst": "valignd W:ymm {kz}, ymm, ymm/m256/b32, ib/ub" , "op": "RVM-FV: EVEX.256.66.0F3A.W0 03 /r ib" , "vl": 1},
{"inst": "valignd W:zmm {kz}, zmm, zmm/m512/b32, ib/ub" , "op": "RVM-FV: EVEX.512.66.0F3A.W0 03 /r ib" , "vl": 0},
{"inst": "valignq W:xmm {kz}, xmm, xmm/m128/b64, ib/ub" , "op": "RVM-FV: EVEX.128.66.0F3A.W1 03 /r ib" , "vl": 1},
{"inst": "valignq W:ymm {kz}, ymm, ymm/m256/b64, ib/ub" , "op": "RVM-FV: EVEX.256.66.0F3A.W1 03 /r ib" , "vl": 1},
{"inst": "valignq W:zmm {kz}, zmm, zmm/m512/b64, ib/ub" , "op": "RVM-FV: EVEX.512.66.0F3A.W1 03 /r ib" , "vl": 0},
{"inst": "vblendmpd W:xmm {kz}, xmm, xmm/m128/b64" , "op": "RVM-FV: EVEX.128.66.0F38.W1 65 /r" , "vl": 1, "k": "blend"},
{"inst": "vblendmpd W:ymm {kz}, ymm, ymm/m256/b64" , "op": "RVM-FV: EVEX.256.66.0F38.W1 65 /r" , "vl": 1, "k": "blend"},
{"inst": "vblendmpd W:zmm {kz}, zmm, zmm/m512/b64" , "op": "RVM-FV: EVEX.512.66.0F38.W1 65 /r" , "vl": 0, "k": "blend"},
{"inst": "vblendmps W:xmm {kz}, xmm, xmm/m128/b32" , "op": "RVM-FV: EVEX.128.66.0F38.W0 65 /r" , "vl": 1, "k": "blend"},
{"inst": "vblendmps W:ymm {kz}, ymm, ymm/m256/b32" , "op": "RVM-FV: EVEX.256.66.0F38.W0 65 /r" , "vl": 1, "k": "blend"},
{"inst": "vblendmps W:zmm {kz}, zmm, zmm/m512/b32" , "op": "RVM-FV: EVEX.512.66.0F38.W0 65 /r" , "vl": 0, "k": "blend"},
{"inst": "vbroadcastf32x4 W:ymm {kz}, m128" , "op": "RM-T4: EVEX.256.66.0F38.W0 1A /r" , "vl": 0},
{"inst": "vbroadcastf32x4 W:zmm {kz}, m128" , "op": "RM-T4: EVEX.512.66.0F38.W0 1A /r" , "vl": 0},
{"inst": "vbroadcastf64x4 W:zmm {kz}, m256" , "op": "RM-T4: EVEX.512.66.0F38.W1 1B /r" , "vl": 0},
{"inst": "vbroadcasti32x4 W:ymm {kz}, m128" , "op": "RM-T4: EVEX.256.66.0F38.W0 5A /r" , "vl": 1},
{"inst": "vbroadcasti32x4 W:zmm {kz}, m128" , "op": "RM-T4: EVEX.512.66.0F38.W0 5A /r" , "vl": 0},
{"inst": "vbroadcasti64x4 W:zmm {kz}, m256" , "op": "RM-T4: EVEX.512.66.0F38.W1 5B /r" , "vl": 0},
{"inst": "vbroadcastsd W:ymm {kz}, xmm[63:0]/m64" , "op": "RM-T1S: EVEX.256.66.0F38.W1 19 /r" , "vl": 1},
{"inst": "vbroadcastsd W:zmm {kz}, xmm[63:0]/m64" , "op": "RM-T1S: EVEX.512.66.0F38.W1 19 /r" , "vl": 0},
{"inst": "vbroadcastss W:xmm {kz}, xmm[31:0]/m32" , "op": "RM-T1S: EVEX.128.66.0F38.W0 18 /r" , "vl": 1},
{"inst": "vbroadcastss W:ymm {kz}, xmm[31:0]/m32" , "op": "RM-T1S: EVEX.256.66.0F38.W0 18 /r" , "vl": 1},
{"inst": "vbroadcastss W:zmm {kz}, xmm[31:0]/m32" , "op": "RM-T1S: EVEX.512.66.0F38.W0 18 /r" , "vl": 0},
{"inst": "vcmppd W:k {k}, xmm, xmm/m128/b64, ib/ub" , "op": "RVM-FV: EVEX.128.66.0F.W1 C2 /r ib" , "vl": 1, "k": "zeroing"},
{"inst": "vcmppd W:k {k}, ymm, ymm/m256/b64, ib/ub" , "op": "RVM-FV: EVEX.256.66.0F.W1 C2 /r ib" , "vl": 1, "k": "zeroing"},
{"inst": "vcmppd W:k {k}, zmm, zmm/m512/b64, ib/ub {sae}" , "op": "RVM-FV: EVEX.512.66.0F.W1 C2 /r ib" , "vl": 0, "k": "zeroing"},
{"inst": "vcmpps W:k {k}, xmm, xmm/m128/b32, ib/ub" , "op": "RVM-FV: EVEX.128.0F.W0 C2 /r ib" , "vl": 1, "k": "zeroing"},
{"inst": "vcmpps W:k {k}, ymm, ymm/m256/b32, ib/ub" , "op": "RVM-FV: EVEX.256.0F.W0 C2 /r ib" , "vl": 1, "k": "zeroing"},
{"inst": "vcmpps W:k {k}, zmm, zmm/m512/b32, ib/ub {sae}" , "op": "RVM-FV: EVEX.512.0F.W0 C2 /r ib" , "vl": 0, "k": "zeroing"},
{"inst": "vcompresspd W:xmm/m128 {kz}, xmm" , "op": "MR-T1S: EVEX.128.66.0F38.W1 8A /r" , "vl": 1},
{"inst": "vcompresspd W:ymm/m256 {kz}, ymm" , "op": "MR-T1S: EVEX.256.66.0F38.W1 8A /r" , "vl": 1},
{"inst": "vcompresspd W:zmm/m512 {kz}, zmm" , "op": "MR-T1S: EVEX.512.66.0F38.W1 8A /r" , "vl": 0},
{"inst": "vcompressps W:xmm/m128 {kz}, xmm" , "op": "MR-T1S: EVEX.128.66.0F38.W0 8A /r" , "vl": 1},
{"inst": "vcompressps W:ymm/m256 {kz}, ymm" , "op": "MR-T1S: EVEX.256.66.0F38.W0 8A /r" , "vl": 1},
{"inst": "vcompressps W:zmm/m512 {kz}, zmm" , "op": "MR-T1S: EVEX.512.66.0F38.W0 8A /r" , "vl": 0},
{"inst": "vcvtdq2pd W:xmm {kz}, xmm[63:0]/m64/b32" , "op": "RM-HV: EVEX.128.F3.0F.W0 E6 /r" , "vl": 1},
{"inst": "vcvtdq2pd W:ymm {kz}, xmm/m128/b32" , "op": "RM-HV: EVEX.256.F3.0F.W0 E6 /r" , "vl": 1},
{"inst": "vcvtdq2pd W:zmm {kz}, ymm/m256/b32" , "op": "RM-HV: EVEX.512.F3.0F.W0 E6 /r" , "vl": 0},
{"inst": "vcvtdq2ps W:xmm {kz}, xmm/m128/b32" , "op": "RM-FV: EVEX.128.0F.W0 5B /r" , "vl": 1},
{"inst": "vcvtdq2ps W:ymm {kz}, ymm/m256/b32" , "op": "RM-FV: EVEX.256.0F.W0 5B /r" , "vl": 1},
{"inst": "vcvtdq2ps W:zmm {kz}, zmm/m512/b32 {er}" , "op": "RM-FV: EVEX.512.0F.W0 5B /r" , "vl": 0},
{"inst": "vcvtpd2ps W:xmm[63:0] {kz}, xmm/m128/b64" , "op": "RM-FV: EVEX.128.66.0F.W1 5A /r" , "vl": 1},
{"inst": "vcvtpd2ps W:xmm {kz}, ymm/m256/b64" , "op": "RM-FV: EVEX.256.66.0F.W1 5A /r" , "vl": 1},
{"inst": "vcvtpd2ps W:ymm {kz}, zmm/m512/b64 {er}" , "op": "RM-FV: EVEX.512.66.0F.W1 5A /r" , "vl": 0},
{"inst": "vcvtpd2dq W:xmm[63:0] {kz}, xmm/m128/b64" , "op": "RM-FV: EVEX.128.F2.0F.W1 E6 /r" , "vl": 1},
{"inst": "vcvtpd2dq W:xmm {kz}, ymm/m256/b64" , "op": "RM-FV: EVEX.256.F2.0F.W1 E6 /r" , "vl": 1},
{"inst": "vcvtpd2dq W:ymm {kz}, zmm/m512/b64 {er}" , "op": "RM-FV: EVEX.512.F2.0F.W1 E6 /r" , "vl": 0},
{"inst": "vcvtpd2udq W:xmm[63:0] {kz}, xmm/m128/b64" , "op": "RM-FV: EVEX.128.0F.W1 79 /r" , "vl": 1},
{"inst": "vcvtpd2udq W:xmm {kz}, ymm/m256/b64" , "op": "RM-FV: EVEX.256.0F.W1 79 /r" , "vl": 1},
{"inst": "vcvtpd2udq W:ymm {kz}, zmm/m512/b64 {er}" , "op": "RM-FV: EVEX.512.0F.W1 79 /r" , "vl": 0},
{"inst": "vcvtph2ps W:xmm {kz}, xmm[63:0]/m64" , "op": "RM-HVM: EVEX.128.66.0F38.W0 13 /r" , "vl": 1},
{"inst": "vcvtph2ps W:ymm {kz}, xmm/m128" , "op": "RM-HVM: EVEX.256.66.0F38.W0 13 /r" , "vl": 1},
{"inst": "vcvtph2ps W:zmm {kz}, ymm/m256 {sae}" , "op": "RM-HVM: EVEX.512.66.0F38.W0 13 /r" , "vl": 0},
{"inst": "vcvtps2dq W:xmm {kz}, xmm/m128/b32" , "op": "RM-FV: EVEX.128.66.0F.W0 5B /r" , "vl": 1},
{"inst": "vcvtps2dq W:ymm {kz}, ymm/m256/b32" , "op": "RM-FV: EVEX.256.66.0F.W0 5B /r" , "vl": 1},
{"inst": "vcvtps2dq W:zmm {kz}, zmm/m512/b32 {er}" , "op": "RM-FV: EVEX.512.66.0F.W0 5B /r" , "vl": 0},
{"inst": "vcvtps2pd W:xmm {kz}, xmm[63:0]/m64/b32" , "op": "RM-HV: EVEX.128.0F.W0 5A /r" , "vl": 1},
{"inst": "vcvtps2pd W:ymm {kz}, xmm/m128/b32" , "op": "RM-HV: EVEX.256.0F.W0 5A /r" , "vl": 1},
{"inst": "vcvtps2pd W:zmm {kz}, ymm/m256/b32 {er}" , "op": "RM-HV: EVEX.512.0F.W0 5A /r" , "vl": 0},
{"inst": "vcvtps2ph W:xmm[63:0]/m64 {kz}, xmm, ib/ub" , "op": "MR-HVM: EVEX.128.66.0F3A.W0 1D /r ib" , "vl": 1},
{"inst": "vcvtps2ph W:xmm/m128 {kz}, ymm, ib/ub" , "op": "MR-HVM: EVEX.256.66.0F3A.W0 1D /r ib" , "vl": 1},
{"inst": "vcvtps2ph W:ymm/m256 {kz}, zmm, ib/ub {sae}" , "op": "MR-HVM: EVEX.512.66.0F3A.W0 1D /r ib" , "vl": 0},
{"inst": "vcvtps2udq W:xmm {kz}, xmm/m128/b32" , "op": "RM-FV: EVEX.128.0F.W0 79 /r" , "vl": 1},
{"inst": "vcvtps2udq W:ymm {kz}, ymm/m256/b32" , "op": "RM-FV: EVEX.256.0F.W0 79 /r" , "vl": 1},
{"inst": "vcvtps2udq W:zmm {kz}, zmm/m512/b32 {er}" , "op": "RM-FV: EVEX.512.0F.W0 79 /r" , "vl": 0},
{"inst": "vcvttpd2dq W:xmm[63:0] {kz}, xmm/m128/b64" , "op": "RM-FV: EVEX.128.66.0F.W1 E6 /r" , "vl": 1},
{"inst": "vcvttpd2dq W:xmm {kz}, ymm/m256/b64" , "op": "RM-FV: EVEX.256.66.0F.W1 E6 /r" , "vl": 1},
{"inst": "vcvttpd2dq W:ymm {kz}, zmm/m512/b64 {sae}" , "op": "RM-FV: EVEX.512.66.0F.W1 E6 /r" , "vl": 0},
{"inst": "vcvttpd2qq W:xmm {kz}, xmm/m128/b64" , "op": "RM-FV: EVEX.128.66.0F.W1 7A /r" , "vl": 1},
{"inst": "vcvttpd2qq W:ymm {kz}, ymm/m256/b64" , "op": "RM-FV: EVEX.256.66.0F.W1 7A /r" , "vl": 1},
{"inst": "vcvttpd2qq W:zmm {kz}, zmm/m512/b64 {sae}" , "op": "RM-FV: EVEX.512.66.0F.W1 7A /r" , "vl": 0},
{"inst": "vcvttpd2udq W:xmm[63:0] {kz}, xmm/m128/b64" , "op": "RM-FV: EVEX.128.0F.W1 78 /r" , "vl": 1},
{"inst": "vcvttpd2udq W:xmm {kz}, ymm/m256/b64" , "op": "RM-FV: EVEX.256.0F.W1 78 /r" , "vl": 1},
{"inst": "vcvttpd2udq W:ymm {kz}, zmm/m512/b64 {sae}" , "op": "RM-FV: EVEX.512.0F.W1 78 /r" , "vl": 0},
{"inst": "vcvttps2dq W:xmm {kz}, xmm/m128/b32" , "op": "RM-FV: EVEX.128.F3.0F.W0 5B /r" , "vl": 1},
{"inst": "vcvttps2dq W:ymm {kz}, ymm/m256/b32" , "op": "RM-FV: EVEX.256.F3.0F.W0 5B /r" , "vl": 1},
{"inst": "vcvttps2dq W:zmm {kz}, zmm/m512/b32 {sae}" , "op": "RM-FV: EVEX.512.F3.0F.W0 5B /r" , "vl": 0},
{"inst": "vcvttps2udq W:xmm {kz}, xmm/m128/b32" , "op": "RM-FV: EVEX.128.0F.W0 78 /r" , "vl": 1},
{"inst": "vcvttps2udq W:ymm {kz}, ymm/m256/b32" , "op": "RM-FV: EVEX.256.0F.W0 78 /r" , "vl": 1},
{"inst": "vcvttps2udq W:zmm {kz}, zmm/m512/b32 {sae}" , "op": "RM-FV: EVEX.512.0F.W0 78 /r" , "vl": 0},
{"inst": "vcvtudq2pd W:xmm {kz}, xmm[63:0]/m64/b32" , "op": "RM-HV: EVEX.128.F3.0F.W0 7A /r" , "vl": 1},
{"inst": "vcvtudq2pd W:ymm {kz}, xmm/m128/b32" , "op": "RM-HV: EVEX.256.F3.0F.W0 7A /r" , "vl": 1},
{"inst": "vcvtudq2pd W:zmm {kz}, ymm/m256/b32" , "op": "RM-HV: EVEX.512.F3.0F.W0 7A /r" , "vl": 0},
{"inst": "vcvtudq2ps W:xmm {kz}, xmm/m128/b32" , "op": "RM-FV: EVEX.128.F2.0F.W0 7A /r" , "vl": 1},
{"inst": "vcvtudq2ps W:ymm {kz}, ymm/m256/b32" , "op": "RM-FV: EVEX.256.F2.0F.W0 7A /r" , "vl": 1},
{"inst": "vcvtudq2ps W:zmm {kz}, zmm/m512/b32 {er}" , "op": "RM-FV: EVEX.512.F2.0F.W0 7A /r" , "vl": 0},
{"inst": "vdivpd W:xmm {kz}, xmm, xmm/m128/b64" , "op": "RVM-FV: EVEX.128.66.0F.W1 5E /r" , "vl": 1},
{"inst": "vdivpd W:ymm {kz}, ymm, ymm/m256/b64" , "op": "RVM-FV: EVEX.256.66.0F.W1 5E /r" , "vl": 1},
{"inst": "vdivpd W:zmm {kz}, zmm, zmm/m512/b64 {er}" , "op": "RVM-FV: EVEX.512.66.0F.W1 5E /r" , "vl": 0},
{"inst": "vdivps W:xmm {kz}, xmm, xmm/m128/b32" , "op": "RVM-FV: EVEX.128.0F.W0 5E /r" , "vl": 1},
{"inst": "vdivps W:ymm {kz}, ymm, ymm/m256/b32" , "op": "RVM-FV: EVEX.256.0F.W0 5E /r" , "vl": 1},
{"inst": "vdivps W:zmm {kz}, zmm, zmm/m512/b32 {er}" , "op": "RVM-FV: EVEX.512.0F.W0 5E /r" , "vl": 0},
{"inst": "vexpandpd W:xmm {kz}, xmm/m128" , "op": "RM-T1S: EVEX.128.66.0F38.W1 88 /r" , "vl": 1},
{"inst": "vexpandpd W:ymm {kz}, ymm/m256" , "op": "RM-T1S: EVEX.256.66.0F38.W1 88 /r" , "vl": 1},
{"inst": "vexpandpd W:zmm {kz}, zmm/m512" , "op": "RM-T1S: EVEX.512.66.0F38.W1 88 /r" , "vl": 0},
{"inst": "vexpandps W:xmm {kz}, xmm/m128" , "op": "RM-T1S: EVEX.128.66.0F38.W0 88 /r" , "vl": 1},
{"inst": "vexpandps W:ymm {kz}, ymm/m256" , "op": "RM-T1S: EVEX.256.66.0F38.W0 88 /r" , "vl": 1},
{"inst": "vexpandps W:zmm {kz}, zmm/m512" , "op": "RM-T1S: EVEX.512.66.0F38.W0 88 /r" , "vl": 0},
{"inst": "vextractf32x4 W:xmm/m128 {kz}, ymm, ib/ub" , "op": "MR-T4: EVEX.256.66.0F3A.W0 19 /r ib" , "vl": 1},
{"inst": "vextractf32x4 W:xmm/m128 {kz}, zmm, ib/ub" , "op": "MR-T4: EVEX.512.66.0F3A.W0 19 /r ib" , "vl": 0},
{"inst": "vextractf64x4 W:ymm/m256 {kz}, zmm, ib/ub" , "op": "MR-T4: EVEX.512.66.0F3A.W1 1B /r ib" , "vl": 0},
{"inst": "vextracti32x4 W:xmm/m128 {kz}, ymm, ib/ub" , "op": "MR-T4: EVEX.256.66.0F3A.W0 39 /r ib" , "vl": 1},
{"inst": "vextracti32x4 W:xmm/m128 {kz}, zmm, ib/ub" , "op": "MR-T4: EVEX.512.66.0F3A.W0 39 /r ib" , "vl": 0},
{"inst": "vextracti64x4 W:ymm/m256 {kz}, zmm, ib/ub" , "op": "MR-T4: EVEX.512.66.0F3A.W1 3B /r ib" , "vl": 0},
{"inst": "vextractps W:r32[31:0]/m32, xmm, ib/ub" , "op": "MR-T1S: EVEX.128.66.0F3A.WIG 17 /r ib" , "vl": 0},
{"inst": "vfixupimmpd X:xmm {kz}, xmm, xmm/m128/b64, ib/ub" , "op": "RVM-FV: EVEX.128.66.0F3A.W1 54 /r ib" , "vl": 1},
{"inst": "vfixupimmpd X:ymm {kz}, ymm, ymm/m256/b64, ib/ub" , "op": "RVM-FV: EVEX.256.66.0F3A.W1 54 /r ib" , "vl": 1},
{"inst": "vfixupimmpd X:zmm {kz}, zmm, zmm/m512/b64, ib/ub {sae}" , "op": "RVM-FV: EVEX.512.66.0F3A.W1 54 /r ib" , "vl": 0},
{"inst": "vfixupimmps X:xmm {kz}, xmm, xmm/m128/b32, ib/ub" , "op": "RVM-FV: EVEX.128.66.0F3A.W0 54 /r ib" , "vl": 1},
{"inst": "vfixupimmps X:ymm {kz}, ymm, ymm/m256/b32, ib/ub" , "op": "RVM-FV: EVEX.256.66.0F3A.W0 54 /r ib" , "vl": 1},
{"inst": "vfixupimmps X:zmm {kz}, zmm, zmm/m512/b32, ib/ub {sae}" , "op": "RVM-FV: EVEX.512.66.0F3A.W0 54 /r ib" , "vl": 0},
{"inst": "vfmadd132pd X:xmm {kz}, xmm, xmm/m128/b64" , "op": "RVM-FV: EVEX.128.66.0F38.W1 98 /r" , "vl": 1},
{"inst": "vfmadd132pd X:ymm {kz}, ymm, ymm/m256/b64" , "op": "RVM-FV: EVEX.256.66.0F38.W1 98 /r" , "vl": 1},
{"inst": "vfmadd132pd X:zmm {kz}, zmm, zmm/m512/b64 {er}" , "op": "RVM-FV: EVEX.512.66.0F38.W1 98 /r" , "vl": 0},
{"inst": "vfmadd132ps X:xmm {kz}, xmm, xmm/m128/b32" , "op": "RVM-FV: EVEX.128.66.0F38.W0 98 /r" , "vl": 1},
{"inst": "vfmadd132ps X:ymm {kz}, ymm, ymm/m256/b32" , "op": "RVM-FV: EVEX.256.66.0F38.W0 98 /r" , "vl": 1},
{"inst": "vfmadd132ps X:zmm {kz}, zmm, zmm/m512/b32 {er}" , "op": "RVM-FV: EVEX.512.66.0F38.W0 98 /r" , "vl": 0},
{"inst": "vfmadd213pd X:xmm {kz}, xmm, xmm/m128/b64" , "op": "RVM-FV: EVEX.128.66.0F38.W1 A8 /r" , "vl": 1},
{"inst": "vfmadd213pd X:ymm {kz}, ymm, ymm/m256/b64" , "op": "RVM-FV: EVEX.256.66.0F38.W1 A8 /r" , "vl": 1},
{"inst": "vfmadd213pd X:zmm {kz}, zmm, zmm/m512/b64 {er}" , "op": "RVM-FV: EVEX.512.66.0F38.W1 A8 /r" , "vl": 0},
{"inst": "vfmadd213ps X:xmm {kz}, xmm, xmm/m128/b32" , "op": "RVM-FV: EVEX.128.66.0F38.W0 A8 /r" , "vl": 1},
{"inst": "vfmadd213ps X:ymm {kz}, ymm, ymm/m256/b32" , "op": "RVM-FV: EVEX.256.66.0F38.W0 A8 /r" , "vl": 1},
{"inst": "vfmadd213ps X:zmm {kz}, zmm, zmm/m512/b32 {er}" , "op": "RVM-FV: EVEX.512.66.0F38.W0 A8 /r" , "vl": 0},
{"inst": "vfmadd231pd X:xmm {kz}, xmm, xmm/m128/b64" , "op": "RVM-FV: EVEX.128.66.0F38.W1 B8 /r" , "vl": 1},
{"inst": "vfmadd231pd X:ymm {kz}, ymm, ymm/m256/b64" , "op": "RVM-FV: EVEX.256.66.0F38.W1 B8 /r" , "vl": 1},
{"inst": "vfmadd231pd X:zmm {kz}, zmm, zmm/m512/b64 {er}" , "op": "RVM-FV: EVEX.512.66.0F38.W1 B8 /r" , "vl": 0},
{"inst": "vfmadd231ps X:xmm {kz}, xmm, xmm/m128/b32" , "op": "RVM-FV: EVEX.128.66.0F38.W0 B8 /r" , "vl": 1},
{"inst": "vfmadd231ps X:ymm {kz}, ymm, ymm/m256/b32" , "op": "RVM-FV: EVEX.256.66.0F38.W0 B8 /r" , "vl": 1},
{"inst": "vfmadd231ps X:zmm {kz}, zmm, zmm/m512/b32 {er}" , "op": "RVM-FV: EVEX.512.66.0F38.W0 B8 /r" , "vl": 0},
{"inst": "vfmaddsub132pd X:xmm {kz}, xmm, xmm/m128/b64" , "op": "RVM-FV: EVEX.128.66.0F38.W1 96 /r" , "vl": 1},
{"inst": "vfmaddsub132pd X:ymm {kz}, ymm, ymm/m256/b64" , "op": "RVM-FV: EVEX.256.66.0F38.W1 96 /r" , "vl": 1},
{"inst": "vfmaddsub132pd X:zmm {kz}, zmm, zmm/m512/b64 {er}" , "op": "RVM-FV: EVEX.512.66.0F38.W1 96 /r" , "vl": 0},
{"inst": "vfmaddsub132ps X:xmm {kz}, xmm, xmm/m128/b32" , "op": "RVM-FV: EVEX.128.66.0F38.W0 96 /r" , "vl": 1},
{"inst": "vfmaddsub132ps X:ymm {kz}, ymm, ymm/m256/b32" , "op": "RVM-FV: EVEX.256.66.0F38.W0 96 /r" , "vl": 1},
{"inst": "vfmaddsub132ps X:zmm {kz}, zmm, zmm/m512/b32 {er}" , "op": "RVM-FV: EVEX.512.66.0F38.W0 96 /r" , "vl": 0},
{"inst": "vfmaddsub213pd X:xmm {kz}, xmm, xmm/m128/b64" , "op": "RVM-FV: EVEX.128.66.0F38.W1 A6 /r" , "vl": 1},
{"inst": "vfmaddsub213pd X:ymm {kz}, ymm, ymm/m256/b64" , "op": "RVM-FV: EVEX.256.66.0F38.W1 A6 /r" , "vl": 1},
{"inst": "vfmaddsub213pd X:zmm {kz}, zmm, zmm/m512/b64 {er}" , "op": "RVM-FV: EVEX.512.66.0F38.W1 A6 /r" , "vl": 0},
{"inst": "vfmaddsub213ps X:xmm {kz}, xmm, xmm/m128/b32" , "op": "RVM-FV: EVEX.128.66.0F38.W0 A6 /r" , "vl": 1},
{"inst": "vfmaddsub213ps X:ymm {kz}, ymm, ymm/m256/b32" , "op": "RVM-FV: EVEX.256.66.0F38.W0 A6 /r" , "vl": 1},
{"inst": "vfmaddsub213ps X:zmm {kz}, zmm, zmm/m512/b32 {er}" , "op": "RVM-FV: EVEX.512.66.0F38.W0 A6 /r" , "vl": 0},
{"inst": "vfmaddsub231pd X:xmm {kz}, xmm, xmm/m128/b64" , "op": "RVM-FV: EVEX.128.66.0F38.W1 B6 /r" , "vl": 1},
{"inst": "vfmaddsub231pd X:ymm {kz}, ymm, ymm/m256/b64" , "op": "RVM-FV: EVEX.256.66.0F38.W1 B6 /r" , "vl": 1},
{"inst": "vfmaddsub231pd X:zmm {kz}, zmm, zmm/m512/b64 {er}" , "op": "RVM-FV: EVEX.512.66.0F38.W1 B6 /r" , "vl": 0},
{"inst": "vfmaddsub231ps X:xmm {kz}, xmm, xmm/m128/b32" , "op": "RVM-FV: EVEX.128.66.0F38.W0 B6 /r" , "vl": 1},
{"inst": "vfmaddsub231ps X:ymm {kz}, ymm, ymm/m256/b32" , "op": "RVM-FV: EVEX.256.66.0F38.W0 B6 /r" , "vl": 1},
{"inst": "vfmaddsub231ps X:zmm {kz}, zmm, zmm/m512/b32 {er}" , "op": "RVM-FV: EVEX.512.66.0F38.W0 B6 /r" , "vl": 0},
{"inst": "vfmsub132pd X:xmm {kz}, xmm, xmm/m128/b64" , "op": "RVM-FV: EVEX.128.66.0F38.W1 9A /r" , "vl": 1},
{"inst": "vfmsub132pd X:ymm {kz}, ymm, ymm/m256/b64" , "op": "RVM-FV: EVEX.256.66.0F38.W1 9A /r" , "vl": 1},
{"inst": "vfmsub132pd X:zmm {kz}, zmm, zmm/m512/b64 {er}" , "op": "RVM-FV: EVEX.512.66.0F38.W1 9A /r" , "vl": 0},
{"inst": "vfmsub132ps X:xmm {kz}, xmm, xmm/m128/b32" , "op": "RVM-FV: EVEX.128.66.0F38.W0 9A /r" , "vl": 1},
{"inst": "vfmsub132ps X:ymm {kz}, ymm, ymm/m256/b32" , "op": "RVM-FV: EVEX.256.66.0F38.W0 9A /r" , "vl": 1},
{"inst": "vfmsub132ps X:zmm {kz}, zmm, zmm/m512/b32 {er}" , "op": "RVM-FV: EVEX.512.66.0F38.W0 9A /r" , "vl": 0},
{"inst": "vfmsub213pd X:xmm {kz}, xmm, xmm/m128/b64" , "op": "RVM-FV: EVEX.128.66.0F38.W1 AA /r" , "vl": 1},
{"inst": "vfmsub213pd X:ymm {kz}, ymm, ymm/m256/b64" , "op": "RVM-FV: EVEX.256.66.0F38.W1 AA /r" , "vl": 1},
{"inst": "vfmsub213pd X:zmm {kz}, zmm, zmm/m512/b64 {er}" , "op": "RVM-FV: EVEX.512.66.0F38.W1 AA /r" , "vl": 0},
{"inst": "vfmsub213ps X:xmm {kz}, xmm, xmm/m128/b32" , "op": "RVM-FV: EVEX.128.66.0F38.W0 AA /r" , "vl": 1},
{"inst": "vfmsub213ps X:ymm {kz}, ymm, ymm/m256/b32" , "op": "RVM-FV: EVEX.256.66.0F38.W0 AA /r" , "vl": 1},
{"inst": "vfmsub213ps X:zmm {kz}, zmm, zmm/m512/b32 {er}" , "op": "RVM-FV: EVEX.512.66.0F38.W0 AA /r" , "vl": 0},
{"inst": "vfmsub231pd X:xmm {kz}, xmm, xmm/m128/b64" , "op": "RVM-FV: EVEX.128.66.0F38.W1 BA /r" , "vl": 1},
{"inst": "vfmsub231pd X:ymm {kz}, ymm, ymm/m256/b64" , "op": "RVM-FV: EVEX.256.66.0F38.W1 BA /r" , "vl": 1},
{"inst": "vfmsub231pd X:zmm {kz}, zmm, zmm/m512/b64 {er}" , "op": "RVM-FV: EVEX.512.66.0F38.W1 BA /r" , "vl": 0},
{"inst": "vfmsub231ps X:xmm {kz}, xmm, xmm/m128/b32" , "op": "RVM-FV: EVEX.128.66.0F38.W0 BA /r" , "vl": 1},
{"inst": "vfmsub231ps X:ymm {kz}, ymm, ymm/m256/b32" , "op": "RVM-FV: EVEX.256.66.0F38.W0 BA /r" , "vl": 1},
{"inst": "vfmsub231ps X:zmm {kz}, zmm, zmm/m512/b32 {er}" , "op": "RVM-FV: EVEX.512.66.0F38.W0 BA /r" , "vl": 0},
{"inst": "vfmsubadd132pd X:xmm {kz}, xmm, xmm/m128/b64" , "op": "RVM-FV: EVEX.128.66.0F38.W1 97 /r" , "vl": 1},
{"inst": "vfmsubadd132pd X:ymm {kz}, ymm, ymm/m256/b64" , "op": "RVM-FV: EVEX.256.66.0F38.W1 97 /r" , "vl": 1},
{"inst": "vfmsubadd132pd X:zmm {kz}, zmm, zmm/m512/b64 {er}" , "op": "RVM-FV: EVEX.512.66.0F38.W1 97 /r" , "vl": 0},
{"inst": "vfmsubadd132ps X:xmm {kz}, xmm, xmm/m128/b32" , "op": "RVM-FV: EVEX.128.66.0F38.W0 97 /r" , "vl": 1},
{"inst": "vfmsubadd132ps X:ymm {kz}, ymm, ymm/m256/b32" , "op": "RVM-FV: EVEX.256.66.0F38.W0 97 /r" , "vl": 1},
{"inst": "vfmsubadd132ps X:zmm {kz}, zmm, zmm/m512/b32 {er}" , "op": "RVM-FV: EVEX.512.66.0F38.W0 97 /r" , "vl": 0},
{"inst": "vfmsubadd213pd X:xmm {kz}, xmm, xmm/m128/b64" , "op": "RVM-FV: EVEX.128.66.0F38.W1 A7 /r" , "vl": 1},
{"inst": "vfmsubadd213pd X:ymm {kz}, ymm, ymm/m256/b64" , "op": "RVM-FV: EVEX.256.66.0F38.W1 A7 /r" , "vl": 1},
{"inst": "vfmsubadd213pd X:zmm {kz}, zmm, zmm/m512/b64 {er}" , "op": "RVM-FV: EVEX.512.66.0F38.W1 A7 /r" , "vl": 0},
{"inst": "vfmsubadd213ps X:xmm {kz}, xmm, xmm/m128/b32" , "op": "RVM-FV: EVEX.128.66.0F38.W0 A7 /r" , "vl": 1},
{"inst": "vfmsubadd213ps X:ymm {kz}, ymm, ymm/m256/b32" , "op": "RVM-FV: EVEX.256.66.0F38.W0 A7 /r" , "vl": 1},
{"inst": "vfmsubadd213ps X:zmm {kz}, zmm, zmm/m512/b32 {er}" , "op": "RVM-FV: EVEX.512.66.0F38.W0 A7 /r" , "vl": 0},
{"inst": "vfmsubadd231pd X:xmm {kz}, xmm, xmm/m128/b64" , "op": "RVM-FV: EVEX.128.66.0F38.W1 B7 /r" , "vl": 1},
{"inst": "vfmsubadd231pd X:ymm {kz}, ymm, ymm/m256/b64" , "op": "RVM-FV: EVEX.256.66.0F38.W1 B7 /r" , "vl": 1},
{"inst": "vfmsubadd231pd X:zmm {kz}, zmm, zmm/m512/b64 {er}" , "op": "RVM-FV: EVEX.512.66.0F38.W1 B7 /r" , "vl": 0},
{"inst": "vfmsubadd231ps X:xmm {kz}, xmm, xmm/m128/b32" , "op": "RVM-FV: EVEX.128.66.0F38.W0 B7 /r" , "vl": 1},
{"inst": "vfmsubadd231ps X:ymm {kz}, ymm, ymm/m256/b32" , "op": "RVM-FV: EVEX.256.66.0F38.W0 B7 /r" , "vl": 1},
{"inst": "vfmsubadd231ps X:zmm {kz}, zmm, zmm/m512/b32 {er}" , "op": "RVM-FV: EVEX.512.66.0F38.W0 B7 /r" , "vl": 0},
{"inst": "vfnmadd132pd X:xmm {kz}, xmm, xmm/m128/b64" , "op": "RVM-FV: EVEX.128.66.0F38.W1 9C /r" , "vl": 1},
{"inst": "vfnmadd132pd X:ymm {kz}, ymm, ymm/m256/b64" , "op": "RVM-FV: EVEX.256.66.0F38.W1 9C /r" , "vl": 1},
{"inst": "vfnmadd132pd X:zmm {kz}, zmm, zmm/m512/b64 {er}" , "op": "RVM-FV: EVEX.512.66.0F38.W1 9C /r" , "vl": 0},
{"inst": "vfnmadd132ps X:xmm {kz}, xmm, xmm/m128/b32" , "op": "RVM-FV: EVEX.128.66.0F38.W0 9C /r" , "vl": 1},
{"inst": "vfnmadd132ps X:ymm {kz}, ymm, ymm/m256/b32" , "op": "RVM-FV: EVEX.256.66.0F38.W0 9C /r" , "vl": 1},
{"inst": "vfnmadd132ps X:zmm {kz}, zmm, zmm/m512/b32 {er}" , "op": "RVM-FV: EVEX.512.66.0F38.W0 9C /r" , "vl": 0},
{"inst": "vfnmadd213pd X:xmm {kz}, xmm, xmm/m128/b64" , "op": "RVM-FV: EVEX.128.66.0F38.W1 AC /r" , "vl": 1},
{"inst": "vfnmadd213pd X:ymm {kz}, ymm, ymm/m256/b64" , "op": "RVM-FV: EVEX.256.66.0F38.W1 AC /r" , "vl": 1},
{"inst": "vfnmadd213pd X:zmm {kz}, zmm, zmm/m512/b64 {er}" , "op": "RVM-FV: EVEX.512.66.0F38.W1 AC /r" , "vl": 0},
{"inst": "vfnmadd213ps X:xmm {kz}, xmm, xmm/m128/b32" , "op": "RVM-FV: EVEX.128.66.0F38.W0 AC /r" , "vl": 1},
{"inst": "vfnmadd213ps X:ymm {kz}, ymm, ymm/m256/b32" , "op": "RVM-FV: EVEX.256.66.0F38.W0 AC /r" , "vl": 1},
{"inst": "vfnmadd213ps X:zmm {kz}, zmm, zmm/m512/b32 {er}" , "op": "RVM-FV: EVEX.512.66.0F38.W0 AC /r" , "vl": 0},
{"inst": "vfnmadd231pd X:xmm {kz}, xmm, xmm/m128/b64" , "op": "RVM-FV: EVEX.128.66.0F38.W1 BC /r" , "vl": 1},
{"inst": "vfnmadd231pd X:ymm {kz}, ymm, ymm/m256/b64" , "op": "RVM-FV: EVEX.256.66.0F38.W1 BC /r" , "vl": 1},
{"inst": "vfnmadd231pd X:zmm {kz}, zmm, zmm/m512/b64 {er}" , "op": "RVM-FV: EVEX.512.66.0F38.W1 BC /r" , "vl": 0},
{"inst": "vfnmadd231ps X:xmm {kz}, xmm, xmm/m128/b32" , "op": "RVM-FV: EVEX.128.66.0F38.W0 BC /r" , "vl": 1},
{"inst": "vfnmadd231ps X:ymm {kz}, ymm, ymm/m256/b32" , "op": "RVM-FV: EVEX.256.66.0F38.W0 BC /r" , "vl": 1},
{"inst": "vfnmadd231ps X:zmm {kz}, zmm, zmm/m512/b32 {er}" , "op": "RVM-FV: EVEX.512.66.0F38.W0 BC /r" , "vl": 0},
{"inst": "vfnmsub132pd X:xmm {kz}, xmm, xmm/m128/b64" , "op": "RVM-FV: EVEX.128.66.0F38.W1 9E /r" , "vl": 1},
{"inst": "vfnmsub132pd X:ymm {kz}, ymm, ymm/m256/b64" , "op": "RVM-FV: EVEX.256.66.0F38.W1 9E /r" , "vl": 1},
{"inst": "vfnmsub132pd X:zmm {kz}, zmm, zmm/m512/b64 {er}" , "op": "RVM-FV: EVEX.512.66.0F38.W1 9E /r" , "vl": 0},
{"inst": "vfnmsub132ps X:xmm {kz}, xmm, xmm/m128/b32" , "op": "RVM-FV: EVEX.128.66.0F38.W0 9E /r" , "vl": 1},
{"inst": "vfnmsub132ps X:ymm {kz}, ymm, ymm/m256/b32" , "op": "RVM-FV: EVEX.256.66.0F38.W0 9E /r" , "vl": 1},
{"inst": "vfnmsub132ps X:zmm {kz}, zmm, zmm/m512/b32 {er}" , "op": "RVM-FV: EVEX.512.66.0F38.W0 9E /r" , "vl": 0},
{"inst": "vfnmsub213pd X:xmm {kz}, xmm, xmm/m128/b64" , "op": "RVM-FV: EVEX.128.66.0F38.W1 AE /r" , "vl": 1},
{"inst": "vfnmsub213pd X:ymm {kz}, ymm, ymm/m256/b64" , "op": "RVM-FV: EVEX.256.66.0F38.W1 AE /r" , "vl": 1},
{"inst": "vfnmsub213pd X:zmm {kz}, zmm, zmm/m512/b64 {er}" , "op": "RVM-FV: EVEX.512.66.0F38.W1 AE /r" , "vl": 0},
{"inst": "vfnmsub213ps X:xmm {kz}, xmm, xmm/m128/b32" , "op": "RVM-FV: EVEX.128.66.0F38.W0 AE /r" , "vl": 1},
{"inst": "vfnmsub213ps X:ymm {kz}, ymm, ymm/m256/b32" , "op": "RVM-FV: EVEX.256.66.0F38.W0 AE /r" , "vl": 1},
{"inst": "vfnmsub213ps X:zmm {kz}, zmm, zmm/m512/b32 {er}" , "op": "RVM-FV: EVEX.512.66.0F38.W0 AE /r" , "vl": 0},
{"inst": "vfnmsub231pd X:xmm {kz}, xmm, xmm/m128/b64" , "op": "RVM-FV: EVEX.128.66.0F38.W1 BE /r" , "vl": 1},
{"inst": "vfnmsub231pd X:ymm {kz}, ymm, ymm/m256/b64" , "op": "RVM-FV: EVEX.256.66.0F38.W1 BE /r" , "vl": 1},
{"inst": "vfnmsub231pd X:zmm {kz}, zmm, zmm/m512/b64 {er}" , "op": "RVM-FV: EVEX.512.66.0F38.W1 BE /r" , "vl": 0},
{"inst": "vfnmsub231ps X:xmm {kz}, xmm, xmm/m128/b32" , "op": "RVM-FV: EVEX.128.66.0F38.W0 BE /r" , "vl": 1},
{"inst": "vfnmsub231ps X:ymm {kz}, ymm, ymm/m256/b32" , "op": "RVM-FV: EVEX.256.66.0F38.W0 BE /r" , "vl": 1},
{"inst": "vfnmsub231ps X:zmm {kz}, zmm, zmm/m512/b32 {er}" , "op": "RVM-FV: EVEX.512.66.0F38.W0 BE /r" , "vl": 0},
{"inst": "vgatherdpd X:xmm {k}, vm32x" , "op": "RM-T1S: EVEX.128.66.0F38.W1 92 /r" , "vl": 1},
{"inst": "vgatherdpd X:ymm {k}, vm32x" , "op": "RM-T1S: EVEX.256.66.0F38.W1 92 /r" , "vl": 1},
{"inst": "vgatherdpd X:zmm {k}, vm32y" , "op": "RM-T1S: EVEX.512.66.0F38.W1 92 /r" , "vl": 0},
{"inst": "vgatherdps X:xmm {k}, vm32x" , "op": "RM-T1S: EVEX.128.66.0F38.W0 92 /r" , "vl": 1},
{"inst": "vgatherdps X:ymm {k}, vm32y" , "op": "RM-T1S: EVEX.256.66.0F38.W0 92 /r" , "vl": 1},
{"inst": "vgatherdps X:zmm {k}, vm32z" , "op": "RM-T1S: EVEX.512.66.0F38.W0 92 /r" , "vl": 0},
{"inst": "vgatherqpd X:xmm {k}, vm64x" , "op": "RM-T1S: EVEX.128.66.0F38.W1 93 /r" , "vl": 1},
{"inst": "vgatherqpd X:ymm {k}, vm64y" , "op": "RM-T1S: EVEX.256.66.0F38.W1 93 /r" , "vl": 1},
{"inst": "vgatherqpd X:zmm {k}, vm64z" , "op": "RM-T1S: EVEX.512.66.0F38.W1 93 /r" , "vl": 0},
{"inst": "vgatherqps X:xmm {k}, vm64x" , "op": "RM-T1S: EVEX.128.66.0F38.W0 93 /r" , "vl": 1},
{"inst": "vgatherqps X:xmm {k}, vm64y" , "op": "RM-T1S: EVEX.256.66.0F38.W0 93 /r" , "vl": 1},
{"inst": "vgatherqps X:ymm {k}, vm64z" , "op": "RM-T1S: EVEX.512.66.0F38.W0 93 /r" , "vl": 0},
{"inst": "vgetexppd W:xmm {kz}, xmm/m128/b64" , "op": "RM-FV: EVEX.128.66.0F38.W1 42 /r" , "vl": 1},
{"inst": "vgetexppd W:ymm {kz}, ymm/m256/b64" , "op": "RM-FV: EVEX.256.66.0F38.W1 42 /r" , "vl": 1},
{"inst": "vgetexppd W:zmm {kz}, zmm/m512/b64 {sae}" , "op": "RM-FV: EVEX.512.66.0F38.W1 42 /r" , "vl": 0},
{"inst": "vgetexpps W:xmm {kz}, xmm/m128/b32" , "op": "RM-FV: EVEX.128.66.0F38.W0 42 /r" , "vl": 1},
{"inst": "vgetexpps W:ymm {kz}, ymm/m256/b32" , "op": "RM-FV: EVEX.256.66.0F38.W0 42 /r" , "vl": 1},
{"inst": "vgetexpps W:zmm {kz}, zmm/m512/b32 {sae}" , "op": "RM-FV: EVEX.512.66.0F38.W0 42 /r" , "vl": 0},
{"inst": "vgetmantpd W:xmm {kz}, xmm/m128/b64, ib/ub" , "op": "RM-FV: EVEX.128.66.0F3A.W1 26 /r ib" , "vl": 1},
{"inst": "vgetmantpd W:ymm {kz}, ymm/m256/b64, ib/ub" , "op": "RM-FV: EVEX.256.66.0F3A.W1 26 /r ib" , "vl": 1},
{"inst": "vgetmantpd W:zmm {kz}, zmm/m512/b64, ib/ub {sae}" , "op": "RM-FV: EVEX.512.66.0F3A.W1 26 /r ib" , "vl": 0},
{"inst": "vgetmantps W:xmm {kz}, xmm/m128/b32, ib/ub" , "op": "RM-FV: EVEX.128.66.0F3A.W0 26 /r ib" , "vl": 1},
{"inst": "vgetmantps W:ymm {kz}, ymm/m256/b32, ib/ub" , "op": "RM-FV: EVEX.256.66.0F3A.W0 26 /r ib" , "vl": 1},
{"inst": "vgetmantps W:zmm {kz}, zmm/m512/b32, ib/ub {sae}" , "op": "RM-FV: EVEX.512.66.0F3A.W0 26 /r ib" , "vl": 0},
{"inst": "vinsertf32x4 W:ymm {kz}, ymm, xmm/m128, ib/ub" , "op": "RVM-T4: EVEX.256.66.0F3A.W0 18 /r ib" , "vl": 1},
{"inst": "vinsertf32x4 W:zmm {kz}, zmm, xmm/m128, ib/ub" , "op": "RVM-T4: EVEX.512.66.0F3A.W0 18 /r ib" , "vl": 0},
{"inst": "vinsertf64x4 W:zmm {kz}, zmm, ymm/m256, ib/ub" , "op": "RVM-T4: EVEX.512.66.0F3A.W1 1A /r ib" , "vl": 0},
{"inst": "vinserti32x4 W:ymm {kz}, ymm, xmm/m128, ib/ub" , "op": "RVM-T4: EVEX.256.66.0F3A.W0 38 /r ib" , "vl": 1},
{"inst": "vinserti32x4 W:zmm {kz}, zmm, xmm/m128, ib/ub" , "op": "RVM-T4: EVEX.512.66.0F3A.W0 38 /r ib" , "vl": 0},
{"inst": "vinserti64x4 W:zmm {kz}, zmm, ymm/m256, ib/ub" , "op": "RVM-T4: EVEX.512.66.0F3A.W1 3A /r ib" , "vl": 0},
{"inst": "vinsertps W:xmm, xmm, xmm[31:0]/m32, ib/ub" , "op": "RVM-T1S: EVEX.128.66.0F3A.W0 21 /r ib" , "vl": 0},
{"inst": "vmaxpd W:xmm {kz}, xmm, xmm/m128/b64" , "op": "RVM-FV: EVEX.128.66.0F.W1 5F /r" , "vl": 1},
{"inst": "vmaxpd W:ymm {kz}, ymm, ymm/m256/b64" , "op": "RVM-FV: EVEX.256.66.0F.W1 5F /r" , "vl": 1},
{"inst": "vmaxpd W:zmm {kz}, zmm, zmm/m512/b64 {sae}" , "op": "RVM-FV: EVEX.512.66.0F.W1 5F /r" , "vl": 0},
{"inst": "vmaxps W:xmm {kz}, xmm, xmm/m128/b32" , "op": "RVM-FV: EVEX.128.0F.W0 5F /r" , "vl": 1},
{"inst": "vmaxps W:ymm {kz}, ymm, ymm/m256/b32" , "op": "RVM-FV: EVEX.256.0F.W0 5F /r" , "vl": 1},
{"inst": "vmaxps W:zmm {kz}, zmm, zmm/m512/b32 {sae}" , "op": "RVM-FV: EVEX.512.0F.W0 5F /r" , "vl": 0},
{"inst": "vminpd W:xmm {kz}, xmm, xmm/m128/b64" , "op": "RVM-FV: EVEX.128.66.0F.W1 5D /r" , "vl": 1},
{"inst": "vminpd W:ymm {kz}, ymm, ymm/m256/b64" , "op": "RVM-FV: EVEX.256.66.0F.W1 5D /r" , "vl": 1},
{"inst": "vminpd W:zmm {kz}, zmm, zmm/m512/b64 {sae}" , "op": "RVM-FV: EVEX.512.66.0F.W1 5D /r" , "vl": 0},
{"inst": "vminps W:xmm {kz}, xmm, xmm/m128/b32" , "op": "RVM-FV: EVEX.128.0F.W0 5D /r" , "vl": 1},
{"inst": "vminps W:ymm {kz}, ymm, ymm/m256/b32" , "op": "RVM-FV: EVEX.256.0F.W0 5D /r" , "vl": 1},
{"inst": "vminps W:zmm {kz}, zmm, zmm/m512/b32 {sae}" , "op": "RVM-FV: EVEX.512.0F.W0 5D /r" , "vl": 0},
{"inst": "vmovapd W:xmm {kz}, xmm/m128" , "op": "RM-FVM: EVEX.128.66.0F.W1 28 /r" , "vl": 1},
{"inst": "vmovapd W:xmm/m128 {kz}, xmm" , "op": "MR-FVM: EVEX.128.66.0F.W1 29 /r" , "vl": 1},
{"inst": "vmovapd W:ymm {kz}, ymm/m256" , "op": "RM-FVM: EVEX.256.66.0F.W1 28 /r" , "vl": 1},
{"inst": "vmovapd W:ymm/m256 {kz}, ymm" , "op": "MR-FVM: EVEX.256.66.0F.W1 29 /r" , "vl": 1},
{"inst": "vmovapd W:zmm {kz}, zmm/m512" , "op": "RM-FVM: EVEX.512.66.0F.W1 28 /r" , "vl": 0},
{"inst": "vmovapd W:zmm/m512 {kz}, zmm" , "op": "MR-FVM: EVEX.512.66.0F.W1 29 /r" , "vl": 0},
{"inst": "vmovaps W:xmm {kz}, xmm/m128" , "op": "RM-FVM: EVEX.128.0F.W0 28 /r" , "vl": 1},
{"inst": "vmovaps W:xmm/m128 {kz}, xmm" , "op": "MR-FVM: EVEX.128.0F.W0 29 /r" , "vl": 1},
{"inst": "vmovaps W:ymm {kz}, ymm/m256" , "op": "RM-FVM: EVEX.256.0F.W0 28 /r" , "vl": 1},
{"inst": "vmovaps W:ymm/m256 {kz}, ymm" , "op": "MR-FVM: EVEX.256.0F.W0 29 /r" , "vl": 1},
{"inst": "vmovaps W:zmm {kz}, zmm/m512" , "op": "RM-FVM: EVEX.512.0F.W0 28 /r" , "vl": 0},
{"inst": "vmovaps W:zmm/m512 {kz}, zmm" , "op": "MR-FVM: EVEX.512.0F.W0 29 /r" , "vl": 0},
{"inst": "vmovd W:r32/m32, xmm[31:0]" , "op": "MR-T1S: EVEX.128.66.0F.W0 7E /r" , "vl": 0},
{"inst": "vmovd W:xmm[31:0], r32/m32" , "op": "RM-T1S: EVEX.128.66.0F.W0 6E /r" , "vl": 0},
{"inst": "vmovddup W:xmm {kz}, xmm[63:0]/m64" , "op": "RM-DUP: EVEX.128.F2.0F.W1 12 /r" , "vl": 1},
{"inst": "vmovddup W:ymm {kz}, ymm/m256" , "op": "RM-DUP: EVEX.256.F2.0F.W1 12 /r" , "vl": 1},
{"inst": "vmovddup W:zmm {kz}, zmm/m512" , "op": "RM-DUP: EVEX.512.F2.0F.W1 12 /r" , "vl": 0},
{"inst": "vmovdqa32 W:xmm {kz}, xmm/m128" , "op": "RM-FVM: EVEX.128.66.0F.W0 6F /r" , "vl": 1},
{"inst": "vmovdqa32 W:xmm/m128 {kz}, xmm" , "op": "MR-FVM: EVEX.128.66.0F.W0 7F /r" , "vl": 1},
{"inst": "vmovdqa32 W:ymm {kz}, ymm/m256" , "op": "RM-FVM: EVEX.256.66.0F.W0 6F /r" , "vl": 1},
{"inst": "vmovdqa32 W:ymm/m256 {kz}, ymm" , "op": "MR-FVM: EVEX.256.66.0F.W0 7F /r" , "vl": 1},
{"inst": "vmovdqa32 W:zmm {kz}, zmm/m512" , "op": "RM-FVM: EVEX.512.66.0F.W0 6F /r" , "vl": 0},
{"inst": "vmovdqa32 W:zmm/m512 {kz}, zmm" , "op": "MR-FVM: EVEX.512.66.0F.W0 7F /r" , "vl": 0},
{"inst": "vmovdqa64 W:xmm {kz}, xmm/m128" , "op": "RM-FVM: EVEX.128.66.0F.W1 6F /r" , "vl": 1},
{"inst": "vmovdqa64 W:xmm/m128 {kz}, xmm" , "op": "MR-FVM: EVEX.128.66.0F.W1 7F /r" , "vl": 1},
{"inst": "vmovdqa64 W:ymm {kz}, ymm/m256" , "op": "RM-FVM: EVEX.256.66.0F.W1 6F /r" , "vl": 1},
{"inst": "vmovdqa64 W:ymm/m256 {kz}, ymm" , "op": "MR-FVM: EVEX.256.66.0F.W1 7F /r" , "vl": 1},
{"inst": "vmovdqa64 W:zmm {kz}, zmm/m512" , "op": "RM-FVM: EVEX.512.66.0F.W1 6F /r" , "vl": 0},
{"inst": "vmovdqa64 W:zmm/m512 {kz}, zmm" , "op": "MR-FVM: EVEX.512.66.0F.W1 7F /r" , "vl": 0},
{"inst": "vmovdqu32 W:xmm {kz}, xmm/m128" , "op": "RM-FVM: EVEX.128.F3.0F.W0 6F /r" , "vl": 1},
{"inst": "vmovdqu32 W:xmm/m128 {kz}, xmm" , "op": "MR-FVM: EVEX.128.F3.0F.W0 7F /r" , "vl": 1},
{"inst": "vmovdqu32 W:ymm {kz}, ymm/m256" , "op": "RM-FVM: EVEX.256.F3.0F.W0 6F /r" , "vl": 1},
{"inst": "vmovdqu32 W:ymm/m256 {kz}, ymm" , "op": "MR-FVM: EVEX.256.F3.0F.W0 7F /r" , "vl": 1},
{"inst": "vmovdqu32 W:zmm {kz}, zmm/m512" , "op": "RM-FVM: EVEX.512.F3.0F.W0 6F /r" , "vl": 0},
{"inst": "vmovdqu32 W:zmm/m512 {kz}, zmm" , "op": "MR-FVM: EVEX.512.F3.0F.W0 7F /r" , "vl": 0},
{"inst": "vmovdqu64 W:xmm {kz}, xmm/m128" , "op": "RM-FVM: EVEX.128.F3.0F.W1 6F /r" , "vl": 1},
{"inst": "vmovdqu64 W:xmm/m128 {kz}, xmm" , "op": "MR-FVM: EVEX.128.F3.0F.W1 7F /r" , "vl": 1},
{"inst": "vmovdqu64 W:ymm {kz}, ymm/m256" , "op": "RM-FVM: EVEX.256.F3.0F.W1 6F /r" , "vl": 1},
{"inst": "vmovdqu64 W:ymm/m256 {kz}, ymm" , "op": "MR-FVM: EVEX.256.F3.0F.W1 7F /r" , "vl": 1},
{"inst": "vmovdqu64 W:zmm {kz}, zmm/m512" , "op": "RM-FVM: EVEX.512.F3.0F.W1 6F /r" , "vl": 0},
{"inst": "vmovdqu64 W:zmm/m512 {kz}, zmm" , "op": "MR-FVM: EVEX.512.F3.0F.W1 7F /r" , "vl": 0},
{"inst": "vmovhlps W:xmm, xmm[127:64], xmm[127:64]" , "op": "RVM: EVEX.128.0F.W0 12 /r" , "vl": 0},
{"inst": "vmovhpd W:m64, xmm[127:64]" , "op": "MR-T1S: EVEX.128.66.0F.W1 17 /r" , "vl": 0},
{"inst": "vmovhpd W:xmm, xmm[63:0], m64" , "op": "RVM-T1S: EVEX.128.66.0F.W1 16 /r" , "vl": 0},
{"inst": "vmovhps W:m64, xmm[127:64]" , "op": "MR-T2: EVEX.128.0F.W0 17 /r" , "vl": 0},
{"inst": "vmovhps W:xmm, xmm[63:0], m64" , "op": "RVM-T2: EVEX.128.0F.W0 16 /r" , "vl": 0},
{"inst": "vmovlhps W:xmm, xmm[63:0], xmm[63:0]" , "op": "RVM: EVEX.128.0F.W0 16 /r" , "vl": 0},
{"inst": "vmovlpd W:m64, xmm[63:0]" , "op": "MR-T1S: EVEX.128.66.0F.W1 13 /r" , "vl": 0},
{"inst": "vmovlpd W:xmm, xmm[127:64], m64" , "op": "RVM-T1S: EVEX.128.66.0F.W1 12 /r" , "vl": 0},
{"inst": "vmovlps W:m64, xmm[63:0]" , "op": "MR-T2: EVEX.128.0F.W0 13 /r" , "vl": 0},
{"inst": "vmovlps W:xmm, xmm[127:64], m64" , "op": "RVM-T2: EVEX.128.0F.W0 12 /r" , "vl": 0},
{"inst": "vmovntdq W:m128, xmm" , "op": "MR-FVM: EVEX.128.66.0F.W0 E7 /r" , "vl": 1},
{"inst": "vmovntdq W:m256, ymm" , "op": "MR-FVM: EVEX.256.66.0F.W0 E7 /r" , "vl": 1},
{"inst": "vmovntdq W:m512, zmm" , "op": "MR-FVM: EVEX.512.66.0F.W0 E7 /r" , "vl": 0},
{"inst": "vmovntdqa W:xmm, m128" , "op": "RM-FVM: EVEX.128.66.0F38.W0 2A /r" , "vl": 1},
{"inst": "vmovntdqa W:ymm, m256" , "op": "RM-FVM: EVEX.256.66.0F38.W0 2A /r" , "vl": 1},
{"inst": "vmovntdqa W:zmm, m512" , "op": "RM-FVM: EVEX.512.66.0F38.W0 2A /r" , "vl": 0},
{"inst": "vmovntpd W:m128, xmm" , "op": "MR-FVM: EVEX.128.66.0F.W1 2B /r" , "vl": 1},
{"inst": "vmovntpd W:m256, ymm" , "op": "MR-FVM: EVEX.256.66.0F.W1 2B /r" , "vl": 1},
{"inst": "vmovntpd W:m512, zmm" , "op": "MR-FVM: EVEX.512.66.0F.W1 2B /r" , "vl": 0},
{"inst": "vmovntps W:m128, xmm" , "op": "MR-FVM: EVEX.128.66.0F.W0 2B /r" , "vl": 1},
{"inst": "vmovntps W:m256, ymm" , "op": "MR-FVM: EVEX.256.66.0F.W0 2B /r" , "vl": 1},
{"inst": "vmovntps W:m512, zmm" , "op": "MR-FVM: EVEX.512.0F.W0 2B /r" , "vl": 0},
{"inst": "vmovq W:r64/m64, xmm[63:0]" , "op": "MR-T1S: EVEX.128.66.0F.W1 7E /r" , "vl": 0},
{"inst": "vmovq W:xmm[63:0], r64/m64" , "op": "RM-T1S: EVEX.128.66.0F.W1 6E /r" , "vl": 0},
{"inst": "vmovq W:xmm[63:0], xmm[63:0]/m64" , "op": "RM-T1S: EVEX.128.F3.0F.W1 7E /r" , "vl": 0},
{"inst": "vmovq W:xmm[63:0]/m64, xmm[63:0]" , "op": "MR-T1S: EVEX.128.66.0F.W1 D6 /r" , "vl": 0},
{"inst": "vmovshdup W:xmm {kz}, xmm/m128" , "op": "RVM-FVM: EVEX.128.F3.0F.W0 16 /r" , "vl": 1},
{"inst": "vmovshdup W:ymm {kz}, ymm/m256" , "op": "RVM-FVM: EVEX.256.F3.0F.W0 16 /r" , "vl": 1},
{"inst": "vmovshdup W:zmm {kz}, zmm/m512" , "op": "RVM-FVM: EVEX.512.F3.0F.W0 16 /r" , "vl": 0},
{"inst": "vmovsldup W:xmm {kz}, xmm/m128" , "op": "RVM-FVM: EVEX.128.F3.0F.W0 12 /r" , "vl": 1},
{"inst": "vmovsldup W:ymm {kz}, ymm/m256" , "op": "RVM-FVM: EVEX.256.F3.0F.W0 12 /r" , "vl": 1},
{"inst": "vmovsldup W:zmm {kz}, zmm/m512" , "op": "RVM-FVM: EVEX.512.F3.0F.W0 12 /r" , "vl": 0},
{"inst": "vmovupd W:xmm {kz}, xmm/m128" , "op": "RM-FVM: EVEX.128.66.0F.W1 10 /r" , "vl": 1},
{"inst": "vmovupd W:xmm/m128 {kz}, xmm" , "op": "MR-FVM: EVEX.128.66.0F.W1 11 /r" , "vl": 1},
{"inst": "vmovupd W:ymm {kz}, ymm/m256" , "op": "RM-FVM: EVEX.256.66.0F.W1 11 /r" , "vl": 1},
{"inst": "vmovupd W:ymm/m256 {kz}, ymm" , "op": "MR-FVM: EVEX.256.66.0F.W1 10 /r" , "vl": 1},
{"inst": "vmovupd W:zmm {kz}, zmm/m512" , "op": "RM-FVM: EVEX.512.66.0F.W1 10 /r" , "vl": 0},
{"inst": "vmovupd W:zmm/m512 {kz}, zmm" , "op": "MR-FVM: EVEX.512.66.0F.W1 11 /r" , "vl": 0},
{"inst": "vmovups W:xmm {kz}, xmm/m128" , "op": "RM-FVM: EVEX.128.0F.W0 10 /r" , "vl": 1},
{"inst": "vmovups W:xmm/m128 {kz}, xmm" , "op": "MR-FVM: EVEX.128.0F.W0 11 /r" , "vl": 1},
{"inst": "vmovups W:ymm {kz}, ymm/m256" , "op": "RM-FVM: EVEX.256.0F.W0 10 /r" , "vl": 1},
{"inst": "vmovups W:ymm/m256 {kz}, ymm" , "op": "MR-FVM: EVEX.256.0F.W0 11 /r" , "vl": 1},
{"inst": "vmovups W:zmm {kz}, zmm/m512" , "op": "RM-FVM: EVEX.512.0F.W0 10 /r" , "vl": 0},
{"inst": "vmovups W:zmm/m512 {kz}, zmm" , "op": "MR-FVM: EVEX.512.0F.W0 11 /r" , "vl": 0},
{"inst": "vmulpd W:xmm {kz}, ~xmm, ~xmm/m128/b64" , "op": "RVM-FV: EVEX.128.66.0F.W1 59 /r" , "vl": 1},
{"inst": "vmulpd W:ymm {kz}, ~ymm, ~ymm/m256/b64" , "op": "RVM-FV: EVEX.256.66.0F.W1 59 /r" , "vl": 1},
{"inst": "vmulpd W:zmm {kz}, ~zmm, ~zmm/m512/b64 {er}" , "op": "RVM-FV: EVEX.512.66.0F.W1 59 /r" , "vl": 0},
{"inst": "vmulps W:xmm {kz}, ~xmm, ~xmm/m128/b32" , "op": "RVM-FV: EVEX.128.0F.W0 59 /r" , "vl": 1},
{"inst": "vmulps W:ymm {kz}, ~ymm, ~ymm/m256/b32" , "op": "RVM-FV: EVEX.256.0F.W0 59 /r" , "vl": 1},
{"inst": "vmulps W:zmm {kz}, ~zmm, ~zmm/m512/b32 {er}" , "op": "RVM-FV: EVEX.512.0F.W0 59 /r" , "vl": 0},
{"inst": "vpabsd W:xmm {kz}, xmm/m128/b32" , "op": "RM-FV: EVEX.128.66.0F38.W0 1E /r" , "vl": 1},
{"inst": "vpabsd W:ymm {kz}, ymm/m256/b32" , "op": "RM-FV: EVEX.256.66.0F38.W0 1E /r" , "vl": 1},
{"inst": "vpabsd W:zmm {kz}, zmm/m512/b32" , "op": "RM-FV: EVEX.512.66.0F38.W0 1E /r" , "vl": 0},
{"inst": "vpabsq W:xmm {kz}, xmm/m128/b64" , "op": "RM-FV: EVEX.128.66.0F38.W1 1F /r" , "vl": 1},
{"inst": "vpabsq W:ymm {kz}, ymm/m256/b64" , "op": "RM-FV: EVEX.256.66.0F38.W1 1F /r" , "vl": 1},
{"inst": "vpabsq W:zmm {kz}, zmm/m512/b64" , "op": "RM-FV: EVEX.512.66.0F38.W1 1F /r" , "vl": 0},
{"inst": "vpaddd W:xmm {kz}, ~xmm, ~xmm/m128/b32" , "op": "RVM-FV: EVEX.128.66.0F.W0 FE /r" , "vl": 1},
{"inst": "vpaddd W:ymm {kz}, ~ymm, ~ymm/m256/b32" , "op": "RVM-FV: EVEX.256.66.0F.W0 FE /r" , "vl": 1},
{"inst": "vpaddd W:zmm {kz}, ~zmm, ~zmm/m512/b32" , "op": "RVM-FV: EVEX.512.66.0F.W0 FE /r" , "vl": 0},
{"inst": "vpaddq W:xmm {kz}, ~xmm, ~xmm/m128/b64" , "op": "RVM-FV: EVEX.128.66.0F.W1 D4 /r" , "vl": 1},
{"inst": "vpaddq W:ymm {kz}, ~ymm, ~ymm/m256/b64" , "op": "RVM-FV: EVEX.256.66.0F.W1 D4 /r" , "vl": 1},
{"inst": "vpaddq W:zmm {kz}, ~zmm, ~zmm/m512/b64" , "op": "RVM-FV: EVEX.512.66.0F.W1 D4 /r" , "vl": 0},
{"inst": "vpandd W:xmm {kz}, ~xmm, ~xmm/m128/b32" , "op": "RVM-FV: EVEX.128.66.0F.W0 DB /r" , "vl": 1},
{"inst": "vpandd W:ymm {kz}, ~ymm, ~ymm/m256/b32" , "op": "RVM-FV: EVEX.256.66.0F.W0 DB /r" , "vl": 1},
{"inst": "vpandd W:zmm {kz}, ~zmm, ~zmm/m512/b32" , "op": "RVM-FV: EVEX.512.66.0F.W0 DB /r" , "vl": 0},
{"inst": "vpandnd W:xmm {kz}, xmm, xmm/m128/b32" , "op": "RVM-FV: EVEX.128.66.0F.W0 DF /r" , "vl": 1},
{"inst": "vpandnd W:ymm {kz}, ymm, ymm/m256/b32" , "op": "RVM-FV: EVEX.256.66.0F.W0 DF /r" , "vl": 1},
{"inst": "vpandnd W:zmm {kz}, zmm, zmm/m512/b32" , "op": "RVM-FV: EVEX.512.66.0F.W0 DF /r" , "vl": 0},
{"inst": "vpandnq W:xmm {kz}, xmm, xmm/m128/b64" , "op": "RVM-FV: EVEX.128.66.0F.W1 DF /r" , "vl": 1},
{"inst": "vpandnq W:ymm {kz}, ymm, ymm/m256/b64" , "op": "RVM-FV: EVEX.256.66.0F.W1 DF /r" , "vl": 1},
{"inst": "vpandnq W:zmm {kz}, zmm, zmm/m512/b64" , "op": "RVM-FV: EVEX.512.66.0F.W1 DF /r" , "vl": 0},
{"inst": "vpandq W:xmm {kz}, ~xmm, ~xmm/m128/b64" , "op": "RVM-FV: EVEX.128.66.0F.W1 DB /r" , "vl": 1},
{"inst": "vpandq W:ymm {kz}, ~ymm, ~ymm/m256/b64" , "op": "RVM-FV: EVEX.256.66.0F.W1 DB /r" , "vl": 1},
{"inst": "vpandq W:zmm {kz}, ~zmm, ~zmm/m512/b64" , "op": "RVM-FV: EVEX.512.66.0F.W1 DB /r" , "vl": 0},
{"inst": "vpblendmd W:xmm {kz}, xmm, xmm/m128/b32" , "op": "RVM-FV: EVEX.128.66.0F38.W0 64 /r" , "vl": 1, "k": "blend"},
{"inst": "vpblendmd W:ymm {kz}, ymm, ymm/m256/b32" , "op": "RVM-FV: EVEX.256.66.0F38.W0 64 /r" , "vl": 1, "k": "blend"},
{"inst": "vpblendmd W:zmm {kz}, zmm, zmm/m512/b32" , "op": "RVM-FV: EVEX.512.66.0F38.W0 64 /r" , "vl": 0, "k": "blend"},
{"inst": "vpblendmq W:xmm {kz}, xmm, xmm/m128/b64" , "op": "RVM-FV: EVEX.128.66.0F38.W1 64 /r" , "vl": 1, "k": "blend"},
{"inst": "vpblendmq W:ymm {kz}, ymm, ymm/m256/b64" , "op": "RVM-FV: EVEX.256.66.0F38.W1 64 /r" , "vl": 1, "k": "blend"},
{"inst": "vpblendmq W:zmm {kz}, zmm, zmm/m512/b64" , "op": "RVM-FV: EVEX.512.66.0F38.W1 64 /r" , "vl": 0, "k": "blend"},
{"inst": "vpbroadcastd W:xmm {kz}, r32[31:0]" , "op": "RM-T1S: EVEX.128.66.0F38.W0 7C /r" , "vl": 1},
{"inst": "vpbroadcastd W:xmm {kz}, xmm[31:0]/m32" , "op": "RM-T1S: EVEX.128.66.0F38.W0 58 /r" , "vl": 1},
{"inst": "vpbroadcastd W:ymm {kz}, r32[31:0]" , "op": "RM-T1S: EVEX.256.66.0F38.W0 7C /r" , "vl": 1},
{"inst": "vpbroadcastd W:ymm {kz}, xmm[31:0]/m32" , "op": "RM-T1S: EVEX.256.66.0F38.W0 58 /r" , "vl": 1},
{"inst": "vpbroadcastd W:zmm {kz}, r32[31:0]" , "op": "RM-T1S: EVEX.512.66.0F38.W0 7C /r" , "vl": 0},
{"inst": "vpbroadcastd W:zmm {kz}, xmm[31:0]/m32" , "op": "RM-T1S: EVEX.512.66.0F38.W0 58 /r" , "vl": 0},
{"inst": "vpbroadcastq W:xmm {kz}, r64" , "op": "RM-T1S: EVEX.128.66.0F38.W1 7C /r" , "vl": 1},
{"inst": "vpbroadcastq W:xmm {kz}, xmm[63:0]/m64" , "op": "RM-T1S: EVEX.128.66.0F38.W1 59 /r" , "vl": 1},
{"inst": "vpbroadcastq W:ymm {kz}, r64" , "op": "RM-T1S: EVEX.256.66.0F38.W1 7C /r" , "vl": 1},
{"inst": "vpbroadcastq W:ymm {kz}, xmm[63:0]/m64" , "op": "RM-T1S: EVEX.256.66.0F38.W1 59 /r" , "vl": 1},
{"inst": "vpbroadcastq W:zmm {kz}, r64" , "op": "RM-T1S: EVEX.512.66.0F38.W1 7C /r" , "vl": 0},
{"inst": "vpbroadcastq W:zmm {kz}, xmm[63:0]/m64" , "op": "RM-T1S: EVEX.512.66.0F38.W1 59 /r" , "vl": 0},
{"inst": "vpcmpd W:k {k}, xmm, xmm/m128/b32, ib/ub" , "op": "RVM-FV: EVEX.128.66.0F3A.W0 1F /r ib" , "vl": 1, "k": "zeroing"},
{"inst": "vpcmpd W:k {k}, ymm, ymm/m256/b32, ib/ub" , "op": "RVM-FV: EVEX.256.66.0F3A.W0 1F /r ib" , "vl": 1, "k": "zeroing"},
{"inst": "vpcmpd W:k {k}, zmm, zmm/m512/b32, ib/ub" , "op": "RVM-FV: EVEX.512.66.0F3A.W0 1F /r ib" , "vl": 0, "k": "zeroing"},
{"inst": "vpcmpeqd W:k {k}, ~xmm, ~xmm/m128/b32" , "op": "RVM-FVM: EVEX.128.66.0F.W0 76 /r" , "vl": 1, "k": "zeroing"},
{"inst": "vpcmpeqd W:k {k}, ~ymm, ~ymm/m256/b32" , "op": "RVM-FVM: EVEX.256.66.0F.W0 76 /r" , "vl": 1, "k": "zeroing"},
{"inst": "vpcmpeqd W:k {k}, ~zmm, ~zmm/m512/b32" , "op": "RVM-FVM: EVEX.512.66.0F.W0 76 /r" , "vl": 0, "k": "zeroing"},
{"inst": "vpcmpeqq W:k {k}, ~xmm, ~xmm/m128/b64" , "op": "RVM-FVM: EVEX.128.66.0F38.W1 29 /r" , "vl": 1, "k": "zeroing"},
{"inst": "vpcmpeqq W:k {k}, ~ymm, ~ymm/m256/b64" , "op": "RVM-FVM: EVEX.256.66.0F38.W1 29 /r" , "vl": 1, "k": "zeroing"},
{"inst": "vpcmpeqq W:k {k}, ~zmm, ~zmm/m512/b64" , "op": "RVM-FVM: EVEX.512.66.0F38.W1 29 /r" , "vl": 0, "k": "zeroing"},
{"inst": "vpcmpgtd W:k {k}, xmm, xmm/m128/b32" , "op": "RVM-FVM: EVEX.128.66.0F.W0 66 /r" , "vl": 1, "k": "zeroing"},
{"inst": "vpcmpgtd W:k {k}, ymm, ymm/m256/b32" , "op": "RVM-FVM: EVEX.256.66.0F.W0 66 /r" , "vl": 1, "k": "zeroing"},
{"inst": "vpcmpgtd W:k {k}, zmm, zmm/m512/b32" , "op": "RVM-FVM: EVEX.512.66.0F.W0 66 /r" , "vl": 0, "k": "zeroing"},
{"inst": "vpcmpgtq W:k {k}, xmm, xmm/m128/b64" , "op": "RVM-FVM: EVEX.128.66.0F38.W1 37 /r" , "vl": 1, "k": "zeroing"},
{"inst": "vpcmpgtq W:k {k}, ymm, ymm/m256/b64" , "op": "RVM-FVM: EVEX.256.66.0F38.W1 37 /r" , "vl": 1, "k": "zeroing"},
{"inst": "vpcmpgtq W:k {k}, zmm, zmm/m512/b64" , "op": "RVM-FVM: EVEX.512.66.0F38.W1 37 /r" , "vl": 0, "k": "zeroing"},
{"inst": "vpcmpq W:k {k}, xmm, xmm/m128/b64, ib/ub" , "op": "RVM-FV: EVEX.128.66.0F3A.W1 1F /r ib" , "vl": 1, "k": "zeroing"},
{"inst": "vpcmpq W:k {k}, ymm, ymm/m256/b64, ib/ub" , "op": "RVM-FV: EVEX.256.66.0F3A.W1 1F /r ib" , "vl": 1, "k": "zeroing"},
{"inst": "vpcmpq W:k {k}, zmm, zmm/m512/b64, ib/ub" , "op": "RVM-FV: EVEX.512.66.0F3A.W1 1F /r ib" , "vl": 0, "k": "zeroing"},
{"inst": "vpcmpud W:k {k}, xmm, xmm/m128/b32, ib/ub" , "op": "RVM-FV: EVEX.128.66.0F3A.W0 1E /r ib" , "vl": 1, "k": "zeroing"},
{"inst": "vpcmpud W:k {k}, ymm, ymm/m256/b32, ib/ub" , "op": "RVM-FV: EVEX.256.66.0F3A.W0 1E /r ib" , "vl": 1, "k": "zeroing"},
{"inst": "vpcmpud W:k {k}, zmm, zmm/m512/b32, ib/ub" , "op": "RVM-FV: EVEX.512.66.0F3A.W0 1E /r ib" , "vl": 0, "k": "zeroing"},
{"inst": "vpcmpuq W:k {k}, xmm, xmm/m128/b64, ib/ub" , "op": "RVM-FV: EVEX.128.66.0F3A.W1 1E /r ib" , "vl": 1, "k": "zeroing"},
{"inst": "vpcmpuq W:k {k}, ymm, ymm/m256/b64, ib/ub" , "op": "RVM-FV: EVEX.256.66.0F3A.W1 1E /r ib" , "vl": 1, "k": "zeroing"},
{"inst": "vpcmpuq W:k {k}, zmm, zmm/m512/b64, ib/ub" , "op": "RVM-FV: EVEX.512.66.0F3A.W1 1E /r ib" , "vl": 0, "k": "zeroing"},
{"inst": "vpcompressd W:xmm/m128 {kz}, xmm" , "op": "MR-T1S: EVEX.128.66.0F38.W0 8B /r" , "vl": 1},
{"inst": "vpcompressd W:ymm/m256 {kz}, ymm" , "op": "MR-T1S: EVEX.256.66.0F38.W0 8B /r" , "vl": 1},
{"inst": "vpcompressd W:zmm/m512 {kz}, zmm" , "op": "MR-T1S: EVEX.512.66.0F38.W0 8B /r" , "vl": 0},
{"inst": "vpcompressq W:xmm/m128 {kz}, xmm" , "op": "MR-T1S: EVEX.128.66.0F38.W1 8B /r" , "vl": 1},
{"inst": "vpcompressq W:ymm/m256 {kz}, ymm" , "op": "MR-T1S: EVEX.256.66.0F38.W1 8B /r" , "vl": 1},
{"inst": "vpcompressq W:zmm/m512 {kz}, zmm" , "op": "MR-T1S: EVEX.512.66.0F38.W1 8B /r" , "vl": 0},
{"inst": "vpermd W:ymm {kz}, ymm, ymm/m256/b32" , "op": "RVM-FV: EVEX.256.66.0F38.W0 36 /r" , "vl": 1},
{"inst": "vpermd W:zmm {kz}, zmm, zmm/m512/b32" , "op": "RVM-FV: EVEX.512.66.0F38.W0 36 /r" , "vl": 0},
{"inst": "vpermi2d X:xmm {kz}, xmm, xmm/m128/b32" , "op": "RVM-FV: EVEX.128.66.0F38.W0 76 /r" , "vl": 1},
{"inst": "vpermi2d X:ymm {kz}, ymm, ymm/m256/b32" , "op": "RVM-FV: EVEX.256.66.0F38.W0 76 /r" , "vl": 1},
{"inst": "vpermi2d X:zmm {kz}, zmm, zmm/m512/b32" , "op": "RVM-FV: EVEX.512.66.0F38.W0 76 /r" , "vl": 0},
{"inst": "vpermi2pd W:xmm {kz}, xmm, xmm/m128/b64" , "op": "RVM-FV: EVEX.128.66.0F38.W1 77 /r" , "vl": 1},
{"inst": "vpermi2pd W:ymm {kz}, ymm, ymm/m256/b64" , "op": "RVM-FV: EVEX.256.66.0F38.W1 77 /r" , "vl": 1},
{"inst": "vpermi2pd W:zmm {kz}, zmm, zmm/m512/b64" , "op": "RVM-FV: EVEX.512.66.0F38.W1 77 /r" , "vl": 0},
{"inst": "vpermi2ps W:xmm {kz}, xmm, xmm/m128/b32" , "op": "RVM-FV: EVEX.128.66.0F38.W0 77 /r" , "vl": 1},
{"inst": "vpermi2ps W:ymm {kz}, ymm, ymm/m256/b32" , "op": "RVM-FV: EVEX.256.66.0F38.W0 77 /r" , "vl": 1},
{"inst": "vpermi2ps W:zmm {kz}, zmm, zmm/m512/b32" , "op": "RVM-FV: EVEX.512.66.0F38.W0 77 /r" , "vl": 0},
{"inst": "vpermi2q X:xmm {kz}, xmm, xmm/m128/b64" , "op": "RVM-FV: EVEX.128.66.0F38.W1 76 /r" , "vl": 1},
{"inst": "vpermi2q X:ymm {kz}, ymm, ymm/m256/b64" , "op": "RVM-FV: EVEX.256.66.0F38.W1 76 /r" , "vl": 1},
{"inst": "vpermi2q X:zmm {kz}, zmm, zmm/m512/b64" , "op": "RVM-FV: EVEX.512.66.0F38.W1 76 /r" , "vl": 0},
{"inst": "vpermilpd W:xmm {kz}, xmm, xmm/m128/b64" , "op": "RVM-FV: EVEX.128.66.0F38.W1 0D /r" , "vl": 1},
{"inst": "vpermilpd W:ymm {kz}, ymm, ymm/m256/b64" , "op": "RVM-FV: EVEX.256.66.0F38.W1 0D /r" , "vl": 1},
{"inst": "vpermilpd W:zmm {kz}, zmm, zmm/m512/b64" , "op": "RVM-FV: EVEX.512.66.0F38.W1 0D /r" , "vl": 0},
{"inst": "vpermilpd W:xmm {kz}, xmm/m128/b64, ib/ub" , "op": "RM-FV: EVEX.128.66.0F3A.W1 05 /r ib" , "vl": 1},
{"inst": "vpermilpd W:ymm {kz}, ymm/m256/b64, ib/ub" , "op": "RM-FV: EVEX.256.66.0F3A.W1 05 /r ib" , "vl": 1},
{"inst": "vpermilpd W:zmm {kz}, zmm/m512/b64, ib/ub" , "op": "RM-FV: EVEX.512.66.0F3A.W1 05 /r ib" , "vl": 0},
{"inst": "vpermilps W:xmm {kz}, xmm, xmm/m128/b32" , "op": "RVM-FV: EVEX.128.66.0F38.W0 0C /r" , "vl": 1},
{"inst": "vpermilps W:ymm {kz}, ymm, ymm/m256/b32" , "op": "RVM-FV: EVEX.256.66.0F38.W0 0C /r" , "vl": 1},
{"inst": "vpermilps W:zmm {kz}, zmm, zmm/m512/b32" , "op": "RVM-FV: EVEX.512.66.0F38.W0 0C /r" , "vl": 0},
{"inst": "vpermilps W:xmm {kz}, xmm/m128/b32, ib/ub" , "op": "RM-FV: EVEX.128.66.0F3A.W0 04 /r ib" , "vl": 1},
{"inst": "vpermilps W:ymm {kz}, ymm/m256/b32, ib/ub" , "op": "RM-FV: EVEX.256.66.0F3A.W0 04 /r ib" , "vl": 1},
{"inst": "vpermilps W:zmm {kz}, zmm/m512/b32, ib/ub" , "op": "RM-FV: EVEX.512.66.0F3A.W0 04 /r ib" , "vl": 0},
{"inst": "vpermpd W:ymm {kz}, ymm, ymm/m256/b64" , "op": "RVM-FV: EVEX.256.66.0F38.W1 16 /r" , "vl": 1},
{"inst": "vpermpd W:zmm {kz}, zmm, zmm/m512/b64" , "op": "RVM-FV: EVEX.512.66.0F38.W1 16 /r" , "vl": 0},
{"inst": "vpermpd W:ymm {kz}, ymm/m256/b64, ib/ub" , "op": "RM-FV: EVEX.256.66.0F3A.W1 01 /r ib" , "vl": 1},
{"inst": "vpermpd W:zmm {kz}, zmm/m512/b64, ib/ub" , "op": "RM-FV: EVEX.512.66.0F3A.W1 01 /r ib" , "vl": 0},
{"inst": "vpermps W:ymm {kz}, ymm, ymm/m256/b32" , "op": "RVM-FV: EVEX.256.66.0F38.W0 16 /r" , "vl": 1},
{"inst": "vpermps W:zmm {kz}, zmm, zmm/m512/b32" , "op": "RVM-FV: EVEX.512.66.0F38.W0 16 /r" , "vl": 0},
{"inst": "vpermq W:ymm {kz}, ymm, ymm/m256/b64" , "op": "RVM-FV: EVEX.256.66.0F38.W1 36 /r" , "vl": 1},
{"inst": "vpermq W:zmm {kz}, zmm, zmm/m512/b64" , "op": "RVM-FV: EVEX.512.66.0F38.W1 36 /r" , "vl": 0},
{"inst": "vpermq W:ymm {kz}, ymm/m256/b64, ib/ub" , "op": "RM-FV: EVEX.256.66.0F3A.W1 00 /r ib" , "vl": 1},
{"inst": "vpermq W:zmm {kz}, zmm/m512/b64, ib/ub" , "op": "RM-FV: EVEX.512.66.0F3A.W1 00 /r ib" , "vl": 0},
{"inst": "vpermt2d X:xmm {kz}, xmm, xmm/m128/b32" , "op": "RVM-FV: EVEX.128.66.0F38.W0 7E /r" , "vl": 1},
{"inst": "vpermt2d X:ymm {kz}, ymm, ymm/m256/b32" , "op": "RVM-FV: EVEX.256.66.0F38.W0 7E /r" , "vl": 1},
{"inst": "vpermt2d X:zmm {kz}, zmm, zmm/m512/b32" , "op": "RVM-FV: EVEX.512.66.0F38.W0 7E /r" , "vl": 0},
{"inst": "vpermt2pd X:xmm {kz}, xmm, xmm/m128/b64" , "op": "RVM-FV: EVEX.128.66.0F38.W1 7F /r" , "vl": 1},
{"inst": "vpermt2pd X:ymm {kz}, ymm, ymm/m256/b64" , "op": "RVM-FV: EVEX.256.66.0F38.W1 7F /r" , "vl": 1},
{"inst": "vpermt2pd X:zmm {kz}, zmm, zmm/m512/b64" , "op": "RVM-FV: EVEX.512.66.0F38.W1 7F /r" , "vl": 0},
{"inst": "vpermt2ps X:xmm {kz}, xmm, xmm/m128/b32" , "op": "RVM-FV: EVEX.128.66.0F38.W0 7F /r" , "vl": 1},
{"inst": "vpermt2ps X:ymm {kz}, ymm, ymm/m256/b32" , "op": "RVM-FV: EVEX.256.66.0F38.W0 7F /r" , "vl": 1},
{"inst": "vpermt2ps X:zmm {kz}, zmm, zmm/m512/b32" , "op": "RVM-FV: EVEX.512.66.0F38.W0 7F /r" , "vl": 0},
{"inst": "vpermt2q X:xmm {kz}, xmm, xmm/m128/b64" , "op": "RVM-FV: EVEX.128.66.0F38.W1 7E /r" , "vl": 1},
{"inst": "vpermt2q X:ymm {kz}, ymm, ymm/m256/b64" , "op": "RVM-FV: EVEX.256.66.0F38.W1 7E /r" , "vl": 1},
{"inst": "vpermt2q X:zmm {kz}, zmm, zmm/m512/b64" , "op": "RVM-FV: EVEX.512.66.0F38.W1 7E /r" , "vl": 0},
{"inst": "vpexpandd W:xmm {kz}, xmm/m128" , "op": "RM-T1S: EVEX.128.66.0F38.W0 89 /r" , "vl": 1},
{"inst": "vpexpandd W:ymm {kz}, ymm/m256" , "op": "RM-T1S: EVEX.256.66.0F38.W0 89 /r" , "vl": 1},
{"inst": "vpexpandd W:zmm {kz}, zmm/m512" , "op": "RM-T1S: EVEX.512.66.0F38.W0 89 /r" , "vl": 0},
{"inst": "vpexpandq W:xmm {kz}, xmm/m128" , "op": "RM-T1S: EVEX.128.66.0F38.W1 89 /r" , "vl": 1},
{"inst": "vpexpandq W:ymm {kz}, ymm/m256" , "op": "RM-T1S: EVEX.256.66.0F38.W1 89 /r" , "vl": 1},
{"inst": "vpexpandq W:zmm {kz}, zmm/m512" , "op": "RM-T1S: EVEX.512.66.0F38.W1 89 /r" , "vl": 0},
{"inst": "vpgatherdd X:xmm {k}, vm32x" , "op": "RM-T1S: EVEX.128.66.0F38.W0 90" , "vl": 1},
{"inst": "vpgatherdd X:ymm {k}, vm32y" , "op": "RM-T1S: EVEX.256.66.0F38.W0 90" , "vl": 1},
{"inst": "vpgatherdd X:zmm {k}, vm32z" , "op": "RM-T1S: EVEX.512.66.0F38.W0 90" , "vl": 0},
{"inst": "vpgatherdq X:xmm {k}, vm32x" , "op": "RM-T1S: EVEX.128.66.0F38.W1 90" , "vl": 1},
{"inst": "vpgatherdq X:ymm {k}, vm32x" , "op": "RM-T1S: EVEX.256.66.0F38.W1 90" , "vl": 1},
{"inst": "vpgatherdq X:zmm {k}, vm32y" , "op": "RM-T1S: EVEX.512.66.0F38.W1 90" , "vl": 0},
{"inst": "vpgatherqd X:xmm {k}, vm64x" , "op": "RM-T1S: EVEX.128.66.0F38.W0 91" , "vl": 1},
{"inst": "vpgatherqd X:xmm {k}, vm64y" , "op": "RM-T1S: EVEX.256.66.0F38.W0 91" , "vl": 1},
{"inst": "vpgatherqd X:ymm {k}, vm64z" , "op": "RM-T1S: EVEX.512.66.0F38.W0 91" , "vl": 0},
{"inst": "vpgatherqq X:xmm {k}, vm64x" , "op": "RM-T1S: EVEX.128.66.0F38.W1 91" , "vl": 1},
{"inst": "vpgatherqq X:ymm {k}, vm64y" , "op": "RM-T1S: EVEX.256.66.0F38.W1 91" , "vl": 1},
{"inst": "vpgatherqq X:zmm {k}, vm64z" , "op": "RM-T1S: EVEX.512.66.0F38.W1 91" , "vl": 0},
{"inst": "vpmaxsd W:xmm {kz}, ~xmm, ~xmm/m128/b32" , "op": "RVM-FV: EVEX.128.66.0F38.W0 3D /r" , "vl": 1},
{"inst": "vpmaxsd W:ymm {kz}, ~ymm, ~ymm/m256/b32" , "op": "RVM-FV: EVEX.256.66.0F38.W0 3D /r" , "vl": 1},
{"inst": "vpmaxsd W:zmm {kz}, ~zmm, ~zmm/m512/b32" , "op": "RVM-FV: EVEX.512.66.0F38.W0 3D /r" , "vl": 0},
{"inst": "vpmaxsq W:xmm {kz}, ~xmm, ~xmm/m128/b64" , "op": "RVM-FV: EVEX.128.66.0F38.W1 3D /r" , "vl": 1},
{"inst": "vpmaxsq W:ymm {kz}, ~ymm, ~ymm/m256/b64" , "op": "RVM-FV: EVEX.256.66.0F38.W1 3D /r" , "vl": 1},
{"inst": "vpmaxsq W:zmm {kz}, ~zmm, ~zmm/m512/b64" , "op": "RVM-FV: EVEX.512.66.0F38.W1 3D /r" , "vl": 0},
{"inst": "vpmaxud W:xmm {kz}, ~xmm, ~xmm/m128/b32" , "op": "RVM-FV: EVEX.128.66.0F38.W0 3F /r" , "vl": 1},
{"inst": "vpmaxud W:ymm {kz}, ~ymm, ~ymm/m256/b32" , "op": "RVM-FV: EVEX.256.66.0F38.W0 3F /r" , "vl": 1},
{"inst": "vpmaxud W:zmm {kz}, ~zmm, ~zmm/m512/b32" , "op": "RVM-FV: EVEX.512.66.0F38.W0 3F /r" , "vl": 0},
{"inst": "vpmaxuq W:xmm {kz}, ~xmm, ~xmm/m128/b64" , "op": "RVM-FV: EVEX.128.66.0F38.W1 3F /r" , "vl": 1},
{"inst": "vpmaxuq W:ymm {kz}, ~ymm, ~ymm/m256/b64" , "op": "RVM-FV: EVEX.256.66.0F38.W1 3F /r" , "vl": 1},
{"inst": "vpmaxuq W:zmm {kz}, ~zmm, ~zmm/m512/b64" , "op": "RVM-FV: EVEX.512.66.0F38.W1 3F /r" , "vl": 0},
{"inst": "vpminsd W:xmm {kz}, ~xmm, ~xmm/m128/b32" , "op": "RVM-FV: EVEX.128.66.0F38.W0 39 /r" , "vl": 1},
{"inst": "vpminsd W:ymm {kz}, ~ymm, ~ymm/m256/b32" , "op": "RVM-FV: EVEX.256.66.0F38.W0 39 /r" , "vl": 1},
{"inst": "vpminsd W:zmm {kz}, ~zmm, ~zmm/m512/b32" , "op": "RVM-FV: EVEX.512.66.0F38.W0 39 /r" , "vl": 0},
{"inst": "vpminsq W:xmm {kz}, ~xmm, ~xmm/m128/b64" , "op": "RVM-FV: EVEX.128.66.0F38.W1 39 /r" , "vl": 1},
{"inst": "vpminsq W:ymm {kz}, ~ymm, ~ymm/m256/b64" , "op": "RVM-FV: EVEX.256.66.0F38.W1 39 /r" , "vl": 1},
{"inst": "vpminsq W:zmm {kz}, ~zmm, ~zmm/m512/b64" , "op": "RVM-FV: EVEX.512.66.0F38.W1 39 /r" , "vl": 0},
{"inst": "vpminud W:xmm {kz}, ~xmm, ~xmm/m128/b32" , "op": "RVM-FV: EVEX.128.66.0F38.W0 3B /r" , "vl": 1},
{"inst": "vpminud W:ymm {kz}, ~ymm, ~ymm/m256/b32" , "op": "RVM-FV: EVEX.256.66.0F38.W0 3B /r" , "vl": 1},
{"inst": "vpminud W:zmm {kz}, ~zmm, ~zmm/m512/b32" , "op": "RVM-FV: EVEX.512.66.0F38.W0 3B /r" , "vl": 0},
{"inst": "vpminuq W:xmm {kz}, ~xmm, ~xmm/m128/b64" , "op": "RVM-FV: EVEX.128.66.0F38.W1 3B /r" , "vl": 1},
{"inst": "vpminuq W:ymm {kz}, ~ymm, ~ymm/m256/b64" , "op": "RVM-FV: EVEX.256.66.0F38.W1 3B /r" , "vl": 1},
{"inst": "vpminuq W:zmm {kz}, ~zmm, ~zmm/m512/b64" , "op": "RVM-FV: EVEX.512.66.0F38.W1 3B /r" , "vl": 0},
{"inst": "vpmovdb W:xmm[31:0]/m32 {kz}, xmm" , "op": "MR-QVM: EVEX.128.F3.0F38.W0 31 /r" , "vl": 1},
{"inst": "vpmovdb W:xmm[63:0]/m64 {kz}, ymm" , "op": "MR-QVM: EVEX.256.F3.0F38.W0 31 /r" , "vl": 1},
{"inst": "vpmovdb W:xmm/m128 {kz}, zmm" , "op": "MR-QVM: EVEX.512.F3.0F38.W0 31 /r" , "vl": 0},
{"inst": "vpmovdw W:xmm[63:0]/m64 {kz}, xmm" , "op": "MR-HVM: EVEX.128.F3.0F38.W0 33 /r" , "vl": 1},
{"inst": "vpmovdw W:xmm/m128 {kz}, ymm" , "op": "MR-HVM: EVEX.256.F3.0F38.W0 33 /r" , "vl": 1},
{"inst": "vpmovdw W:ymm/m256 {kz}, zmm" , "op": "MR-HVM: EVEX.512.F3.0F38.W0 33 /r" , "vl": 0},
{"inst": "vpmovqb W:xmm[15:0]/m16 {kz}, xmm" , "op": "MR-OVM: EVEX.128.F3.0F38.W0 32 /r" , "vl": 1},
{"inst": "vpmovqb W:xmm[31:0]/m32 {kz}, ymm" , "op": "MR-OVM: EVEX.256.F3.0F38.W0 32 /r" , "vl": 1},
{"inst": "vpmovqb W:xmm[63:0]/m64 {kz}, zmm" , "op": "MR-OVM: EVEX.512.F3.0F38.W0 32 /r" , "vl": 0},
{"inst": "vpmovqd W:xmm[63:0]/m64 {kz}, xmm" , "op": "MR-HVM: EVEX.128.F3.0F38.W0 35 /r" , "vl": 1},
{"inst": "vpmovqd W:xmm/m128 {kz}, ymm" , "op": "MR-HVM: EVEX.256.F3.0F38.W0 35 /r" , "vl": 1},
{"inst": "vpmovqd W:ymm/m256 {kz}, zmm" , "op": "MR-HVM: EVEX.512.F3.0F38.W0 35 /r" , "vl": 0},
{"inst": "vpmovqw W:xmm[31:0]/m32 {kz}, xmm" , "op": "MR-QVM: EVEX.128.F3.0F38.W0 34 /r" , "vl": 1},
{"inst": "vpmovqw W:xmm[63:0]/m64 {kz}, ymm" , "op": "MR-QVM: EVEX.256.F3.0F38.W0 34 /r" , "vl": 1},
{"inst": "vpmovqw W:xmm/m128 {kz}, zmm" , "op": "MR-QVM: EVEX.512.F3.0F38.W0 34 /r" , "vl": 0},
{"inst": "vpmovsdb W:xmm[31:0]/m32 {kz}, xmm" , "op": "MR-QVM: EVEX.128.F3.0F38.W0 21 /r" , "vl": 1},
{"inst": "vpmovsdb W:xmm[63:0]/m64 {kz}, ymm" , "op": "MR-QVM: EVEX.256.F3.0F38.W0 21 /r" , "vl": 1},
{"inst": "vpmovsdb W:xmm/m128 {kz}, zmm" , "op": "MR-QVM: EVEX.512.F3.0F38.W0 21 /r" , "vl": 0},
{"inst": "vpmovsdw W:xmm[63:0]/m64 {kz}, xmm" , "op": "MR-HVM: EVEX.128.F3.0F38.W0 23 /r" , "vl": 1},
{"inst": "vpmovsdw W:xmm/m128 {kz}, ymm" , "op": "MR-HVM: EVEX.256.F3.0F38.W0 23 /r" , "vl": 1},
{"inst": "vpmovsdw W:ymm/m256 {kz}, zmm" , "op": "MR-HVM: EVEX.512.F3.0F38.W0 23 /r" , "vl": 0},
{"inst": "vpmovsqb W:xmm[15:0]/m16 {kz}, xmm" , "op": "MR-OVM: EVEX.128.F3.0F38.W0 22 /r" , "vl": 1},
{"inst": "vpmovsqb W:xmm[31:0]/m32 {kz}, ymm" , "op": "MR-OVM: EVEX.256.F3.0F38.W0 22 /r" , "vl": 1},
{"inst": "vpmovsqb W:xmm[63:0]/m64 {kz}, zmm" , "op": "MR-OVM: EVEX.512.F3.0F38.W0 22 /r" , "vl": 0},
{"inst": "vpmovsqd W:xmm[63:0]/m64 {kz}, xmm" , "op": "MR-HVM: EVEX.128.F3.0F38.W0 25 /r" , "vl": 1},
{"inst": "vpmovsqd W:xmm/m128 {kz}, ymm" , "op": "MR-HVM: EVEX.256.F3.0F38.W0 25 /r" , "vl": 1},
{"inst": "vpmovsqd W:ymm/m256 {kz}, zmm" , "op": "MR-HVM: EVEX.512.F3.0F38.W0 25 /r" , "vl": 0},
{"inst": "vpmovsqw W:xmm[31:0]/m32 {kz}, xmm" , "op": "MR-QVM: EVEX.128.F3.0F38.W0 24 /r" , "vl": 1},
{"inst": "vpmovsqw W:xmm[63:0]/m64 {kz}, ymm" , "op": "MR-QVM: EVEX.256.F3.0F38.W0 24 /r" , "vl": 1},
{"inst": "vpmovsqw W:xmm/m128 {kz}, zmm" , "op": "MR-QVM: EVEX.512.F3.0F38.W0 24 /r" , "vl": 0},
{"inst": "vpmovsxbd W:xmm {kz}, xmm[31:0]/m32" , "op": "RM-QVM: EVEX.128.66.0F38.WIG 21 /r" , "vl": 1},
{"inst": "vpmovsxbd W:ymm {kz}, xmm[63:0]/m64" , "op": "RM-QVM: EVEX.256.66.0F38.WIG 21 /r" , "vl": 1},
{"inst": "vpmovsxbd W:zmm {kz}, xmm/m128" , "op": "RM-QVM: EVEX.512.66.0F38.WIG 21 /r" , "vl": 0},
{"inst": "vpmovsxbq W:xmm {kz}, xmm[15:0]/m16" , "op": "RM-OVM: EVEX.128.66.0F38.WIG 22 /r" , "vl": 1},
{"inst": "vpmovsxbq W:ymm {kz}, xmm[31:0]/m32" , "op": "RM-OVM: EVEX.256.66.0F38.WIG 22 /r" , "vl": 1},
{"inst": "vpmovsxbq W:zmm {kz}, xmm[63:0]/m64" , "op": "RM-OVM: EVEX.512.66.0F38.WIG 22 /r" , "vl": 0},
{"inst": "vpmovsxdq W:xmm {kz}, xmm[63:0]/m64" , "op": "RM-HVM: EVEX.128.66.0F38.W0 25 /r" , "vl": 1},
{"inst": "vpmovsxdq W:ymm {kz}, xmm/m128" , "op": "RM-HVM: EVEX.256.66.0F38.W0 25 /r" , "vl": 1},
{"inst": "vpmovsxdq W:zmm {kz}, ymm/m256" , "op": "RM-HVM: EVEX.512.66.0F38.W0 25 /r" , "vl": 0},
{"inst": "vpmovsxwd W:xmm {kz}, xmm[63:0]/m64" , "op": "RM-HVM: EVEX.128.66.0F38.WIG 23 /r" , "vl": 1},
{"inst": "vpmovsxwd W:ymm {kz}, xmm/m128" , "op": "RM-HVM: EVEX.256.66.0F38.WIG 23 /r" , "vl": 1},
{"inst": "vpmovsxwd W:zmm {kz}, ymm/m256" , "op": "RM-HVM: EVEX.512.66.0F38.WIG 23 /r" , "vl": 0},
{"inst": "vpmovsxwq W:xmm {kz}, xmm[31:0]/m32" , "op": "RM-QVM: EVEX.128.66.0F38.WIG 24 /r" , "vl": 1},
{"inst": "vpmovsxwq W:ymm {kz}, xmm[63:0]/m64" , "op": "RM-QVM: EVEX.256.66.0F38.WIG 24 /r" , "vl": 1},
{"inst": "vpmovsxwq W:zmm {kz}, xmm/m128" , "op": "RM-QVM: EVEX.512.66.0F38.WIG 24 /r" , "vl": 0},
{"inst": "vpmovusdb W:xmm[31:0]/m32 {kz}, xmm" , "op": "MR-QVM: EVEX.128.F3.0F38.W0 11 /r" , "vl": 1},
{"inst": "vpmovusdb W:xmm[63:0]/m64 {kz}, ymm" , "op": "MR-QVM: EVEX.256.F3.0F38.W0 11 /r" , "vl": 1},
{"inst": "vpmovusdb W:xmm/m128 {kz}, zmm" , "op": "MR-QVM: EVEX.512.F3.0F38.W0 11 /r" , "vl": 0},
{"inst": "vpmovusdw W:xmm[63:0]/m64 {kz}, xmm" , "op": "MR-HVM: EVEX.128.F3.0F38.W0 13 /r" , "vl": 1},
{"inst": "vpmovusdw W:xmm/m128 {kz}, ymm" , "op": "MR-HVM: EVEX.256.F3.0F38.W0 13 /r" , "vl": 1},
{"inst": "vpmovusdw W:ymm/m256 {kz}, zmm" , "op": "MR-HVM: EVEX.512.F3.0F38.W0 13 /r" , "vl": 0},
{"inst": "vpmovusqb W:xmm[15:0]/m16 {kz}, xmm" , "op": "MR-OVM: EVEX.128.F3.0F38.W0 12 /r" , "vl": 1},
{"inst": "vpmovusqb W:xmm[31:0]/m32 {kz}, ymm" , "op": "MR-OVM: EVEX.256.F3.0F38.W0 12 /r" , "vl": 1},
{"inst": "vpmovusqb W:xmm[63:0]/m64 {kz}, zmm" , "op": "MR-OVM: EVEX.512.F3.0F38.W0 12 /r" , "vl": 0},
{"inst": "vpmovusqd W:xmm[63:0]/m64 {kz}, xmm" , "op": "MR-HVM: EVEX.128.F3.0F38.W0 15 /r" , "vl": 1},
{"inst": "vpmovusqd W:xmm/m128 {kz}, ymm" , "op": "MR-HVM: EVEX.256.F3.0F38.W0 15 /r" , "vl": 1},
{"inst": "vpmovusqd W:ymm/m256 {kz}, zmm" , "op": "MR-HVM: EVEX.512.F3.0F38.W0 15 /r" , "vl": 0},
{"inst": "vpmovusqw W:xmm[31:0]/m32 {kz}, xmm" , "op": "MR-QVM: EVEX.128.F3.0F38.W0 14 /r" , "vl": 1},
{"inst": "vpmovusqw W:xmm[63:0]/m64 {kz}, ymm" , "op": "MR-QVM: EVEX.256.F3.0F38.W0 14 /r" , "vl": 1},
{"inst": "vpmovusqw W:xmm/m128 {kz}, zmm" , "op": "MR-QVM: EVEX.512.F3.0F38.W0 14 /r" , "vl": 0},
{"inst": "vpmovzxbd W:xmm {kz}, xmm[31:0]/m32" , "op": "RM-QVM: EVEX.128.66.0F38.WIG 31 /r" , "vl": 1},
{"inst": "vpmovzxbd W:ymm {kz}, xmm[63:0]/m64" , "op": "RM-QVM: EVEX.256.66.0F38.WIG 31 /r" , "vl": 1},
{"inst": "vpmovzxbd W:zmm {kz}, xmm/m128" , "op": "RM-QVM: EVEX.512.66.0F38.WIG 31 /r" , "vl": 0},
{"inst": "vpmovzxbq W:xmm {kz}, xmm[15:0]/m16" , "op": "RM-OVM: EVEX.128.66.0F38.WIG 32 /r" , "vl": 1},
{"inst": "vpmovzxbq W:ymm {kz}, xmm[31:0]/m32" , "op": "RM-OVM: EVEX.256.66.0F38.WIG 32 /r" , "vl": 1},
{"inst": "vpmovzxbq W:zmm {kz}, xmm[63:0]/m64" , "op": "RM-OVM: EVEX.512.66.0F38.WIG 32 /r" , "vl": 0},
{"inst": "vpmovzxdq W:xmm {kz}, xmm[63:0]/m64" , "op": "RM-HVM: EVEX.128.66.0F38.W0 35 /r" , "vl": 1},
{"inst": "vpmovzxdq W:ymm {kz}, xmm/m128" , "op": "RM-HVM: EVEX.256.66.0F38.W0 35 /r" , "vl": 1},
{"inst": "vpmovzxdq W:zmm {kz}, ymm/m256" , "op": "RM-HVM: EVEX.512.66.0F38.W0 35 /r" , "vl": 0},
{"inst": "vpmovzxwd W:xmm {kz}, xmm[63:0]/m64" , "op": "RM-HVM: EVEX.128.66.0F38.WIG 33 /r" , "vl": 1},
{"inst": "vpmovzxwd W:ymm {kz}, xmm/m128" , "op": "RM-HVM: EVEX.256.66.0F38.WIG 33 /r" , "vl": 1},
{"inst": "vpmovzxwd W:zmm {kz}, ymm/m256" , "op": "RM-HVM: EVEX.512.66.0F38.WIG 33 /r" , "vl": 0},
{"inst": "vpmovzxwq W:xmm {kz}, xmm[31:0]/m32" , "op": "RM-QVM: EVEX.128.66.0F38.WIG 34 /r" , "vl": 1},
{"inst": "vpmovzxwq W:ymm {kz}, xmm[63:0]/m64" , "op": "RM-QVM: EVEX.256.66.0F38.WIG 34 /r" , "vl": 1},
{"inst": "vpmovzxwq W:zmm {kz}, xmm/m128" , "op": "RM-QVM: EVEX.512.66.0F38.WIG 34 /r" , "vl": 0},
{"inst": "vpmuldq W:xmm {kz}, ~xmm, ~xmm/m128/b64" , "op": "RVM-FV: EVEX.128.66.0F38.W1 28 /r" , "vl": 1},
{"inst": "vpmuldq W:ymm {kz}, ~ymm, ~ymm/m256/b64" , "op": "RVM-FV: EVEX.256.66.0F38.W1 28 /r" , "vl": 1},
{"inst": "vpmuldq W:zmm {kz}, ~zmm, ~zmm/m512/b64" , "op": "RVM-FV: EVEX.512.66.0F38.W1 28 /r" , "vl": 0},
{"inst": "vpmulld W:xmm {kz}, ~xmm, ~xmm/m128/b32" , "op": "RVM-FV: EVEX.128.66.0F38.W0 40 /r" , "vl": 1},
{"inst": "vpmulld W:ymm {kz}, ~ymm, ~ymm/m256/b32" , "op": "RVM-FV: EVEX.256.66.0F38.W0 40 /r" , "vl": 1},
{"inst": "vpmulld W:zmm {kz}, ~zmm, ~zmm/m512/b32" , "op": "RVM-FV: EVEX.512.66.0F38.W0 40 /r" , "vl": 0},
{"inst": "vpmuludq W:xmm {kz}, ~xmm, ~xmm/m128/b64" , "op": "RVM-FV: EVEX.128.66.0F.W1 F4 /r" , "vl": 1},
{"inst": "vpmuludq W:ymm {kz}, ~ymm, ~ymm/m256/b64" , "op": "RVM-FV: EVEX.256.66.0F.W1 F4 /r" , "vl": 1},
{"inst": "vpmuludq W:zmm {kz}, ~zmm, ~zmm/m512/b64" , "op": "RVM-FV: EVEX.512.66.0F.W1 F4 /r" , "vl": 0},
{"inst": "vpord W:xmm {kz}, ~xmm, ~xmm/m128/b32" , "op": "RVM-FV: EVEX.128.66.0F.W0 EB /r" , "vl": 1},
{"inst": "vpord W:ymm {kz}, ~ymm, ~ymm/m256/b32" , "op": "RVM-FV: EVEX.256.66.0F.W0 EB /r" , "vl": 1},
{"inst": "vpord W:zmm {kz}, ~zmm, ~zmm/m512/b32" , "op": "RVM-FV: EVEX.512.66.0F.W0 EB /r" , "vl": 0},
{"inst": "vporq W:xmm {kz}, ~xmm, ~xmm/m128/b64" , "op": "RVM-FV: EVEX.128.66.0F.W1 EB /r" , "vl": 1},
{"inst": "vporq W:ymm {kz}, ~ymm, ~ymm/m256/b64" , "op": "RVM-FV: EVEX.256.66.0F.W1 EB /r" , "vl": 1},
{"inst": "vporq W:zmm {kz}, ~zmm, ~zmm/m512/b64" , "op": "RVM-FV: EVEX.512.66.0F.W1 EB /r" , "vl": 0},
{"inst": "vprold W:xmm {kz}, xmm/m128/b32, ib/ub" , "op": "VM-FV: EVEX.128.66.0F.W0 72 /1 ib" , "vl": 1},
{"inst": "vprold W:ymm {kz}, ymm/m256/b32, ib/ub" , "op": "VM-FV: EVEX.256.66.0F.W0 72 /1 ib" , "vl": 1},
{"inst": "vprold W:zmm {kz}, zmm/m512/b32, ib/ub" , "op": "VM-FV: EVEX.512.66.0F.W0 72 /1 ib" , "vl": 0},
{"inst": "vprolq W:xmm {kz}, xmm/m128/b64, ib/ub" , "op": "VM-FV: EVEX.128.66.0F.W1 72 /1 ib" , "vl": 1},
{"inst": "vprolq W:ymm {kz}, ymm/m256/b64, ib/ub" , "op": "VM-FV: EVEX.256.66.0F.W1 72 /1 ib" , "vl": 1},
{"inst": "vprolq W:zmm {kz}, zmm/m512/b64, ib/ub" , "op": "VM-FV: EVEX.512.66.0F.W1 72 /1 ib" , "vl": 0},
{"inst": "vprolvd W:xmm {kz}, xmm, xmm/m128/b32" , "op": "RVM-FV: EVEX.128.66.0F38.W0 15 /r" , "vl": 1},
{"inst": "vprolvd W:ymm {kz}, ymm, ymm/m256/b32" , "op": "RVM-FV: EVEX.256.66.0F38.W0 15 /r" , "vl": 1},
{"inst": "vprolvd W:zmm {kz}, zmm, zmm/m512/b32" , "op": "RVM-FV: EVEX.512.66.0F38.W0 15 /r" , "vl": 0},
{"inst": "vprolvq W:xmm {kz}, xmm, xmm/m128/b64" , "op": "RVM-FV: EVEX.128.66.0F38.W1 15 /r" , "vl": 1},
{"inst": "vprolvq W:ymm {kz}, ymm, ymm/m256/b64" , "op": "RVM-FV: EVEX.256.66.0F38.W1 15 /r" , "vl": 1},
{"inst": "vprolvq W:zmm {kz}, zmm, zmm/m512/b64" , "op": "RVM-FV: EVEX.512.66.0F38.W1 15 /r" , "vl": 0},
{"inst": "vprord W:xmm {kz}, xmm/m128/b32, ib/ub" , "op": "VM-FV: EVEX.128.66.0F.W0 72 /0 ib" , "vl": 1},
{"inst": "vprord W:ymm {kz}, ymm/m256/b32, ib/ub" , "op": "VM-FV: EVEX.256.66.0F.W0 72 /0 ib" , "vl": 1},
{"inst": "vprord W:zmm {kz}, zmm/m512/b32, ib/ub" , "op": "VM-FV: EVEX.512.66.0F.W0 72 /0 ib" , "vl": 0},
{"inst": "vprorq W:xmm {kz}, xmm/m128/b64, ib/ub" , "op": "VM-FV: EVEX.128.66.0F.W1 72 /0 ib" , "vl": 1},
{"inst": "vprorq W:ymm {kz}, ymm/m256/b64, ib/ub" , "op": "VM-FV: EVEX.256.66.0F.W1 72 /0 ib" , "vl": 1},
{"inst": "vprorq W:zmm {kz}, zmm/m512/b64, ib/ub" , "op": "VM-FV: EVEX.512.66.0F.W1 72 /0 ib" , "vl": 0},
{"inst": "vprorvd W:xmm {kz}, xmm, xmm/m128/b32" , "op": "RVM-FV: EVEX.128.66.0F38.W0 14 /r" , "vl": 1},
{"inst": "vprorvd W:ymm {kz}, ymm, ymm/m256/b32" , "op": "RVM-FV: EVEX.256.66.0F38.W0 14 /r" , "vl": 1},
{"inst": "vprorvd W:zmm {kz}, zmm, zmm/m512/b32" , "op": "RVM-FV: EVEX.512.66.0F38.W0 14 /r" , "vl": 0},
{"inst": "vprorvq W:xmm {kz}, xmm, xmm/m128/b64" , "op": "RVM-FV: EVEX.128.66.0F38.W1 14 /r" , "vl": 1},
{"inst": "vprorvq W:ymm {kz}, ymm, ymm/m256/b64" , "op": "RVM-FV: EVEX.256.66.0F38.W1 14 /r" , "vl": 1},
{"inst": "vprorvq W:zmm {kz}, zmm, zmm/m512/b64" , "op": "RVM-FV: EVEX.512.66.0F38.W1 14 /r" , "vl": 0},
{"inst": "vpscatterdd W:vm32x {k}, xmm" , "op": "MR-T1S: EVEX.128.66.0F38.W0 A0 /r" , "vl": 1},
{"inst": "vpscatterdd W:vm32y {k}, ymm" , "op": "MR-T1S: EVEX.256.66.0F38.W0 A0 /r" , "vl": 1},
{"inst": "vpscatterdd W:vm32z {k}, zmm" , "op": "MR-T1S: EVEX.512.66.0F38.W0 A0 /r" , "vl": 0},
{"inst": "vpscatterdq W:vm32x {k}, xmm" , "op": "MR-T1S: EVEX.128.66.0F38.W1 A0 /r" , "vl": 1},
{"inst": "vpscatterdq W:vm32x {k}, ymm" , "op": "MR-T1S: EVEX.256.66.0F38.W1 A0 /r" , "vl": 1},
{"inst": "vpscatterdq W:vm32y {k}, zmm" , "op": "MR-T1S: EVEX.512.66.0F38.W1 A0 /r" , "vl": 0},
{"inst": "vpscatterqd W:vm64x {k}, xmm" , "op": "MR-T1S: EVEX.128.66.0F38.W0 A1 /r" , "vl": 1},
{"inst": "vpscatterqd W:vm64y {k}, xmm" , "op": "MR-T1S: EVEX.256.66.0F38.W0 A1 /r" , "vl": 1},
{"inst": "vpscatterqd W:vm64z {k}, ymm" , "op": "MR-T1S: EVEX.512.66.0F38.W0 A1 /r" , "vl": 0},
{"inst": "vpscatterqq W:vm64x {k}, xmm" , "op": "MR-T1S: EVEX.128.66.0F38.W1 A1 /r" , "vl": 1},
{"inst": "vpscatterqq W:vm64y {k}, ymm" , "op": "MR-T1S: EVEX.256.66.0F38.W1 A1 /r" , "vl": 1},
{"inst": "vpscatterqq W:vm64z {k}, zmm" , "op": "MR-T1S: EVEX.512.66.0F38.W1 A1 /r" , "vl": 0},
{"inst": "vpshufd W:xmm {kz}, xmm/m128/b32, ib/ub" , "op": "RM-FV: EVEX.128.66.0F.W0 70 /r ib" , "vl": 1},
{"inst": "vpshufd W:ymm {kz}, ymm/m256/b32, ib/ub" , "op": "RM-FV: EVEX.256.66.0F.W0 70 /r ib" , "vl": 1},
{"inst": "vpshufd W:zmm {kz}, zmm/m512/b32, ib/ub" , "op": "RM-FV: EVEX.512.66.0F.W0 70 /r ib" , "vl": 0},
{"inst": "vpslld W:xmm {kz}, xmm, xmm/m128" , "op": "RVM-M128: EVEX.128.66.0F.W0 F2 /r" , "vl": 1},
{"inst": "vpslld W:xmm {kz}, xmm/m128/b32, ib/ub" , "op": "VM-FV: EVEX.128.66.0F.W0 72 /6 ib" , "vl": 1},
{"inst": "vpslld W:ymm {kz}, ymm, xmm/m128" , "op": "RVM-M128: EVEX.256.66.0F.W0 F2 /r" , "vl": 1},
{"inst": "vpslld W:ymm {kz}, ymm/m256/b32, ib/ub" , "op": "VM-FV: EVEX.256.66.0F.W0 72 /6 ib" , "vl": 1},
{"inst": "vpslld W:zmm {kz}, zmm, xmm/m128" , "op": "RVM-M128: EVEX.512.66.0F.W0 F2 /r" , "vl": 0},
{"inst": "vpslld W:zmm {kz}, zmm/m512/b32, ib/ub" , "op": "VM-FV: EVEX.512.66.0F.W0 72 /6 ib" , "vl": 0},
{"inst": "vpsllq W:xmm {kz}, xmm, xmm/m128" , "op": "RVM-M128: EVEX.128.66.0F.W1 F3 /r" , "vl": 1},
{"inst": "vpsllq W:xmm {kz}, xmm/m128/b64, ib/ub" , "op": "VM-FV: EVEX.128.66.0F.W1 73 /6 ib" , "vl": 1},
{"inst": "vpsllq W:ymm {kz}, ymm, xmm/m128" , "op": "RVM-M128: EVEX.256.66.0F.W1 F3 /r" , "vl": 1},
{"inst": "vpsllq W:ymm {kz}, ymm/m256/b64, ib/ub" , "op": "VM-FV: EVEX.256.66.0F.W1 73 /6 ib" , "vl": 1},
{"inst": "vpsllq W:zmm {kz}, zmm, xmm/m128" , "op": "RVM-M128: EVEX.512.66.0F.W1 F3 /r" , "vl": 0},
{"inst": "vpsllq W:zmm {kz}, zmm/m512/b64, ib/ub" , "op": "VM-FV: EVEX.512.66.0F.W1 73 /6 ib" , "vl": 0},
{"inst": "vpsllvd W:xmm {kz}, xmm, xmm/m128/b32" , "op": "RVM-FV: EVEX.128.66.0F38.W0 47 /r" , "vl": 1},
{"inst": "vpsllvd W:ymm {kz}, ymm, ymm/m256/b32" , "op": "RVM-FV: EVEX.256.66.0F38.W0 47 /r" , "vl": 1},
{"inst": "vpsllvd W:zmm {kz}, zmm, zmm/m512/b32" , "op": "RVM-FV: EVEX.512.66.0F38.W0 47 /r" , "vl": 0},
{"inst": "vpsllvq W:xmm {kz}, xmm, xmm/m128/b64" , "op": "RVM-FV: EVEX.128.66.0F38.W1 47 /r" , "vl": 1},
{"inst": "vpsllvq W:ymm {kz}, ymm, ymm/m256/b64" , "op": "RVM-FV: EVEX.256.66.0F38.W1 47 /r" , "vl": 1},
{"inst": "vpsllvq W:zmm {kz}, zmm, zmm/m512/b64" , "op": "RVM-FV: EVEX.512.66.0F38.W1 47 /r" , "vl": 0},
{"inst": "vpsrad W:xmm {kz}, xmm, xmm/m128" , "op": "RVM-M128: EVEX.128.66.0F.W0 E2 /r" , "vl": 1},
{"inst": "vpsrad W:xmm {kz}, xmm/m128/b32, ib/ub" , "op": "VM-FV: EVEX.128.66.0F.W0 72 /4 ib" , "vl": 1},
{"inst": "vpsrad W:ymm {kz}, ymm, xmm/m128" , "op": "RVM-M128: EVEX.256.66.0F.W0 E2 /r" , "vl": 1},
{"inst": "vpsrad W:ymm {kz}, ymm/m256/b32, ib/ub" , "op": "VM-FV: EVEX.256.66.0F.W0 72 /4 ib" , "vl": 1},
{"inst": "vpsrad W:zmm {kz}, zmm, xmm/m128" , "op": "RVM-M128: EVEX.512.66.0F.W0 E2 /r" , "vl": 0},
{"inst": "vpsrad W:zmm {kz}, zmm/m512/b32, ib/ub" , "op": "VM-FV: EVEX.512.66.0F.W0 72 /4 ib" , "vl": 0},
{"inst": "vpsraq W:xmm {kz}, xmm, xmm/m128" , "op": "RVM-M128: EVEX.128.66.0F.W1 E2 /r" , "vl": 1},
{"inst": "vpsraq W:xmm {kz}, xmm/m128/b64, ib/ub" , "op": "VM-FV: EVEX.128.66.0F.W1 72 /4 ib" , "vl": 1},
{"inst": "vpsraq W:ymm {kz}, ymm, xmm/m128" , "op": "RVM-M128: EVEX.256.66.0F.W1 E2 /r" , "vl": 1},
{"inst": "vpsraq W:ymm {kz}, ymm/m256/b64, ib/ub" , "op": "VM-FV: EVEX.256.66.0F.W1 72 /4 ib" , "vl": 1},
{"inst": "vpsraq W:zmm {kz}, zmm, xmm/m128" , "op": "RVM-M128: EVEX.512.66.0F.W1 E2 /r" , "vl": 0},
{"inst": "vpsraq W:zmm {kz}, zmm/m512/b64, ib/ub" , "op": "VM-FV: EVEX.512.66.0F.W1 72 /4 ib" , "vl": 0},
{"inst": "vpsravd W:xmm {kz}, xmm, xmm/m128/b32" , "op": "RVM-FV: EVEX.128.66.0F38.W0 46 /r" , "vl": 1},
{"inst": "vpsravd W:ymm {kz}, ymm, ymm/m256/b32" , "op": "RVM-FV: EVEX.256.66.0F38.W0 46 /r" , "vl": 1},
{"inst": "vpsravd W:zmm {kz}, zmm, zmm/m512/b32" , "op": "RVM-FV: EVEX.512.66.0F38.W0 46 /r" , "vl": 0},
{"inst": "vpsravq W:xmm {kz}, xmm, xmm/m128/b64" , "op": "RVM-FV: EVEX.128.66.0F38.W1 46 /r" , "vl": 1},
{"inst": "vpsravq W:ymm {kz}, ymm, ymm/m256/b64" , "op": "RVM-FV: EVEX.256.66.0F38.W1 46 /r" , "vl": 1},
{"inst": "vpsravq W:zmm {kz}, zmm, zmm/m512/b64" , "op": "RVM-FV: EVEX.512.66.0F38.W1 46 /r" , "vl": 0},
{"inst": "vpsrld W:xmm {kz}, xmm, xmm/m128" , "op": "RVM-M128: EVEX.128.66.0F.W0 D2 /r" , "vl": 1},
{"inst": "vpsrld W:xmm {kz}, xmm/m128/b32, ib/ub" , "op": "VM-FV: EVEX.128.66.0F.W0 72 /2 ib" , "vl": 1},
{"inst": "vpsrld W:ymm {kz}, ymm, xmm/m128" , "op": "RVM-M128: EVEX.256.66.0F.W0 D2 /r" , "vl": 1},
{"inst": "vpsrld W:ymm {kz}, ymm/m256/b32, ib/ub" , "op": "VM-FV: EVEX.256.66.0F.W0 72 /2 ib" , "vl": 1},
{"inst": "vpsrld W:zmm {kz}, zmm, xmm/m128" , "op": "RVM-M128: EVEX.512.66.0F.W0 D2 /r" , "vl": 0},
{"inst": "vpsrld W:zmm {kz}, zmm/m512/b32, ib/ub" , "op": "VM-FV: EVEX.512.66.0F.W0 72 /2 ib" , "vl": 0},
{"inst": "vpsrlq W:xmm {kz}, xmm, xmm/m128" , "op": "RVM-M128: EVEX.128.66.0F.W1 D3 /r" , "vl": 1},
{"inst": "vpsrlq W:xmm {kz}, xmm/m128/b64, ib/ub" , "op": "VM-FV: EVEX.128.66.0F.W1 73 /2 ib" , "vl": 1},
{"inst": "vpsrlq W:ymm {kz}, ymm, xmm/m128" , "op": "RVM-M128: EVEX.256.66.0F.W1 D3 /r" , "vl": 1},
{"inst": "vpsrlq W:ymm {kz}, ymm/m256/b64, ib/ub" , "op": "VM-FV: EVEX.256.66.0F.W1 73 /2 ib" , "vl": 1},
{"inst": "vpsrlq W:zmm {kz}, zmm, xmm/m128" , "op": "RVM-M128: EVEX.512.66.0F.W1 D3 /r" , "vl": 0},
{"inst": "vpsrlq W:zmm {kz}, zmm/m512/b64, ib/ub" , "op": "VM-FV: EVEX.512.66.0F.W1 73 /2 ib" , "vl": 0},
{"inst": "vpsrlvd W:xmm {kz}, xmm, xmm/m128/b32" , "op": "RVM-FV: EVEX.128.66.0F38.W0 45 /r" , "vl": 1},
{"inst": "vpsrlvd W:ymm {kz}, ymm, ymm/m256/b32" , "op": "RVM-FV: EVEX.256.66.0F38.W0 45 /r" , "vl": 1},
{"inst": "vpsrlvd W:zmm {kz}, zmm, zmm/m512/b32" , "op": "RVM-FV: EVEX.512.66.0F38.W0 45 /r" , "vl": 0},
{"inst": "vpsrlvq W:xmm {kz}, xmm, xmm/m128/b64" , "op": "RVM-FV: EVEX.128.66.0F38.W1 45 /r" , "vl": 1},
{"inst": "vpsrlvq W:ymm {kz}, ymm, ymm/m256/b64" , "op": "RVM-FV: EVEX.256.66.0F38.W1 45 /r" , "vl": 1},
{"inst": "vpsrlvq W:zmm {kz}, zmm, zmm/m512/b64" , "op": "RVM-FV: EVEX.512.66.0F38.W1 45 /r" , "vl": 0},
{"inst": "vpsubd W:xmm {kz}, xmm, xmm/m128/b32" , "op": "RVM-FV: EVEX.128.66.0F.W0 FA /r" , "vl": 1},
{"inst": "vpsubd W:ymm {kz}, ymm, ymm/m256/b32" , "op": "RVM-FV: EVEX.256.66.0F.W0 FA /r" , "vl": 1},
{"inst": "vpsubd W:zmm {kz}, zmm, zmm/m512/b32" , "op": "RVM-FV: EVEX.512.66.0F.W0 FA /r" , "vl": 0},
{"inst": "vpsubq W:xmm {kz}, xmm, xmm/m128/b64" , "op": "RVM-FV: EVEX.128.66.0F.W1 FB /r" , "vl": 1},
{"inst": "vpsubq W:ymm {kz}, ymm, ymm/m256/b64" , "op": "RVM-FV: EVEX.256.66.0F.W1 FB /r" , "vl": 1},
{"inst": "vpsubq W:zmm {kz}, zmm, zmm/m512/b64" , "op": "RVM-FV: EVEX.512.66.0F.W1 FB /r" , "vl": 0},
{"inst": "vpternlogd X:xmm {kz}, xmm, xmm/m128/b32, ib/ub" , "op": "RVM-FV: EVEX.128.66.0F3A.W0 25 /r ib" , "vl": 1},
{"inst": "vpternlogd X:ymm {kz}, ymm, ymm/m256/b32, ib/ub" , "op": "RVM-FV: EVEX.256.66.0F3A.W0 25 /r ib" , "vl": 1},
{"inst": "vpternlogd X:zmm {kz}, zmm, zmm/m512/b32, ib/ub" , "op": "RVM-FV: EVEX.512.66.0F3A.W0 25 /r ib" , "vl": 0},
{"inst": "vpternlogq X:xmm {kz}, xmm, xmm/m128/b64, ib/ub" , "op": "RVM-FV: EVEX.128.66.0F3A.W1 25 /r ib" , "vl": 1},
{"inst": "vpternlogq X:ymm {kz}, ymm, ymm/m256/b64, ib/ub" , "op": "RVM-FV: EVEX.256.66.0F3A.W1 25 /r ib" , "vl": 1},
{"inst": "vpternlogq X:zmm {kz}, zmm, zmm/m512/b64, ib/ub" , "op": "RVM-FV: EVEX.512.66.0F3A.W1 25 /r ib" , "vl": 0},
{"inst": "vptestmd W:k {k}, xmm, xmm/m128/b32" , "op": "RVM-FV: EVEX.128.66.0F38.W0 27 /r" , "vl": 1, "k": "zeroing"},
{"inst": "vptestmd W:k {k}, ymm, ymm/m256/b32" , "op": "RVM-FV: EVEX.256.66.0F38.W0 27 /r" , "vl": 1, "k": "zeroing"},
{"inst": "vptestmd W:k {k}, zmm, zmm/m512/b32" , "op": "RVM-FV: EVEX.512.66.0F38.W0 27 /r" , "vl": 0, "k": "zeroing"},
{"inst": "vptestmq W:k {k}, xmm, xmm/m128/b64" , "op": "RVM-FV: EVEX.128.66.0F38.W1 27 /r" , "vl": 1, "k": "zeroing"},
{"inst": "vptestmq W:k {k}, ymm, ymm/m256/b64" , "op": "RVM-FV: EVEX.256.66.0F38.W1 27 /r" , "vl": 1, "k": "zeroing"},
{"inst": "vptestmq W:k {k}, zmm, zmm/m512/b64" , "op": "RVM-FV: EVEX.512.66.0F38.W1 27 /r" , "vl": 0, "k": "zeroing"},
{"inst": "vptestnmd W:k {k}, xmm, xmm/m128/b32" , "op": "RVM-FV: EVEX.128.F3.0F38.W0 27 /r" , "vl": 1, "k": "zeroing"},
{"inst": "vptestnmd W:k {k}, ymm, ymm/m256/b32" , "op": "RVM-FV: EVEX.256.F3.0F38.W0 27 /r" , "vl": 1, "k": "zeroing"},
{"inst": "vptestnmd W:k {k}, zmm, zmm/m512/b32" , "op": "RVM-FV: EVEX.512.F3.0F38.W0 27 /r" , "vl": 0, "k": "zeroing"},
{"inst": "vptestnmq W:k {k}, xmm, xmm/m128/b64" , "op": "RVM-FV: EVEX.128.F3.0F38.W1 27 /r" , "vl": 1, "k": "zeroing"},
{"inst": "vptestnmq W:k {k}, ymm, ymm/m256/b64" , "op": "RVM-FV: EVEX.256.F3.0F38.W1 27 /r" , "vl": 1, "k": "zeroing"},
{"inst": "vptestnmq W:k {k}, zmm, zmm/m512/b64" , "op": "RVM-FV: EVEX.512.F3.0F38.W1 27 /r" , "vl": 0, "k": "zeroing"},
{"inst": "vpunpckhdq W:xmm {kz}, xmm, xmm/m128/b32" , "op": "RVM-FV: EVEX.128.66.0F.W0 6A /r" , "vl": 1},
{"inst": "vpunpckhdq W:ymm {kz}, ymm, ymm/m256/b32" , "op": "RVM-FV: EVEX.256.66.0F.W0 6A /r" , "vl": 1},
{"inst": "vpunpckhdq W:zmm {kz}, zmm, zmm/m512/b32" , "op": "RVM-FV: EVEX.512.66.0F.W0 6A /r" , "vl": 0},
{"inst": "vpunpckhqdq W:xmm {kz}, xmm, xmm/m128/b64" , "op": "RVM-FV: EVEX.128.66.0F.W1 6D /r" , "vl": 1},
{"inst": "vpunpckhqdq W:ymm {kz}, ymm, ymm/m256/b64" , "op": "RVM-FV: EVEX.256.66.0F.W1 6D /r" , "vl": 1},
{"inst": "vpunpckhqdq W:zmm {kz}, zmm, zmm/m512/b64" , "op": "RVM-FV: EVEX.512.66.0F.W1 6D /r" , "vl": 0},
{"inst": "vpunpckldq W:xmm {kz}, xmm, xmm/m128/b32" , "op": "RVM-FV: EVEX.128.66.0F.W0 62 /r" , "vl": 1},
{"inst": "vpunpckldq W:ymm {kz}, ymm, ymm/m256/b32" , "op": "RVM-FV: EVEX.256.66.0F.W0 62 /r" , "vl": 1},
{"inst": "vpunpckldq W:zmm {kz}, zmm, zmm/m512/b32" , "op": "RVM-FV: EVEX.512.66.0F.W0 62 /r" , "vl": 0},
{"inst": "vpunpcklqdq W:xmm {kz}, xmm, xmm/m128/b64" , "op": "RVM-FV: EVEX.128.66.0F.W1 6C /r" , "vl": 1},
{"inst": "vpunpcklqdq W:ymm {kz}, ymm, ymm/m256/b64" , "op": "RVM-FV: EVEX.256.66.0F.W1 6C /r" , "vl": 1},
{"inst": "vpunpcklqdq W:zmm {kz}, zmm, zmm/m512/b64" , "op": "RVM-FV: EVEX.512.66.0F.W1 6C /r" , "vl": 0},
{"inst": "vpxord W:xmm {kz}, ~xmm, ~xmm/m128/b32" , "op": "RVM-FV: EVEX.128.66.0F.W0 EF /r" , "vl": 1},
{"inst": "vpxord W:ymm {kz}, ~ymm, ~ymm/m256/b32" , "op": "RVM-FV: EVEX.256.66.0F.W0 EF /r" , "vl": 1},
{"inst": "vpxord W:zmm {kz}, ~zmm, ~zmm/m512/b32" , "op": "RVM-FV: EVEX.512.66.0F.W0 EF /r" , "vl": 0},
{"inst": "vpxorq W:xmm {kz}, ~xmm, ~xmm/m128/b64" , "op": "RVM-FV: EVEX.128.66.0F.W1 EF /r" , "vl": 1},
{"inst": "vpxorq W:ymm {kz}, ~ymm, ~ymm/m256/b64" , "op": "RVM-FV: EVEX.256.66.0F.W1 EF /r" , "vl": 1},
{"inst": "vpxorq W:zmm {kz}, ~zmm, ~zmm/m512/b64" , "op": "RVM-FV: EVEX.512.66.0F.W1 EF /r" , "vl": 0},
{"inst": "vrcp14pd W:xmm {kz}, xmm/m128/b64" , "op": "RM-FV: EVEX.128.66.0F38.W1 4C /r" , "vl": 1},
{"inst": "vrcp14pd W:ymm {kz}, ymm/m256/b64" , "op": "RM-FV: EVEX.256.66.0F38.W1 4C /r" , "vl": 1},
{"inst": "vrcp14pd W:zmm {kz}, zmm/m512/b64" , "op": "RM-FV: EVEX.512.66.0F38.W1 4C /r" , "vl": 0},
{"inst": "vrcp14ps W:xmm {kz}, xmm/m128/b32" , "op": "RM-FV: EVEX.128.66.0F38.W0 4C /r" , "vl": 1},
{"inst": "vrcp14ps W:ymm {kz}, ymm/m256/b32" , "op": "RM-FV: EVEX.256.66.0F38.W0 4C /r" , "vl": 1},
{"inst": "vrcp14ps W:zmm {kz}, zmm/m512/b32" , "op": "RM-FV: EVEX.512.66.0F38.W0 4C /r" , "vl": 0},
{"inst": "vrndscalepd W:xmm {kz}, xmm/m128/b64, ib/ub" , "op": "RM-FV: EVEX.128.66.0F3A.W1 09 /r ib" , "vl": 1},
{"inst": "vrndscalepd W:ymm {kz}, ymm/m256/b64, ib/ub" , "op": "RM-FV: EVEX.256.66.0F3A.W1 09 /r ib" , "vl": 1},
{"inst": "vrndscalepd W:zmm {kz}, zmm/m512/b64, ib/ub {sae}" , "op": "RM-FV: EVEX.512.66.0F3A.W1 09 /r ib" , "vl": 0},
{"inst": "vrndscaleps W:xmm {kz}, xmm/m128/b32, ib/ub" , "op": "RM-FV: EVEX.128.66.0F3A.W0 08 /r ib" , "vl": 1},
{"inst": "vrndscaleps W:ymm {kz}, ymm/m256/b32, ib/ub" , "op": "RM-FV: EVEX.256.66.0F3A.W0 08 /r ib" , "vl": 1},
{"inst": "vrndscaleps W:zmm {kz}, zmm/m512/b32, ib/ub {sae}" , "op": "RM-FV: EVEX.512.66.0F3A.W0 08 /r ib" , "vl": 0},
{"inst": "vrsqrt14pd W:xmm {kz}, xmm/m128/b64" , "op": "RM-FV: EVEX.128.66.0F38.W1 4E /r" , "vl": 1},
{"inst": "vrsqrt14pd W:ymm {kz}, ymm/m256/b64" , "op": "RM-FV: EVEX.256.66.0F38.W1 4E /r" , "vl": 1},
{"inst": "vrsqrt14pd W:zmm {kz}, zmm/m512/b64" , "op": "RM-FV: EVEX.512.66.0F38.W1 4E /r" , "vl": 0},
{"inst": "vrsqrt14ps W:xmm {kz}, xmm/m128/b32" , "op": "RM-FV: EVEX.128.66.0F38.W0 4E /r" , "vl": 1},
{"inst": "vrsqrt14ps W:ymm {kz}, ymm/m256/b32" , "op": "RM-FV: EVEX.256.66.0F38.W0 4E /r" , "vl": 1},
{"inst": "vrsqrt14ps W:zmm {kz}, zmm/m512/b32" , "op": "RM-FV: EVEX.512.66.0F38.W0 4E /r" , "vl": 0},
{"inst": "vscalefpd W:xmm {kz}, xmm, xmm/m128/b64" , "op": "RVM-FV: EVEX.128.66.0F38.W1 2C /r" , "vl": 1},
{"inst": "vscalefpd W:ymm {kz}, ymm, ymm/m256/b64" , "op": "RVM-FV: EVEX.256.66.0F38.W1 2C /r" , "vl": 1},
{"inst": "vscalefpd W:zmm {kz}, zmm, zmm/m512/b64 {er}" , "op": "RVM-FV: EVEX.512.66.0F38.W1 2C /r" , "vl": 0},
{"inst": "vscalefps W:xmm {kz}, xmm, xmm/m128/b32" , "op": "RVM-FV: EVEX.128.66.0F38.W0 2C /r" , "vl": 1},
{"inst": "vscalefps W:ymm {kz}, ymm, ymm/m256/b32" , "op": "RVM-FV: EVEX.256.66.0F38.W0 2C /r" , "vl": 1},
{"inst": "vscalefps W:zmm {kz}, zmm, zmm/m512/b32 {er}" , "op": "RVM-FV: EVEX.512.66.0F38.W0 2C /r" , "vl": 0},
{"inst": "vscatterdpd W:vm32x {k}, xmm" , "op": "MR-T1S: EVEX.128.66.0F38.W1 A2 /r" , "vl": 1},
{"inst": "vscatterdpd W:vm32x {k}, ymm" , "op": "MR-T1S: EVEX.256.66.0F38.W1 A2 /r" , "vl": 1},
{"inst": "vscatterdpd W:vm32y {k}, zmm" , "op": "MR-T1S: EVEX.512.66.0F38.W1 A2 /r" , "vl": 0},
{"inst": "vscatterdps W:vm32x {k}, xmm" , "op": "MR-T1S: EVEX.128.66.0F38.W0 A2 /r" , "vl": 1},
{"inst": "vscatterdps W:vm32y {k}, ymm" , "op": "MR-T1S: EVEX.256.66.0F38.W0 A2 /r" , "vl": 1},
{"inst": "vscatterdps W:vm32z {k}, zmm" , "op": "MR-T1S: EVEX.512.66.0F38.W0 A2 /r" , "vl": 0},
{"inst": "vscatterqpd W:vm64x {k}, xmm" , "op": "MR-T1S: EVEX.128.66.0F38.W1 A3" , "vl": 1},
{"inst": "vscatterqpd W:vm64y {k}, ymm" , "op": "MR-T1S: EVEX.256.66.0F38.W1 A3" , "vl": 1},
{"inst": "vscatterqpd W:vm64z {k}, zmm" , "op": "MR-T1S: EVEX.512.66.0F38.W1 A3" , "vl": 0},
{"inst": "vscatterqps W:vm64x {k}, xmm" , "op": "MR-T1S: EVEX.128.66.0F38.W0 A3" , "vl": 1},
{"inst": "vscatterqps W:vm64y {k}, xmm" , "op": "MR-T1S: EVEX.256.66.0F38.W0 A3" , "vl": 1},
{"inst": "vscatterqps W:vm64z {k}, ymm" , "op": "MR-T1S: EVEX.512.66.0F38.W0 A3" , "vl": 0},
{"inst": "vshuff32x4 W:ymm {kz}, ymm, ymm/m256/b32, ib/ub" , "op": "RVM-FV: EVEX.256.66.0F3A.W0 23 /r ib" , "vl": 1},
{"inst": "vshuff32x4 W:zmm {kz}, zmm, zmm/m512/b32, ib/ub" , "op": "RVM-FV: EVEX.512.66.0F3A.W0 23 /r ib" , "vl": 0},
{"inst": "vshuff64x2 W:ymm {kz}, ymm, ymm/m256/b64, ib/ub" , "op": "RVM-FV: EVEX.256.66.0F3A.W1 23 /r ib" , "vl": 1},
{"inst": "vshuff64x2 W:zmm {kz}, zmm, zmm/m512/b64, ib/ub" , "op": "RVM-FV: EVEX.512.66.0F3A.W1 23 /r ib" , "vl": 0},
{"inst": "vshufi32x4 W:ymm {kz}, ymm, ymm/m256/b32, ib/ub" , "op": "RVM-FV: EVEX.256.66.0F3A.W0 43 /r ib" , "vl": 1},
{"inst": "vshufi32x4 W:zmm {kz}, zmm, zmm/m512/b32, ib/ub" , "op": "RVM-FV: EVEX.512.66.0F3A.W0 43 /r ib" , "vl": 0},
{"inst": "vshufi64x2 W:ymm {kz}, ymm, ymm/m256/b64, ib/ub" , "op": "RVM-FV: EVEX.256.66.0F3A.W1 43 /r ib" , "vl": 1},
{"inst": "vshufi64x2 W:zmm {kz}, zmm, zmm/m512/b64, ib/ub" , "op": "RVM-FV: EVEX.512.66.0F3A.W1 43 /r ib" , "vl": 0},
{"inst": "vshufpd W:xmm {kz}, xmm, xmm/m128/b64, ib/ub" , "op": "RVM-FV: EVEX.128.66.0F.W1 C6 /r ib" , "vl": 1},
{"inst": "vshufpd W:ymm {kz}, ymm, ymm/m256/b64, ib/ub" , "op": "RVM-FV: EVEX.256.66.0F.W1 C6 /r ib" , "vl": 1},
{"inst": "vshufpd W:zmm {kz}, zmm, zmm/m512/b64, ib/ub" , "op": "RVM-FV: EVEX.512.66.0F.W1 C6 /r ib" , "vl": 0},
{"inst": "vshufps W:xmm {kz}, xmm, xmm/m128/b32, ib/ub" , "op": "RVM-FV: EVEX.128.0F.W0 C6 /r ib" , "vl": 1},
{"inst": "vshufps W:ymm {kz}, ymm, ymm/m256/b32, ib/ub" , "op": "RVM-FV: EVEX.256.0F.W0 C6 /r ib" , "vl": 1},
{"inst": "vshufps W:zmm {kz}, zmm, zmm/m512/b32, ib/ub" , "op": "RVM-FV: EVEX.512.0F.W0 C6 /r ib" , "vl": 0},
{"inst": "vsqrtpd W:xmm {kz}, xmm/m128/b64" , "op": "RM-FV: EVEX.128.66.0F.W1 51 /r" , "vl": 1},
{"inst": "vsqrtpd W:ymm {kz}, ymm/m256/b64" , "op": "RM-FV: EVEX.256.66.0F.W1 51 /r" , "vl": 1},
{"inst": "vsqrtpd W:zmm {kz}, zmm/m512/b64 {er}" , "op": "RM-FV: EVEX.512.66.0F.W1 51 /r" , "vl": 0},
{"inst": "vsqrtps W:xmm {kz}, xmm/m128/b32" , "op": "RM-FV: EVEX.128.0F.W0 51 /r" , "vl": 1},
{"inst": "vsqrtps W:ymm {kz}, ymm/m256/b32" , "op": "RM-FV: EVEX.256.0F.W0 51 /r" , "vl": 1},
{"inst": "vsqrtps W:zmm {kz}, zmm/m512/b32 {er}" , "op": "RM-FV: EVEX.512.0F.W0 51 /r" , "vl": 0},
{"inst": "vsubpd W:xmm {kz}, xmm, xmm/m128/b64" , "op": "RVM-FV: EVEX.128.66.0F.W1 5C /r" , "vl": 1},
{"inst": "vsubpd W:ymm {kz}, ymm, ymm/m256/b64" , "op": "RVM-FV: EVEX.256.66.0F.W1 5C /r" , "vl": 1},
{"inst": "vsubpd W:zmm {kz}, zmm, zmm/m512/b64 {er}" , "op": "RVM-FV: EVEX.512.66.0F.W1 5C /r" , "vl": 0},
{"inst": "vsubps W:xmm {kz}, xmm, xmm/m128/b32" , "op": "RVM-FV: EVEX.128.0F.W0 5C /r" , "vl": 1},
{"inst": "vsubps W:ymm {kz}, ymm, ymm/m256/b32" , "op": "RVM-FV: EVEX.256.0F.W0 5C /r" , "vl": 1},
{"inst": "vsubps W:zmm {kz}, zmm, zmm/m512/b32 {er}" , "op": "RVM-FV: EVEX.512.0F.W0 5C /r" , "vl": 0},
{"inst": "vunpckhpd W:xmm {kz}, xmm, xmm/m128/b64" , "op": "RVM-FV: EVEX.128.66.0F.W1 15 /r" , "vl": 1},
{"inst": "vunpckhpd W:ymm {kz}, ymm, ymm/m256/b64" , "op": "RVM-FV: EVEX.256.66.0F.W1 15 /r" , "vl": 1},
{"inst": "vunpckhpd W:zmm {kz}, zmm, zmm/m512/b64" , "op": "RVM-FV: EVEX.512.66.0F.W1 15 /r" , "vl": 0},
{"inst": "vunpckhps W:xmm {kz}, xmm, xmm/m128/b32" , "op": "RVM-FV: EVEX.128.0F.W0 15 /r" , "vl": 1},
{"inst": "vunpckhps W:ymm {kz}, ymm, ymm/m256/b32" , "op": "RVM-FV: EVEX.256.0F.W0 15 /r" , "vl": 1},
{"inst": "vunpckhps W:zmm {kz}, zmm, zmm/m512/b32" , "op": "RVM-FV: EVEX.512.0F.W0 15 /r" , "vl": 0},
{"inst": "vunpcklpd W:xmm {kz}, xmm, xmm/m128/b64" , "op": "RVM-FV: EVEX.128.66.0F.W1 14 /r" , "vl": 1},
{"inst": "vunpcklpd W:ymm {kz}, ymm, ymm/m256/b64" , "op": "RVM-FV: EVEX.256.66.0F.W1 14 /r" , "vl": 1},
{"inst": "vunpcklpd W:zmm {kz}, zmm, zmm/m512/b64" , "op": "RVM-FV: EVEX.512.66.0F.W1 14 /r" , "vl": 0},
{"inst": "vunpcklps W:xmm {kz}, xmm, xmm/m128/b32" , "op": "RVM-FV: EVEX.128.0F.W0 14 /r" , "vl": 1},
{"inst": "vunpcklps W:ymm {kz}, ymm, ymm/m256/b32" , "op": "RVM-FV: EVEX.256.0F.W0 14 /r" , "vl": 1},
{"inst": "vunpcklps W:zmm {kz}, zmm, zmm/m512/b32" , "op": "RVM-FV: EVEX.512.0F.W0 14 /r" , "vl": 0}
]},
{"category": "AVX512 SIMD CRYPTO_HASH", "ext": "AVX512_F VAES", "data": [
{"inst": "vaesdec W:xmm, xmm, xmm/m128" , "op": "RVM-FVM: EVEX.128.66.0F38.WIG DE /r" , "vl": 1},
{"inst": "vaesdec W:ymm, ymm, ymm/m256" , "op": "RVM-FVM: EVEX.256.66.0F38.WIG DE /r" , "vl": 1},
{"inst": "vaesdec W:zmm, zmm, zmm/m512" , "op": "RVM-FVM: EVEX.512.66.0F38.WIG DE /r" , "vl": 0},
{"inst": "vaesdeclast W:xmm, xmm, xmm/m128" , "op": "RVM-FVM: EVEX.128.66.0F38.WIG DF /r" , "vl": 1},
{"inst": "vaesdeclast W:ymm, ymm, ymm/m256" , "op": "RVM-FVM: EVEX.256.66.0F38.WIG DF /r" , "vl": 1},
{"inst": "vaesdeclast W:zmm, zmm, zmm/m512" , "op": "RVM-FVM: EVEX.512.66.0F38.WIG DF /r" , "vl": 0},
{"inst": "vaesenc W:xmm, xmm, xmm/m128" , "op": "RVM-FVM: EVEX.128.66.0F38.WIG DC /r" , "vl": 1},
{"inst": "vaesenc W:ymm, ymm, ymm/m256" , "op": "RVM-FVM: EVEX.256.66.0F38.WIG DC /r" , "vl": 1},
{"inst": "vaesenc W:zmm, zmm, zmm/m512" , "op": "RVM-FVM: EVEX.512.66.0F38.WIG DC /r" , "vl": 0},
{"inst": "vaesenclast W:xmm, xmm, xmm/m128" , "op": "RVM-FVM: EVEX.128.66.0F38.WIG DD /r" , "vl": 1},
{"inst": "vaesenclast W:ymm, ymm, ymm/m256" , "op": "RVM-FVM: EVEX.256.66.0F38.WIG DD /r" , "vl": 1},
{"inst": "vaesenclast W:zmm, zmm, zmm/m512" , "op": "RVM-FVM: EVEX.512.66.0F38.WIG DD /r" , "vl": 0}
]},
{"category": "AVX512 SIMD", "ext": "AVX512_F GFNI", "data": [
{"inst": "vgf2p8affineinvqb W:xmm {kz}, xmm, xmm/m128, ib/ub" , "op": "RVM-FVM: EVEX.128.66.0F3A.W1 CF /r ib" , "vl": 1},
{"inst": "vgf2p8affineinvqb W:ymm {kz}, ymm, ymm/m256, ib/ub" , "op": "RVM-FVM: EVEX.256.66.0F3A.W1 CF /r ib" , "vl": 1},
{"inst": "vgf2p8affineinvqb W:zmm {kz}, zmm, zmm/m512, ib/ub" , "op": "RVM-FVM: EVEX.512.66.0F3A.W1 CF /r ib" , "vl": 0},
{"inst": "vgf2p8affineqb W:xmm {kz}, xmm, xmm/m128, ib/ub" , "op": "RVM-FVM: EVEX.128.66.0F3A.W1 CE /r ib" , "vl": 1},
{"inst": "vgf2p8affineqb W:ymm {kz}, ymm, ymm/m256, ib/ub" , "op": "RVM-FVM: EVEX.256.66.0F3A.W1 CE /r ib" , "vl": 1},
{"inst": "vgf2p8affineqb W:zmm {kz}, zmm, zmm/m512, ib/ub" , "op": "RVM-FVM: EVEX.512.66.0F3A.W1 CE /r ib" , "vl": 0},
{"inst": "vgf2p8mulb W:xmm {kz}, xmm, xmm/m128" , "op": "RVM-FVM: EVEX.128.66.0F38.W0 CF /r" , "vl": 1},
{"inst": "vgf2p8mulb W:ymm {kz}, ymm, ymm/m256" , "op": "RVM-FVM: EVEX.256.66.0F38.W0 CF /r" , "vl": 1},
{"inst": "vgf2p8mulb W:zmm {kz}, zmm, zmm/m512" , "op": "RVM-FVM: EVEX.512.66.0F38.W0 CF /r" , "vl": 0}
]},
{"category": "AVX512 SIMD", "ext": "AVX512_F VPCLMULQDQ", "data": [
{"inst": "vpclmulqdq W:xmm, xmm, xmm/m128, ib/ub" , "op": "RVM-FVM: EVEX.128.66.0F3A.WIG 44 /r ib" , "vl": 1},
{"inst": "vpclmulqdq W:ymm, ymm, ymm/m256, ib/ub" , "op": "RVM-FVM: EVEX.256.66.0F3A.WIG 44 /r ib" , "vl": 1},
{"inst": "vpclmulqdq W:zmm, zmm, zmm/m512, ib/ub" , "op": "RVM-FVM: EVEX.512.66.0F3A.WIG 44 /r ib" , "vl": 0}
]},
{"category": "AVX512 SCALAR", "ext": "AVX512_DQ", "data": [
{"inst": "vfpclasssd W:k {k}, xmm[63:0]/m64, ib/ub" , "op": "RM-T1S: EVEX.LIG.66.0F3A.W1 67 /r ib" , "vl": 0, "k": "zeroing"},
{"inst": "vfpclassss W:k {k}, xmm[31:0]/m32, ib/ub" , "op": "RM-T1S: EVEX.LIG.66.0F3A.W0 67 /r ib" , "vl": 0, "k": "zeroing"},
{"inst": "vrangesd W:xmm {kz}, xmm[127:64], xmm[63:0]/m64,ib/ub {sae}", "op": "RVM-T1S: EVEX.LIG.66.0F3A.W1 51 /r ib" , "vl": 0},
{"inst": "vrangess W:xmm {kz}, xmm[127:32], xmm[31:0]/m32,ib/ub {sae}", "op": "RVM-T1S: EVEX.LIG.66.0F3A.W0 51 /r ib" , "vl": 0},
{"inst": "vreducesd W:xmm {kz}, xmm[127:64], xmm[63:0]/m64, ib/ub" , "op": "RVM-T1S: EVEX.LIG.66.0F3A.W1 57 /r ib" , "vl": 0},
{"inst": "vreducess W:xmm {kz}, xmm[127:32], xmm[31:0]/m32, ib/ub" , "op": "RVM-T1S: EVEX.LIG.66.0F3A.W0 57 /r ib" , "vl": 0}
]},
{"category": "AVX512 SIMD", "ext": "AVX512_DQ", "data": [
{"inst": "vandnpd W:xmm {kz}, xmm, xmm/m128/b64" , "op": "RVM-FV: EVEX.128.66.0F.W1 55 /r" , "vl": 1},
{"inst": "vandnpd W:ymm {kz}, ymm, ymm/m256/b64" , "op": "RVM-FV: EVEX.256.66.0F.W1 55 /r" , "vl": 1},
{"inst": "vandnpd W:zmm {kz}, zmm, zmm/m512/b64" , "op": "RVM-FV: EVEX.512.66.0F.W1 55 /r" , "vl": 0},
{"inst": "vandnps W:xmm {kz}, xmm, xmm/m128/b32" , "op": "RVM-FV: EVEX.128.66.W0 55 /r" , "vl": 1},
{"inst": "vandnps W:ymm {kz}, ymm, ymm/m256/b32" , "op": "RVM-FV: EVEX.256.66.W0 55 /r" , "vl": 1},
{"inst": "vandnps W:zmm {kz}, zmm, zmm/m512/b32" , "op": "RVM-FV: EVEX.512.66.W0 55 /r" , "vl": 0},
{"inst": "vandpd W:xmm {kz}, ~xmm, ~xmm/m128/b64" , "op": "RVM-FV: EVEX.128.66.0F.W1 54 /r" , "vl": 1},
{"inst": "vandpd W:ymm {kz}, ~ymm, ~ymm/m256/b64" , "op": "RVM-FV: EVEX.256.66.0F.W1 54 /r" , "vl": 1},
{"inst": "vandpd W:zmm {kz}, ~zmm, ~zmm/m512/b64" , "op": "RVM-FV: EVEX.512.66.0F.W1 54 /r" , "vl": 0},
{"inst": "vandps W:xmm {kz}, ~xmm, ~xmm/m128/b32" , "op": "RVM-FV: EVEX.128.0F.W0 54 /r" , "vl": 1},
{"inst": "vandps W:ymm {kz}, ~ymm, ~ymm/m256/b32" , "op": "RVM-FV: EVEX.256.0F.W0 54 /r" , "vl": 1},
{"inst": "vandps W:zmm {kz}, ~zmm, ~zmm/m512/b32" , "op": "RVM-FV: EVEX.512.0F.W0 54 /r" , "vl": 0},
{"inst": "vbroadcastf32x2 W:ymm {kz}, xmm[63:0]/m64" , "op": "RM-T2: EVEX.256.66.0F38.W0 19 /r" , "vl": 1},
{"inst": "vbroadcastf32x2 W:zmm {kz}, xmm[63:0]/m64" , "op": "RM-T2: EVEX.512.66.0F38.W0 19 /r" , "vl": 0},
{"inst": "vbroadcastf32x8 W:zmm {kz}, m256" , "op": "RM-T8: EVEX.512.66.0F38.W0 1B /r" , "vl": 0},
{"inst": "vbroadcastf64x2 W:ymm {kz}, m128" , "op": "RM-T2: EVEX.256.66.0F38.W1 1A /r" , "vl": 1},
{"inst": "vbroadcastf64x2 W:zmm {kz}, m128" , "op": "RM-T2: EVEX.512.66.0F38.W1 1A /r" , "vl": 0},
{"inst": "vbroadcasti32x2 W:xmm {kz}, xmm[63:0]/m64" , "op": "RM-T2: EVEX.128.66.0F38.W0 59 /r" , "vl": 1},
{"inst": "vbroadcasti32x2 W:ymm {kz}, xmm[63:0]/m64" , "op": "RM-T2: EVEX.256.66.0F38.W0 59 /r" , "vl": 1},
{"inst": "vbroadcasti32x2 W:zmm {kz}, xmm[63:0]/m64" , "op": "RM-T2: EVEX.512.66.0F38.W0 59 /r" , "vl": 0},
{"inst": "vbroadcasti32x8 W:zmm {kz}, m256" , "op": "RM-T8: EVEX.512.66.0F38.W0 5B /r" , "vl": 0},
{"inst": "vbroadcasti64x2 W:ymm {kz}, m128" , "op": "RM-T2: EVEX.256.66.0F38.W1 5A /r" , "vl": 1},
{"inst": "vbroadcasti64x2 W:zmm {kz}, m128" , "op": "RM-T2: EVEX.512.66.0F38.W1 5A /r" , "vl": 0},
{"inst": "vcvtpd2qq W:xmm {kz}, xmm/m128/b64" , "op": "RM-FV: EVEX.128.66.0F.W1 7B /r" , "vl": 1},
{"inst": "vcvtpd2qq W:ymm {kz}, ymm/m256/b64" , "op": "RM-FV: EVEX.256.66.0F.W1 7B /r" , "vl": 1},
{"inst": "vcvtpd2qq W:zmm {kz}, zmm/m512/b64 {er}" , "op": "RM-FV: EVEX.512.66.0F.W1 7B /r" , "vl": 0},
{"inst": "vcvtpd2uqq W:xmm {kz}, xmm/m128/b64" , "op": "RM-FV: EVEX.128.66.0F.W1 79 /r" , "vl": 1},
{"inst": "vcvtpd2uqq W:ymm {kz}, ymm/m256/b64" , "op": "RM-FV: EVEX.256.66.0F.W1 79 /r" , "vl": 1},
{"inst": "vcvtpd2uqq W:zmm {kz}, zmm/m512/b64 {er}" , "op": "RM-FV: EVEX.512.66.0F.W1 79 /r" , "vl": 0},
{"inst": "vcvtps2qq W:xmm {kz}, xmm[63:0]/m64/b32" , "op": "RM-HV: EVEX.128.66.0F.W0 7B /r" , "vl": 1},
{"inst": "vcvtps2qq W:ymm {kz}, xmm/m128/b32" , "op": "RM-HV: EVEX.256.66.0F.W0 7B /r" , "vl": 1},
{"inst": "vcvtps2qq W:zmm {kz}, ymm/m256/b32 {er}" , "op": "RM-HV: EVEX.512.66.0F.W0 7B /r" , "vl": 0},
{"inst": "vcvtps2uqq W:xmm {kz}, xmm[63:0]/m64/b32" , "op": "RM-HV: EVEX.128.66.0F.W0 79 /r" , "vl": 1},
{"inst": "vcvtps2uqq W:ymm {kz}, xmm/m128/b32" , "op": "RM-HV: EVEX.256.66.0F.W0 79 /r" , "vl": 1},
{"inst": "vcvtps2uqq W:zmm {kz}, ymm/m256/b32 {er}" , "op": "RM-HV: EVEX.512.66.0F.W0 79 /r" , "vl": 0},
{"inst": "vcvtqq2pd W:xmm {kz}, xmm/m128/b64" , "op": "RM-FV: EVEX.128.F3.0F.W1 E6 /r" , "vl": 1},
{"inst": "vcvtqq2pd W:ymm {kz}, ymm/m256/b64" , "op": "RM-FV: EVEX.256.F3.0F.W1 E6 /r" , "vl": 1},
{"inst": "vcvtqq2pd W:zmm {kz}, zmm/m512/b64 {er}" , "op": "RM-FV: EVEX.512.F3.0F.W1 E6 /r" , "vl": 0},
{"inst": "vcvtqq2ps W:xmm[63:0] {kz}, xmm/m128/b64" , "op": "RM-FV: EVEX.128.0F.W1 5B /r" , "vl": 1},
{"inst": "vcvtqq2ps W:xmm {kz}, ymm/m256/b64" , "op": "RM-FV: EVEX.256.0F.W1 5B /r" , "vl": 1},
{"inst": "vcvtqq2ps W:ymm {kz}, zmm/m512/b64 {er}" , "op": "RM-FV: EVEX.512.0F.W1 5B /r" , "vl": 0},
{"inst": "vcvttpd2uqq W:xmm {kz}, xmm/m128/b64" , "op": "RM-FV: EVEX.128.66.0F.W1 78 /r" , "vl": 1},
{"inst": "vcvttpd2uqq W:ymm {kz}, ymm/m256/b64" , "op": "RM-FV: EVEX.256.66.0F.W1 78 /r" , "vl": 1},
{"inst": "vcvttpd2uqq W:zmm {kz}, zmm/m512/b64 {sae}" , "op": "RM-FV: EVEX.512.66.0F.W1 78 /r" , "vl": 0},
{"inst": "vcvttps2qq W:xmm {kz}, xmm[63:0]/m64/b32" , "op": "RM-HV: EVEX.128.66.0F.W0 7A /r" , "vl": 1},
{"inst": "vcvttps2qq W:ymm {kz}, xmm/m128/b32" , "op": "RM-HV: EVEX.256.66.0F.W0 7A /r" , "vl": 1},
{"inst": "vcvttps2qq W:zmm {kz}, ymm/m256/b32 {sae}" , "op": "RM-HV: EVEX.512.66.0F.W0 7A /r" , "vl": 0},
{"inst": "vcvttps2uqq W:xmm {kz}, xmm[63:0]/m64/b32" , "op": "RM-HV: EVEX.128.66.0F.W0 78 /r" , "vl": 1},
{"inst": "vcvttps2uqq W:ymm {kz}, xmm/m128/b32" , "op": "RM-HV: EVEX.256.66.0F.W0 78 /r" , "vl": 1},
{"inst": "vcvttps2uqq W:zmm {kz}, ymm/m256/b32 {sae}" , "op": "RM-HV: EVEX.512.66.0F.W0 78 /r" , "vl": 0},
{"inst": "vcvtuqq2pd W:xmm {kz}, xmm/m128/b64" , "op": "RM-FV: EVEX.128.F3.0F.W1 7A /r" , "vl": 1},
{"inst": "vcvtuqq2pd W:ymm {kz}, ymm/m256/b64" , "op": "RM-FV: EVEX.256.F3.0F.W1 7A /r" , "vl": 1},
{"inst": "vcvtuqq2pd W:zmm {kz}, zmm/m512/b64 {er}" , "op": "RM-FV: EVEX.512.F3.0F.W1 7A /r" , "vl": 0},
{"inst": "vcvtuqq2ps W:xmm[63:0] {kz}, xmm/m128/b64" , "op": "RM-FV: EVEX.128.F2.0F.W1 7A /r" , "vl": 1},
{"inst": "vcvtuqq2ps W:xmm {kz}, ymm/m256/b64" , "op": "RM-FV: EVEX.256.F2.0F.W1 7A /r" , "vl": 1},
{"inst": "vcvtuqq2ps W:ymm {kz}, zmm/m512/b64 {er}" , "op": "RM-FV: EVEX.512.F2.0F.W1 7A /r" , "vl": 0},
{"inst": "vextractf32x8 W:ymm/m256 {kz}, zmm, ib/ub" , "op": "MR-T8: EVEX.512.66.0F3A.W0 1B /r ib" , "vl": 0},
{"inst": "vextractf64x2 W:xmm/m128 {kz}, ymm, ib/ub" , "op": "MR-T2: EVEX.256.66.0F3A.W1 19 /r ib" , "vl": 1},
{"inst": "vextractf64x2 W:xmm/m128 {kz}, zmm, ib/ub" , "op": "MR-T2: EVEX.512.66.0F3A.W1 19 /r ib" , "vl": 0},
{"inst": "vextracti32x8 W:ymm/m256 {kz}, zmm, ib/ub" , "op": "MR-T8: EVEX.512.66.0F3A.W0 3B /r ib" , "vl": 0},
{"inst": "vextracti64x2 W:xmm/m128 {kz}, ymm, ib/ub" , "op": "MR-T2: EVEX.256.66.0F3A.W1 39 /r ib" , "vl": 1},
{"inst": "vextracti64x2 W:xmm/m128 {kz}, zmm, ib/ub" , "op": "MR-T2: EVEX.512.66.0F3A.W1 39 /r ib" , "vl": 0},
{"inst": "vfpclasspd W:k {k}, xmm/m128/b64, ib/ub" , "op": "RM-FV: EVEX.128.66.0F3A.W1 66 /r ib" , "vl": 1, "k": "zeroing"},
{"inst": "vfpclasspd W:k {k}, ymm/m256/b64, ib/ub" , "op": "RM-FV: EVEX.256.66.0F3A.W1 66 /r ib" , "vl": 1, "k": "zeroing"},
{"inst": "vfpclasspd W:k {k}, zmm/m512/b64, ib/ub" , "op": "RM-FV: EVEX.512.66.0F3A.W1 66 /r ib" , "vl": 0, "k": "zeroing"},
{"inst": "vfpclassps W:k {k}, xmm/m128/b32, ib/ub" , "op": "RM-FV: EVEX.128.66.0F3A.W0 66 /r ib" , "vl": 1, "k": "zeroing"},
{"inst": "vfpclassps W:k {k}, ymm/m256/b32, ib/ub" , "op": "RM-FV: EVEX.256.66.0F3A.W0 66 /r ib" , "vl": 1, "k": "zeroing"},
{"inst": "vfpclassps W:k {k}, zmm/m512/b32, ib/ub" , "op": "RM-FV: EVEX.512.66.0F3A.W0 66 /r ib" , "vl": 0, "k": "zeroing"},
{"inst": "vinsertf32x8 W:zmm {kz}, zmm, ymm/m256, ib/ub" , "op": "RVM-T8: EVEX.512.66.0F3A.W0 1A /r ib" , "vl": 0},
{"inst": "vinsertf64x2 W:ymm {kz}, ymm, xmm/m128, ib/ub" , "op": "RVM-T2: EVEX.256.66.0F3A.W1 18 /r ib" , "vl": 1},
{"inst": "vinsertf64x2 W:zmm {kz}, zmm, xmm/m128, ib/ub" , "op": "RVM-T2: EVEX.512.66.0F3A.W1 18 /r ib" , "vl": 0},
{"inst": "vinserti32x8 W:zmm {kz}, zmm, ymm/m256, ib/ub" , "op": "RVM-T8: EVEX.512.66.0F3A.W0 3A /r ib" , "vl": 0},
{"inst": "vinserti64x2 W:ymm {kz}, ymm, xmm/m128, ib/ub" , "op": "RVM-T2: EVEX.256.66.0F3A.W1 38 /r ib" , "vl": 1},
{"inst": "vinserti64x2 W:zmm {kz}, zmm, xmm/m128, ib/ub" , "op": "RVM-T2: EVEX.512.66.0F3A.W1 38 /r ib" , "vl": 0},
{"inst": "vorpd W:xmm {kz}, ~xmm, ~xmm/m128/b64" , "op": "RVM-FV: EVEX.128.66.0F.W1 56 /r" , "vl": 1},
{"inst": "vorpd W:ymm {kz}, ~ymm, ~ymm/m256/b64" , "op": "RVM-FV: EVEX.256.66.0F.W1 56 /r" , "vl": 1},
{"inst": "vorpd W:zmm {kz}, ~zmm, ~zmm/m512/b64" , "op": "RVM-FV: EVEX.512.66.0F.W1 56 /r" , "vl": 0},
{"inst": "vorps W:xmm {kz}, ~xmm, ~xmm/m128/b32" , "op": "RVM-FV: EVEX.128.0F.W0 56 /r" , "vl": 1},
{"inst": "vorps W:ymm {kz}, ~ymm, ~ymm/m256/b32" , "op": "RVM-FV: EVEX.256.0F.W0 56 /r" , "vl": 1},
{"inst": "vorps W:zmm {kz}, ~zmm, ~zmm/m512/b32" , "op": "RVM-FV: EVEX.512.0F.W0 56 /r" , "vl": 0},
{"inst": "vpextrd W:r32/m32, xmm, ib/ub" , "op": "MR-T1S: EVEX.128.66.0F3A.W0 16 /r ib" , "vl": 0},
{"inst": "vpextrq W:r64/m64, xmm, ib/ub" , "op": "MR-T1S: EVEX.128.66.0F3A.W1 16 /r ib" , "vl": 0},
{"inst": "vpinsrd W:xmm {kz}, xmm, r32/m32, ib/ub" , "op": "RVM-T1S: EVEX.128.66.0F3A.W0 22 /r ib" , "vl": 0},
{"inst": "vpinsrq W:xmm {kz}, xmm, r64/m64, ib/ub" , "op": "RVM-T1S: EVEX.128.66.0F3A.W1 22 /r ib" , "vl": 0},
{"inst": "vpmovd2m W:k, xmm" , "op": "RM: EVEX.128.F3.0F38.W0 39 /r" , "vl": 1},
{"inst": "vpmovd2m W:k, ymm" , "op": "RM: EVEX.256.F3.0F38.W0 39 /r" , "vl": 1},
{"inst": "vpmovd2m W:k, zmm" , "op": "RM: EVEX.512.F3.0F38.W0 39 /r" , "vl": 0},
{"inst": "vpmovm2d W:xmm, k" , "op": "RM: EVEX.128.F3.0F38.W0 38 /r" , "vl": 1},
{"inst": "vpmovm2d W:ymm, k" , "op": "RM: EVEX.256.F3.0F38.W0 38 /r" , "vl": 1},
{"inst": "vpmovm2d W:zmm, k" , "op": "RM: EVEX.512.F3.0F38.W0 38 /r" , "vl": 0},
{"inst": "vpmovm2q W:xmm, k" , "op": "RM: EVEX.128.F3.0F38.W1 38 /r" , "vl": 1},
{"inst": "vpmovm2q W:ymm, k" , "op": "RM: EVEX.256.F3.0F38.W1 38 /r" , "vl": 1},
{"inst": "vpmovm2q W:zmm, k" , "op": "RM: EVEX.512.F3.0F38.W1 38 /r" , "vl": 0},
{"inst": "vpmovq2m W:k, xmm" , "op": "RM: EVEX.128.F3.0F38.W1 39 /r" , "vl": 1},
{"inst": "vpmovq2m W:k, ymm" , "op": "RM: EVEX.256.F3.0F38.W1 39 /r" , "vl": 1},
{"inst": "vpmovq2m W:k, zmm" , "op": "RM: EVEX.512.F3.0F38.W1 39 /r" , "vl": 0},
{"inst": "vpmullq W:xmm {kz}, ~xmm, ~xmm/m128/b64" , "op": "RVM-FV: EVEX.128.66.0F38.W1 40 /r" , "vl": 1},
{"inst": "vpmullq W:ymm {kz}, ~ymm, ~ymm/m256/b64" , "op": "RVM-FV: EVEX.256.66.0F38.W1 40 /r" , "vl": 1},
{"inst": "vpmullq W:zmm {kz}, ~zmm, ~zmm/m512/b64" , "op": "RVM-FV: EVEX.512.66.0F38.W1 40 /r" , "vl": 0},
{"inst": "vrangepd W:xmm {kz}, xmm, xmm/m128/b64, ib/ub" , "op": "RVM-FV: EVEX.128.66.0F3A.W1 50 /r ib" , "vl": 1},
{"inst": "vrangepd W:ymm {kz}, ymm, ymm/m256/b64, ib/ub" , "op": "RVM-FV: EVEX.256.66.0F3A.W1 50 /r ib" , "vl": 1},
{"inst": "vrangepd W:zmm {kz}, zmm, zmm/m512/b64, ib/ub {sae}" , "op": "RVM-FV: EVEX.512.66.0F3A.W1 50 /r ib" , "vl": 0},
{"inst": "vrangeps W:xmm {kz}, xmm, xmm/m128/b32, ib/ub" , "op": "RVM-FV: EVEX.128.66.0F3A.W0 50 /r ib" , "vl": 1},
{"inst": "vrangeps W:ymm {kz}, ymm, ymm/m256/b32, ib/ub" , "op": "RVM-FV: EVEX.256.66.0F3A.W0 50 /r ib" , "vl": 1},
{"inst": "vrangeps W:zmm {kz}, zmm, zmm/m512/b32, ib/ub {sae}" , "op": "RVM-FV: EVEX.512.66.0F3A.W0 50 /r ib" , "vl": 0},
{"inst": "vreducepd W:xmm {kz}, xmm/m128/b64, ib/ub" , "op": "RM-FV: EVEX.128.66.0F3A.W1 56 /r ib" , "vl": 1},
{"inst": "vreducepd W:ymm {kz}, ymm/m256/b64, ib/ub" , "op": "RM-FV: EVEX.256.66.0F3A.W1 56 /r ib" , "vl": 1},
{"inst": "vreducepd W:zmm {kz}, zmm/m512/b64, ib/ub" , "op": "RM-FV: EVEX.512.66.0F3A.W1 56 /r ib" , "vl": 0},
{"inst": "vreduceps W:xmm {kz}, xmm/m128/b32, ib/ub" , "op": "RM-FV: EVEX.128.66.0F3A.W0 56 /r ib" , "vl": 1},
{"inst": "vreduceps W:ymm {kz}, ymm/m256/b32, ib/ub" , "op": "RM-FV: EVEX.256.66.0F3A.W0 56 /r ib" , "vl": 1},
{"inst": "vreduceps W:zmm {kz}, zmm/m512/b32, ib/ub" , "op": "RM-FV: EVEX.512.66.0F3A.W0 56 /r ib" , "vl": 0},
{"inst": "vxorpd W:xmm {kz}, ~xmm, ~xmm/m128/b64" , "op": "RVM-FV: EVEX.128.66.0F.W1 57 /r" , "vl": 1},
{"inst": "vxorpd W:ymm {kz}, ~ymm, ~ymm/m256/b64" , "op": "RVM-FV: EVEX.256.66.0F.W1 57 /r" , "vl": 1},
{"inst": "vxorpd W:zmm {kz}, ~zmm, ~zmm/m512/b64" , "op": "RVM-FV: EVEX.512.66.0F.W1 57 /r" , "vl": 0},
{"inst": "vxorps W:xmm {kz}, ~xmm, ~xmm/m128/b32" , "op": "RVM-FV: EVEX.128.0F.W0 57 /r" , "vl": 1},
{"inst": "vxorps W:ymm {kz}, ~ymm, ~ymm/m256/b32" , "op": "RVM-FV: EVEX.256.0F.W0 57 /r" , "vl": 1},
{"inst": "vxorps W:zmm {kz}, ~zmm, ~zmm/m512/b32" , "op": "RVM-FV: EVEX.512.0F.W0 57 /r" , "vl": 0}
]},
{"category": "AVX512 SIMD", "ext": "AVX512_BW", "data": [
{"inst": "vdbpsadbw W:xmm {kz}, xmm, xmm/m128, ib/ub" , "op": "RVM-FVM: EVEX.128.66.0F3A.W0 42 /r ib" , "vl": 1},
{"inst": "vdbpsadbw W:ymm {kz}, ymm, ymm/m256, ib/ub" , "op": "RVM-FVM: EVEX.256.66.0F3A.W0 42 /r ib" , "vl": 1},
{"inst": "vdbpsadbw W:zmm {kz}, zmm, zmm/m512, ib/ub" , "op": "RVM-FVM: EVEX.512.66.0F3A.W0 42 /r ib" , "vl": 0},
{"inst": "vmovdqu16 W:xmm {kz}, xmm/m128" , "op": "RM-FVM: EVEX.128.F2.0F.W1 6F /r" , "vl": 1},
{"inst": "vmovdqu16 W:xmm/m128 {kz}, xmm" , "op": "MR-FVM: EVEX.128.F2.0F.W1 7F /r" , "vl": 1},
{"inst": "vmovdqu16 W:ymm {kz}, ymm/m256" , "op": "RM-FVM: EVEX.256.F2.0F.W1 6F /r" , "vl": 1},
{"inst": "vmovdqu16 W:ymm/m256 {kz}, ymm" , "op": "MR-FVM: EVEX.256.F2.0F.W1 7F /r" , "vl": 1},
{"inst": "vmovdqu16 W:zmm {kz}, zmm/m512" , "op": "RM-FVM: EVEX.512.F2.0F.W1 6F /r" , "vl": 0},
{"inst": "vmovdqu16 W:zmm/m512 {kz}, zmm" , "op": "MR-FVM: EVEX.512.F2.0F.W1 7F /r" , "vl": 0},
{"inst": "vmovdqu8 W:xmm {kz}, xmm/m128" , "op": "RM-FVM: EVEX.128.F2.0F.W0 6F /r" , "vl": 1},
{"inst": "vmovdqu8 W:xmm/m128 {kz}, xmm" , "op": "MR-FVM: EVEX.128.F2.0F.W0 7F /r" , "vl": 1},
{"inst": "vmovdqu8 W:ymm {kz}, ymm/m256" , "op": "RM-FVM: EVEX.256.F2.0F.W0 6F /r" , "vl": 1},
{"inst": "vmovdqu8 W:ymm/m256 {kz}, ymm" , "op": "MR-FVM: EVEX.256.F2.0F.W0 7F /r" , "vl": 1},
{"inst": "vmovdqu8 W:zmm {kz}, zmm/m512" , "op": "RM-FVM: EVEX.512.F2.0F.W0 6F /r" , "vl": 0},
{"inst": "vmovdqu8 W:zmm/m512 {kz}, zmm" , "op": "MR-FVM: EVEX.512.F2.0F.W0 7F /r" , "vl": 0},
{"inst": "vpabsb W:xmm {kz}, xmm/m128" , "op": "RM-FVM: EVEX.128.66.0F38 1C /r" , "vl": 1},
{"inst": "vpabsb W:ymm {kz}, ymm/m256" , "op": "RM-FVM: EVEX.256.66.0F38 1C /r" , "vl": 1},
{"inst": "vpabsb W:zmm {kz}, zmm/m512" , "op": "RM-FVM: EVEX.512.66.0F38 1C /r" , "vl": 0},
{"inst": "vpabsw W:xmm {kz}, xmm/m128" , "op": "RM-FVM: EVEX.128.66.0F38 1D /r" , "vl": 1},
{"inst": "vpabsw W:ymm {kz}, ymm/m256" , "op": "RM-FVM: EVEX.256.66.0F38 1D /r" , "vl": 1},
{"inst": "vpabsw W:zmm {kz}, zmm/m512" , "op": "RM-FVM: EVEX.512.66.0F38 1D /r" , "vl": 0},
{"inst": "vpackssdw W:xmm {kz}, xmm, xmm/m128/b32" , "op": "RVM-FV: EVEX.128.66.0F.W0 6B /r" , "vl": 1},
{"inst": "vpackssdw W:ymm {kz}, ymm, ymm/m256/b32" , "op": "RVM-FV: EVEX.256.66.0F.W0 6B /r" , "vl": 1},
{"inst": "vpackssdw W:zmm {kz}, zmm, zmm/m512/b32" , "op": "RVM-FV: EVEX.512.66.0F.W0 6B /r" , "vl": 0},
{"inst": "vpacksswb W:xmm {kz}, xmm, xmm/m128" , "op": "RVM-FVM: EVEX.128.66.0F.WIG 63 /r" , "vl": 1},
{"inst": "vpacksswb W:ymm {kz}, ymm, ymm/m256" , "op": "RVM-FVM: EVEX.256.66.0F.WIG 63 /r" , "vl": 1},
{"inst": "vpacksswb W:zmm {kz}, zmm, zmm/m512" , "op": "RVM-FVM: EVEX.512.66.0F.WIG 63 /r" , "vl": 0},
{"inst": "vpackusdw W:xmm {kz}, xmm, xmm/m128/b32" , "op": "RVM-FV: EVEX.128.66.0F38.W0 2B /r" , "vl": 1},
{"inst": "vpackusdw W:ymm {kz}, ymm, ymm/m256/b32" , "op": "RVM-FV: EVEX.256.66.0F38.W0 2B /r" , "vl": 1},
{"inst": "vpackusdw W:zmm {kz}, zmm, zmm/m512/b32" , "op": "RVM-FV: EVEX.512.66.0F38.W0 2B /r" , "vl": 0},
{"inst": "vpackuswb W:xmm {kz}, xmm, xmm/m128" , "op": "RVM-FVM: EVEX.128.66.0F.WIG 67 /r" , "vl": 1},
{"inst": "vpackuswb W:ymm {kz}, ymm, ymm/m256" , "op": "RVM-FVM: EVEX.256.66.0F.WIG 67 /r" , "vl": 1},
{"inst": "vpackuswb W:zmm {kz}, zmm, zmm/m512" , "op": "RVM-FVM: EVEX.512.66.0F.WIG 67 /r" , "vl": 0},
{"inst": "vpaddb W:xmm {kz}, ~xmm, ~xmm/m128" , "op": "RVM-FVM: EVEX.128.66.0F.WIG FC /r" , "vl": 1},
{"inst": "vpaddb W:ymm {kz}, ~ymm, ~ymm/m256" , "op": "RVM-FVM: EVEX.256.66.0F.WIG FC /r" , "vl": 1},
{"inst": "vpaddb W:zmm {kz}, ~zmm, ~zmm/m512" , "op": "RVM-FVM: EVEX.512.66.0F.WIG FC /r" , "vl": 0},
{"inst": "vpaddsb W:xmm {kz}, ~xmm, ~xmm/m128" , "op": "RVM-FVM: EVEX.128.66.0F.WIG EC /r" , "vl": 1},
{"inst": "vpaddsb W:ymm {kz}, ~ymm, ~ymm/m256" , "op": "RVM-FVM: EVEX.256.66.0F.WIG EC /r" , "vl": 1},
{"inst": "vpaddsb W:zmm {kz}, ~zmm, ~zmm/m512" , "op": "RVM-FVM: EVEX.512.66.0F.WIG EC /r" , "vl": 0},
{"inst": "vpaddsw W:xmm {kz}, ~xmm, ~xmm/m128" , "op": "RVM-FVM: EVEX.128.66.0F.WIG ED /r" , "vl": 1},
{"inst": "vpaddsw W:ymm {kz}, ~ymm, ~ymm/m256" , "op": "RVM-FVM: EVEX.256.66.0F.WIG ED /r" , "vl": 1},
{"inst": "vpaddsw W:zmm {kz}, ~zmm, ~zmm/m512" , "op": "RVM-FVM: EVEX.512.66.0F.WIG ED /r" , "vl": 0},
{"inst": "vpaddusb W:xmm {kz}, ~xmm, ~xmm/m128" , "op": "RVM-FVM: EVEX.128.66.0F.WIG DC /r" , "vl": 1},
{"inst": "vpaddusb W:ymm {kz}, ~ymm, ~ymm/m256" , "op": "RVM-FVM: EVEX.256.66.0F.WIG DC /r" , "vl": 1},
{"inst": "vpaddusb W:zmm {kz}, ~zmm, ~zmm/m512" , "op": "RVM-FVM: EVEX.512.66.0F.WIG DC /r" , "vl": 0},
{"inst": "vpaddusw W:xmm {kz}, ~xmm, ~xmm/m128" , "op": "RVM-FVM: EVEX.128.66.0F.WIG DD /r" , "vl": 1},
{"inst": "vpaddusw W:ymm {kz}, ~ymm, ~ymm/m256" , "op": "RVM-FVM: EVEX.256.66.0F.WIG DD /r" , "vl": 1},
{"inst": "vpaddusw W:zmm {kz}, ~zmm, ~zmm/m512" , "op": "RVM-FVM: EVEX.512.66.0F.WIG DD /r" , "vl": 0},
{"inst": "vpaddw W:xmm {kz}, ~xmm, ~xmm/m128" , "op": "RVM-FVM: EVEX.128.66.0F.WIG FD /r" , "vl": 1},
{"inst": "vpaddw W:ymm {kz}, ~ymm, ~ymm/m256" , "op": "RVM-FVM: EVEX.256.66.0F.WIG FD /r" , "vl": 1},
{"inst": "vpaddw W:zmm {kz}, ~zmm, ~zmm/m512" , "op": "RVM-FVM: EVEX.512.66.0F.WIG FD /r" , "vl": 0},
{"inst": "vpalignr W:xmm {kz}, xmm, xmm/m128, ib/ub" , "op": "RVM-FVM: EVEX.128.66.0F3A.WIG 0F /r ib" , "vl": 1},
{"inst": "vpalignr W:ymm {kz}, ymm, ymm/m256, ib/ub" , "op": "RVM-FVM: EVEX.256.66.0F3A.WIG 0F /r ib" , "vl": 1},
{"inst": "vpalignr W:zmm {kz}, zmm, zmm/m512, ib/ub" , "op": "RVM-FVM: EVEX.512.66.0F3A.WIG 0F /r ib" , "vl": 0},
{"inst": "vpavgb W:xmm {kz}, ~xmm, ~xmm/m128" , "op": "RVM-FVM: EVEX.128.66.0F.WIG E0 /r" , "vl": 1},
{"inst": "vpavgb W:ymm {kz}, ~ymm, ~ymm/m256" , "op": "RVM-FVM: EVEX.256.66.0F.WIG E0 /r" , "vl": 1},
{"inst": "vpavgb W:zmm {kz}, ~zmm, ~zmm/m512" , "op": "RVM-FVM: EVEX.512.66.0F.WIG E0 /r" , "vl": 0},
{"inst": "vpavgw W:xmm {kz}, ~xmm, ~xmm/m128" , "op": "RVM-FVM: EVEX.128.66.0F.WIG E3 /r" , "vl": 1},
{"inst": "vpavgw W:ymm {kz}, ~ymm, ~ymm/m256" , "op": "RVM-FVM: EVEX.256.66.0F.WIG E3 /r" , "vl": 1},
{"inst": "vpavgw W:zmm {kz}, ~zmm, ~zmm/m512" , "op": "RVM-FVM: EVEX.512.66.0F.WIG E3 /r" , "vl": 0},
{"inst": "vpblendmb W:xmm {kz}, xmm, xmm/m128" , "op": "RVM-FVM: EVEX.128.66.0F38.W0 66 /r" , "vl": 1, "k": "blend"},
{"inst": "vpblendmb W:ymm {kz}, ymm, ymm/m256" , "op": "RVM-FVM: EVEX.256.66.0F38.W0 66 /r" , "vl": 1, "k": "blend"},
{"inst": "vpblendmb W:zmm {kz}, zmm, zmm/m512" , "op": "RVM-FVM: EVEX.512.66.0F38.W0 66 /r" , "vl": 0, "k": "blend"},
{"inst": "vpblendmw W:xmm {kz}, xmm, xmm/m128" , "op": "RVM-FVM: EVEX.128.66.0F38.W1 66 /r" , "vl": 1, "k": "blend"},
{"inst": "vpblendmw W:ymm {kz}, ymm, ymm/m256" , "op": "RVM-FVM: EVEX.256.66.0F38.W1 66 /r" , "vl": 1, "k": "blend"},
{"inst": "vpblendmw W:zmm {kz}, zmm, zmm/m512" , "op": "RVM-FVM: EVEX.512.66.0F38.W1 66 /r" , "vl": 0, "k": "blend"},
{"inst": "vpbroadcastb W:xmm {kz}, r32[7:0]" , "op": "RM-T1S: EVEX.128.66.0F38.W0 7A /r" , "vl": 1},
{"inst": "vpbroadcastb W:xmm {kz}, xmm[7:0]/m8" , "op": "RM-T1S: EVEX.128.66.0F38.W0 78 /r" , "vl": 1},
{"inst": "vpbroadcastb W:ymm {kz}, r32[7:0]" , "op": "RM-T1S: EVEX.256.66.0F38.W0 7A /r" , "vl": 1},
{"inst": "vpbroadcastb W:ymm {kz}, xmm[7:0]/m8" , "op": "RM-T1S: EVEX.256.66.0F38.W0 78 /r" , "vl": 1},
{"inst": "vpbroadcastb W:zmm {kz}, r32[7:0]" , "op": "RM-T1S: EVEX.512.66.0F38.W0 7A /r" , "vl": 0},
{"inst": "vpbroadcastb W:zmm {kz}, xmm[7:0]/m8" , "op": "RM-T1S: EVEX.512.66.0F38.W0 78 /r" , "vl": 0},
{"inst": "vpbroadcastw W:xmm {kz}, r32[15:0]" , "op": "RM-T1S: EVEX.128.66.0F38.W0 7B /r" , "vl": 1},
{"inst": "vpbroadcastw W:xmm {kz}, xmm[15:0]/m16" , "op": "RM-T1S: EVEX.128.66.0F38.W0 79 /r" , "vl": 1},
{"inst": "vpbroadcastw W:ymm {kz}, r32[15:0]" , "op": "RM-T1S: EVEX.256.66.0F38.W0 7B /r" , "vl": 1},
{"inst": "vpbroadcastw W:ymm {kz}, xmm[15:0]/m16" , "op": "RM-T1S: EVEX.256.66.0F38.W0 79 /r" , "vl": 1},
{"inst": "vpbroadcastw W:zmm {kz}, r32[15:0]" , "op": "RM-T1S: EVEX.512.66.0F38.W0 7B /r" , "vl": 0},
{"inst": "vpbroadcastw W:zmm {kz}, xmm[15:0]/m16" , "op": "RM-T1S: EVEX.512.66.0F38.W0 79 /r" , "vl": 0},
{"inst": "vpcmpb W:k {k}, xmm, xmm/m128, ib/ub" , "op": "RVM-FVM: EVEX.128.66.0F3A.W0 3F /r ib" , "vl": 1, "k": "zeroing"},
{"inst": "vpcmpb W:k {k}, ymm, ymm/m256, ib/ub" , "op": "RVM-FVM: EVEX.256.66.0F3A.W0 3F /r ib" , "vl": 1, "k": "zeroing"},
{"inst": "vpcmpb W:k {k}, zmm, zmm/m512, ib/ub" , "op": "RVM-FVM: EVEX.512.66.0F3A.W0 3F /r ib" , "vl": 0, "k": "zeroing"},
{"inst": "vpcmpeqb W:k {k}, ~xmm, ~xmm/m128" , "op": "RVM-FV: EVEX.128.66.0F.WIG 74 /r" , "vl": 1, "k": "zeroing"},
{"inst": "vpcmpeqb W:k {k}, ~ymm, ~ymm/m256" , "op": "RVM-FV: EVEX.256.66.0F.WIG 74 /r" , "vl": 1, "k": "zeroing"},
{"inst": "vpcmpeqb W:k {k}, ~zmm, ~zmm/m512" , "op": "RVM-FV: EVEX.512.66.0F.WIG 74 /r" , "vl": 0, "k": "zeroing"},
{"inst": "vpcmpeqw W:k {k}, ~xmm, ~xmm/m128" , "op": "RVM-FV: EVEX.128.66.0F.WIG 75 /r" , "vl": 1, "k": "zeroing"},
{"inst": "vpcmpeqw W:k {k}, ~ymm, ~ymm/m256" , "op": "RVM-FV: EVEX.256.66.0F.WIG 75 /r" , "vl": 1, "k": "zeroing"},
{"inst": "vpcmpeqw W:k {k}, ~zmm, ~zmm/m512" , "op": "RVM-FV: EVEX.512.66.0F.WIG 75 /r" , "vl": 0, "k": "zeroing"},
{"inst": "vpcmpgtb W:k {k}, xmm, xmm/m128" , "op": "RVM-FV: EVEX.128.66.0F.WIG 64 /r" , "vl": 1, "k": "zeroing"},
{"inst": "vpcmpgtb W:k {k}, ymm, ymm/m256" , "op": "RVM-FV: EVEX.256.66.0F.WIG 64 /r" , "vl": 1, "k": "zeroing"},
{"inst": "vpcmpgtb W:k {k}, zmm, zmm/m512" , "op": "RVM-FV: EVEX.512.66.0F.WIG 64 /r" , "vl": 0, "k": "zeroing"},
{"inst": "vpcmpgtw W:k {k}, xmm, xmm/m128" , "op": "RVM-FV: EVEX.128.66.0F.WIG 65 /r" , "vl": 1, "k": "zeroing"},
{"inst": "vpcmpgtw W:k {k}, ymm, ymm/m256" , "op": "RVM-FV: EVEX.256.66.0F.WIG 65 /r" , "vl": 1, "k": "zeroing"},
{"inst": "vpcmpgtw W:k {k}, zmm, zmm/m512" , "op": "RVM-FV: EVEX.512.66.0F.WIG 65 /r" , "vl": 0, "k": "zeroing"},
{"inst": "vpcmpub W:k {k}, xmm, xmm/m128, ib/ub" , "op": "RVM-FVM: EVEX.128.66.0F3A.W0 3E /r ib" , "vl": 1, "k": "zeroing"},
{"inst": "vpcmpub W:k {k}, ymm, ymm/m256, ib/ub" , "op": "RVM-FVM: EVEX.256.66.0F3A.W0 3E /r ib" , "vl": 1, "k": "zeroing"},
{"inst": "vpcmpub W:k {k}, zmm, zmm/m512, ib/ub" , "op": "RVM-FVM: EVEX.512.66.0F3A.W0 3E /r ib" , "vl": 0, "k": "zeroing"},
{"inst": "vpcmpuw W:k {k}, xmm, xmm/m128/b64, ib/ub" , "op": "RVM-FVM: EVEX.128.66.0F3A.W1 3E /r ib" , "vl": 1, "k": "zeroing"},
{"inst": "vpcmpuw W:k {k}, ymm, ymm/m256/b64, ib/ub" , "op": "RVM-FVM: EVEX.256.66.0F3A.W1 3E /r ib" , "vl": 1, "k": "zeroing"},
{"inst": "vpcmpuw W:k {k}, zmm, zmm/m512/b64, ib/ub" , "op": "RVM-FVM: EVEX.512.66.0F3A.W1 3E /r ib" , "vl": 0, "k": "zeroing"},
{"inst": "vpcmpw W:k {k}, xmm, xmm/m128/b64, ib/ub" , "op": "RVM-FVM: EVEX.128.66.0F3A.W1 3F /r ib" , "vl": 1, "k": "zeroing"},
{"inst": "vpcmpw W:k {k}, ymm, ymm/m256/b64, ib/ub" , "op": "RVM-FVM: EVEX.256.66.0F3A.W1 3F /r ib" , "vl": 1, "k": "zeroing"},
{"inst": "vpcmpw W:k {k}, zmm, zmm/m512/b64, ib/ub" , "op": "RVM-FVM: EVEX.512.66.0F3A.W1 3F /r ib" , "vl": 0, "k": "zeroing"},
{"inst": "vpermi2w X:xmm {kz}, xmm, xmm/m128" , "op": "RVM-FVM: EVEX.128.66.0F38.W1 75 /r" , "vl": 1},
{"inst": "vpermi2w X:ymm {kz}, ymm, ymm/m256" , "op": "RVM-FVM: EVEX.256.66.0F38.W1 75 /r" , "vl": 1},
{"inst": "vpermi2w X:zmm {kz}, zmm, zmm/m512" , "op": "RVM-FVM: EVEX.512.66.0F38.W1 75 /r" , "vl": 0},
{"inst": "vpermt2w X:xmm {kz}, xmm, xmm/m128" , "op": "RVM-FVM: EVEX.128.66.0F38.W1 7D /r" , "vl": 1},
{"inst": "vpermt2w X:ymm {kz}, ymm, ymm/m256" , "op": "RVM-FVM: EVEX.256.66.0F38.W1 7D /r" , "vl": 1},
{"inst": "vpermt2w X:zmm {kz}, zmm, zmm/m512" , "op": "RVM-FVM: EVEX.512.66.0F38.W1 7D /r" , "vl": 0},
{"inst": "vpermw W:xmm {kz}, xmm, xmm/m128" , "op": "RVM-FVM: EVEX.128.66.0F38.W1 8D /r" , "vl": 1},
{"inst": "vpermw W:ymm {kz}, ymm, ymm/m256" , "op": "RVM-FVM: EVEX.256.66.0F38.W1 8D /r" , "vl": 1},
{"inst": "vpermw W:zmm {kz}, zmm, zmm/m512" , "op": "RVM-FVM: EVEX.512.66.0F38.W1 8D /r" , "vl": 0},
{"inst": "vpextrb W:r32[7:0]/m8 , xmm, ib/ub" , "op": "MR-T1S: EVEX.128.66.0F3A.WIG 14 /r ib" , "vl": 0},
{"inst": "vpextrw W:r32[15:0], xmm, ib/ub" , "op": "RM: EVEX.128.66.0F.WIG C5 /r ib" , "vl": 0},
{"inst": "vpextrw W:r32[15:0]/m16, xmm, ib/ub" , "op": "MR-T1S: EVEX.128.66.0F3A.WIG 15 /r ib" , "vl": 0},
{"inst": "vpinsrb W:xmm {kz}, xmm, r32[7:0]/m8, ib/ub" , "op": "RVM-T1S: EVEX.128.66.0F3A.WIG 20 /r ib" , "vl": 0},
{"inst": "vpinsrw W:xmm {kz}, xmm, r32[15:0]/m16, ib/ub" , "op": "RVM-T1S: EVEX.128.66.0F.WIG C4 /r ib" , "vl": 0},
{"inst": "vpmaddubsw W:xmm {kz}, ~xmm, ~xmm/m128" , "op": "RVM-FVM: EVEX.128.66.0F38.WIG 04 /r" , "vl": 1},
{"inst": "vpmaddubsw W:ymm {kz}, ~ymm, ~ymm/m256" , "op": "RVM-FVM: EVEX.256.66.0F38.WIG 04 /r" , "vl": 1},
{"inst": "vpmaddubsw W:zmm {kz}, ~zmm, ~zmm/m512" , "op": "RVM-FVM: EVEX.512.66.0F38.WIG 04 /r" , "vl": 0},
{"inst": "vpmaddwd W:xmm {kz}, ~xmm, ~xmm/m128" , "op": "RVM-FVM: EVEX.128.66.0F.WIG F5 /r" , "vl": 1},
{"inst": "vpmaddwd W:ymm {kz}, ~ymm, ~ymm/m256" , "op": "RVM-FVM: EVEX.256.66.0F.WIG F5 /r" , "vl": 1},
{"inst": "vpmaddwd W:zmm {kz}, ~zmm, ~zmm/m512" , "op": "RVM-FVM: EVEX.512.66.0F.WIG F5 /r" , "vl": 0},
{"inst": "vpmaxsb W:xmm {kz}, ~xmm, ~xmm/m128" , "op": "RVM-FVM: EVEX.128.66.0F38.WIG 3C /r" , "vl": 1},
{"inst": "vpmaxsb W:ymm {kz}, ~ymm, ~ymm/m256" , "op": "RVM-FVM: EVEX.256.66.0F38.WIG 3C /r" , "vl": 1},
{"inst": "vpmaxsb W:zmm {kz}, ~zmm, ~zmm/m512" , "op": "RVM-FVM: EVEX.512.66.0F38.WIG 3C /r" , "vl": 0},
{"inst": "vpmaxsw W:xmm {kz}, ~xmm, ~xmm/m128" , "op": "RVM-FVM: EVEX.128.66.0F.WIG EE /r" , "vl": 1},
{"inst": "vpmaxsw W:ymm {kz}, ~ymm, ~ymm/m256" , "op": "RVM-FVM: EVEX.256.66.0F.WIG EE /r" , "vl": 1},
{"inst": "vpmaxsw W:zmm {kz}, ~zmm, ~zmm/m512" , "op": "RVM-FVM: EVEX.512.66.0F.WIG EE /r" , "vl": 0},
{"inst": "vpmaxub W:xmm {kz}, ~xmm, ~xmm/m128" , "op": "RVM-FVM: EVEX.128.66.0F.WIG DE /r" , "vl": 1},
{"inst": "vpmaxub W:ymm {kz}, ~ymm, ~ymm/m256" , "op": "RVM-FVM: EVEX.256.66.0F.WIG DE /r" , "vl": 1},
{"inst": "vpmaxub W:zmm {kz}, ~zmm, ~zmm/m512" , "op": "RVM-FVM: EVEX.512.66.0F.WIG DE /r" , "vl": 0},
{"inst": "vpmaxuw W:xmm {kz}, ~xmm, ~xmm/m128" , "op": "RVM-FVM: EVEX.128.66.0F38.WIG 3E /r" , "vl": 1},
{"inst": "vpmaxuw W:ymm {kz}, ~ymm, ~ymm/m256" , "op": "RVM-FVM: EVEX.256.66.0F38.WIG 3E /r" , "vl": 1},
{"inst": "vpmaxuw W:zmm {kz}, ~zmm, ~zmm/m512" , "op": "RVM-FVM: EVEX.512.66.0F38.WIG 3E /r" , "vl": 0},
{"inst": "vpminsb W:xmm {kz}, ~xmm, ~xmm/m128" , "op": "RVM-FVM: EVEX.128.66.0F38.WIG 38 /r" , "vl": 1},
{"inst": "vpminsb W:ymm {kz}, ~ymm, ~ymm/m256" , "op": "RVM-FVM: EVEX.256.66.0F38.WIG 38 /r" , "vl": 1},
{"inst": "vpminsb W:zmm {kz}, ~zmm, ~zmm/m512" , "op": "RVM-FVM: EVEX.512.66.0F38.WIG 38 /r" , "vl": 0},
{"inst": "vpminsw W:xmm {kz}, ~xmm, ~xmm/m128" , "op": "RVM-FVM: EVEX.128.66.0F.WIG EA /r" , "vl": 1},
{"inst": "vpminsw W:ymm {kz}, ~ymm, ~ymm/m256" , "op": "RVM-FVM: EVEX.256.66.0F.WIG EA /r" , "vl": 1},
{"inst": "vpminsw W:zmm {kz}, ~zmm, ~zmm/m512" , "op": "RVM-FVM: EVEX.512.66.0F.WIG EA /r" , "vl": 0},
{"inst": "vpminub W:xmm {kz}, ~xmm, ~xmm/m128" , "op": "RVM-FVM: EVEX.128.66.0F DA /r" , "vl": 1},
{"inst": "vpminub W:ymm {kz}, ~ymm, ~ymm/m256" , "op": "RVM-FVM: EVEX.256.66.0F DA /r" , "vl": 1},
{"inst": "vpminub W:zmm {kz}, ~zmm, ~zmm/m512" , "op": "RVM-FVM: EVEX.512.66.0F DA /r" , "vl": 0},
{"inst": "vpminuw W:xmm {kz}, ~xmm, ~xmm/m128" , "op": "RVM-FVM: EVEX.128.66.0F38 3A /r" , "vl": 1},
{"inst": "vpminuw W:ymm {kz}, ~ymm, ~ymm/m256" , "op": "RVM-FVM: EVEX.256.66.0F38 3A /r" , "vl": 1},
{"inst": "vpminuw W:zmm {kz}, ~zmm, ~zmm/m512" , "op": "RVM-FVM: EVEX.512.66.0F38 3A /r" , "vl": 0},
{"inst": "vpmovb2m W:k, xmm" , "op": "RM: EVEX.128.F3.0F38.W0 29 /r" , "vl": 1},
{"inst": "vpmovb2m W:k, ymm" , "op": "RM: EVEX.256.F3.0F38.W0 29 /r" , "vl": 1},
{"inst": "vpmovb2m W:k, zmm" , "op": "RM: EVEX.512.F3.0F38.W0 29 /r" , "vl": 0},
{"inst": "vpmovm2b W:xmm, k" , "op": "RM: EVEX.128.F3.0F38.W0 28 /r" , "vl": 1},
{"inst": "vpmovm2b W:ymm, k" , "op": "RM: EVEX.256.F3.0F38.W0 28 /r" , "vl": 1},
{"inst": "vpmovm2b W:zmm, k" , "op": "RM: EVEX.512.F3.0F38.W0 28 /r" , "vl": 0},
{"inst": "vpmovm2w W:xmm, k" , "op": "RM: EVEX.128.F3.0F38.W1 28 /r" , "vl": 1},
{"inst": "vpmovm2w W:ymm, k" , "op": "RM: EVEX.256.F3.0F38.W1 28 /r" , "vl": 1},
{"inst": "vpmovm2w W:zmm, k" , "op": "RM: EVEX.512.F3.0F38.W1 28 /r" , "vl": 0},
{"inst": "vpmovswb W:xmm[63:0]/m64 {kz}, xmm" , "op": "MR-HVM: EVEX.128.F3.0F38.W0 20 /r" , "vl": 1},
{"inst": "vpmovswb W:xmm/m128 {kz}, ymm" , "op": "MR-HVM: EVEX.256.F3.0F38.W0 20 /r" , "vl": 1},
{"inst": "vpmovswb W:ymm/m256 {kz}, zmm" , "op": "MR-HVM: EVEX.512.F3.0F38.W0 20 /r" , "vl": 0},
{"inst": "vpmovsxbw W:xmm {kz}, xmm[63:0]/m64" , "op": "RM-HVM: EVEX.128.66.0F38.WIG 20 /r" , "vl": 1},
{"inst": "vpmovsxbw W:ymm {kz}, xmm/m128" , "op": "RM-HVM: EVEX.256.66.0F38.WIG 20 /r" , "vl": 1},
{"inst": "vpmovsxbw W:zmm {kz}, ymm/m256" , "op": "RM-HVM: EVEX.512.66.0F38.WIG 20 /r" , "vl": 0},
{"inst": "vpmovuswb W:xmm[63:0]/m64 {kz}, xmm" , "op": "MR-HVM: EVEX.128.F3.0F38.W0 10 /r" , "vl": 1},
{"inst": "vpmovuswb W:xmm/m128 {kz}, ymm" , "op": "MR-HVM: EVEX.256.F3.0F38.W0 10 /r" , "vl": 1},
{"inst": "vpmovuswb W:ymm/m256 {kz}, zmm" , "op": "MR-HVM: EVEX.512.F3.0F38.W0 10 /r" , "vl": 0},
{"inst": "vpmovw2m W:k, xmm" , "op": "RM: EVEX.128.F3.0F38.W1 29 /r" , "vl": 1},
{"inst": "vpmovw2m W:k, ymm" , "op": "RM: EVEX.256.F3.0F38.W1 29 /r" , "vl": 1},
{"inst": "vpmovw2m W:k, zmm" , "op": "RM: EVEX.512.F3.0F38.W1 29 /r" , "vl": 0},
{"inst": "vpmovwb W:xmm[63:0]/m64 {kz}, xmm" , "op": "MR-HVM: EVEX.128.F3.0F38.W0 30 /r" , "vl": 1},
{"inst": "vpmovwb W:xmm/m128 {kz}, ymm" , "op": "MR-HVM: EVEX.256.F3.0F38.W0 30 /r" , "vl": 1},
{"inst": "vpmovwb W:ymm/m256 {kz}, zmm" , "op": "MR-HVM: EVEX.512.F3.0F38.W0 30 /r" , "vl": 0},
{"inst": "vpmovzxbw W:xmm {kz}, xmm[63:0]/m64" , "op": "RM-HVM: EVEX.128.66.0F38.WIG 30 /r" , "vl": 1},
{"inst": "vpmovzxbw W:ymm {kz}, xmm/m128" , "op": "RM-HVM: EVEX.256.66.0F38.WIG 30 /r" , "vl": 1},
{"inst": "vpmovzxbw W:zmm {kz}, ymm/m256" , "op": "RM-HVM: EVEX.512.66.0F38.WIG 30 /r" , "vl": 0},
{"inst": "vpmulhrsw W:xmm {kz}, xmm, xmm/m128" , "op": "RVM-FVM: EVEX.128.66.0F38.WIG 0B /r" , "vl": 1},
{"inst": "vpmulhrsw W:ymm {kz}, ymm, ymm/m256" , "op": "RVM-FVM: EVEX.256.66.0F38.WIG 0B /r" , "vl": 1},
{"inst": "vpmulhrsw W:zmm {kz}, zmm, zmm/m512" , "op": "RVM-FVM: EVEX.512.66.0F38.WIG 0B /r" , "vl": 0},
{"inst": "vpmulhuw W:xmm {kz}, ~xmm, ~xmm/m128" , "op": "RVM-FVM: EVEX.128.66.0F.WIG E4 /r" , "vl": 1},
{"inst": "vpmulhuw W:ymm {kz}, ~ymm, ~ymm/m256" , "op": "RVM-FVM: EVEX.256.66.0F.WIG E4 /r" , "vl": 1},
{"inst": "vpmulhuw W:zmm {kz}, ~zmm, ~zmm/m512" , "op": "RVM-FVM: EVEX.512.66.0F.WIG E4 /r" , "vl": 0},
{"inst": "vpmulhw W:xmm {kz}, ~xmm, ~xmm/m128" , "op": "RVM-FVM: EVEX.128.66.0F.WIG E5 /r" , "vl": 1},
{"inst": "vpmulhw W:ymm {kz}, ~ymm, ~ymm/m256" , "op": "RVM-FVM: EVEX.256.66.0F.WIG E5 /r" , "vl": 1},
{"inst": "vpmulhw W:zmm {kz}, ~zmm, ~zmm/m512" , "op": "RVM-FVM: EVEX.512.66.0F.WIG E5 /r" , "vl": 0},
{"inst": "vpmullw W:xmm {kz}, ~xmm, ~xmm/m128" , "op": "RVM-FVM: EVEX.128.66.0F.WIG D5 /r" , "vl": 1},
{"inst": "vpmullw W:ymm {kz}, ~ymm, ~ymm/m256" , "op": "RVM-FVM: EVEX.256.66.0F.WIG D5 /r" , "vl": 1},
{"inst": "vpmullw W:zmm {kz}, ~zmm, ~zmm/m512" , "op": "RVM-FVM: EVEX.512.66.0F.WIG D5 /r" , "vl": 0},
{"inst": "vpsadbw W:xmm, ~xmm, ~xmm/m128" , "op": "RVM-FVM: EVEX.128.66.0F.WIG F6 /r" , "vl": 1},
{"inst": "vpsadbw W:ymm, ~ymm, ~ymm/m256" , "op": "RVM-FVM: EVEX.256.66.0F.WIG F6 /r" , "vl": 1},
{"inst": "vpsadbw W:zmm, ~zmm, ~zmm/m512" , "op": "RVM-FVM: EVEX.512.66.0F.WIG F6 /r" , "vl": 0},
{"inst": "vpshufb W:xmm {kz}, xmm, xmm/m128" , "op": "RVM-FVM: EVEX.128.66.0F38.WIG 00 /r" , "vl": 1},
{"inst": "vpshufb W:ymm {kz}, ymm, ymm/m256" , "op": "RVM-FVM: EVEX.256.66.0F38.WIG 00 /r" , "vl": 1},
{"inst": "vpshufb W:zmm {kz}, zmm, zmm/m512" , "op": "RVM-FVM: EVEX.512.66.0F38.WIG 00 /r" , "vl": 0},
{"inst": "vpshufhw W:xmm {kz}, xmm/m128, ib/ub" , "op": "RM-FVM: EVEX.128.F3.0F.WIG 70 /r ib" , "vl": 1},
{"inst": "vpshufhw W:ymm {kz}, ymm/m256, ib/ub" , "op": "RM-FVM: EVEX.256.F3.0F.WIG 70 /r ib" , "vl": 1},
{"inst": "vpshufhw W:zmm {kz}, zmm/m512, ib/ub" , "op": "RM-FVM: EVEX.512.F3.0F.WIG 70 /r ib" , "vl": 0},
{"inst": "vpshuflw W:xmm {kz}, xmm/m128, ib/ub" , "op": "RM-FVM: EVEX.128.F2.0F.WIG 70 /r ib" , "vl": 1},
{"inst": "vpshuflw W:ymm {kz}, ymm/m256, ib/ub" , "op": "RM-FVM: EVEX.256.F2.0F.WIG 70 /r ib" , "vl": 1},
{"inst": "vpshuflw W:zmm {kz}, zmm/m512, ib/ub" , "op": "RM-FVM: EVEX.512.F2.0F.WIG 70 /r ib" , "vl": 0},
{"inst": "vpslldq W:xmm, xmm/m128, ib/ub" , "op": "VM-FVM: EVEX.128.66.0F.WIG 73 /7 ib" , "vl": 1},
{"inst": "vpslldq W:ymm, ymm/m256, ib/ub" , "op": "VM-FVM: EVEX.256.66.0F.WIG 73 /7 ib" , "vl": 1},
{"inst": "vpslldq W:zmm, zmm/m512, ib/ub" , "op": "VM-FVM: EVEX.512.66.0F.WIG 73 /7 ib" , "vl": 0},
{"inst": "vpsllvw W:xmm {kz}, xmm, xmm/m128" , "op": "RVM-FVM: EVEX.128.66.0F38.W1 12 /r" , "vl": 1},
{"inst": "vpsllvw W:ymm {kz}, ymm, ymm/m256" , "op": "RVM-FVM: EVEX.256.66.0F38.W1 12 /r" , "vl": 1},
{"inst": "vpsllvw W:zmm {kz}, zmm, zmm/m512" , "op": "RVM-FVM: EVEX.512.66.0F38.W1 12 /r" , "vl": 0},
{"inst": "vpsllw W:xmm {kz}, xmm, xmm/m128" , "op": "RVM-M128: EVEX.128.66.0F.WIG F1 /r" , "vl": 1},
{"inst": "vpsllw W:xmm {kz}, xmm/m128, ib/ub" , "op": "VM-FVM: EVEX.128.66.0F.WIG 71 /6 ib" , "vl": 1},
{"inst": "vpsllw W:ymm {kz}, ymm, xmm/m128" , "op": "RVM-M128: EVEX.256.66.0F.WIG F1 /r" , "vl": 1},
{"inst": "vpsllw W:ymm {kz}, ymm/m256, ib/ub" , "op": "VM-FVM: EVEX.256.66.0F.WIG 71 /6 ib" , "vl": 1},
{"inst": "vpsllw W:zmm {kz}, zmm, xmm/m128" , "op": "RVM-M128: EVEX.512.66.0F.WIG F1 /r" , "vl": 0},
{"inst": "vpsllw W:zmm {kz}, zmm/m512, ib/ub" , "op": "VM-FVM: EVEX.512.66.0F.WIG 71 /6 ib" , "vl": 0},
{"inst": "vpsravw W:xmm {kz}, xmm, xmm/m128" , "op": "RVM-FVM: EVEX.128.66.0F38.W1 11 /r" , "vl": 1},
{"inst": "vpsravw W:ymm {kz}, ymm, ymm/m256" , "op": "RVM-FVM: EVEX.256.66.0F38.W1 11 /r" , "vl": 1},
{"inst": "vpsravw W:zmm {kz}, zmm, zmm/m512" , "op": "RVM-FVM: EVEX.512.66.0F38.W1 11 /r" , "vl": 0},
{"inst": "vpsraw W:xmm {kz}, xmm, xmm/m128" , "op": "RVM-M128: EVEX.128.66.0F.WIG E1 /r" , "vl": 1},
{"inst": "vpsraw W:xmm {kz}, xmm/m128, ib/ub" , "op": "VM-FVM: EVEX.128.66.0F.WIG 71 /4 ib" , "vl": 1},
{"inst": "vpsraw W:ymm {kz}, ymm, xmm/m128" , "op": "RVM-M128: EVEX.256.66.0F.WIG E1 /r" , "vl": 1},
{"inst": "vpsraw W:ymm {kz}, ymm/m256, ib/ub" , "op": "VM-FVM: EVEX.256.66.0F.WIG 71 /4 ib" , "vl": 1},
{"inst": "vpsraw W:zmm {kz}, zmm, xmm/m128" , "op": "RVM-M128: EVEX.512.66.0F.WIG E1 /r" , "vl": 0},
{"inst": "vpsraw W:zmm {kz}, zmm/m512, ib/ub" , "op": "VM-FVM: EVEX.512.66.0F.WIG 71 /4 ib" , "vl": 0},
{"inst": "vpsrldq W:xmm, xmm/m128, ib/ub" , "op": "VM-FVM: EVEX.128.66.0F.WIG 73 /3 ib" , "vl": 1},
{"inst": "vpsrldq W:ymm, ymm/m256, ib/ub" , "op": "VM-FVM: EVEX.256.66.0F.WIG 73 /3 ib" , "vl": 1},
{"inst": "vpsrldq W:zmm, zmm/m512, ib/ub" , "op": "VM-FVM: EVEX.512.66.0F.WIG 73 /3 ib" , "vl": 0},
{"inst": "vpsrlvw W:xmm {kz}, xmm, xmm/m128" , "op": "RVM-FVM: EVEX.128.66.0F38.W1 10 /r" , "vl": 1},
{"inst": "vpsrlvw W:ymm {kz}, ymm, ymm/m256" , "op": "RVM-FVM: EVEX.256.66.0F38.W1 10 /r" , "vl": 1},
{"inst": "vpsrlvw W:zmm {kz}, zmm, zmm/m512" , "op": "RVM-FVM: EVEX.512.66.0F38.W1 10 /r" , "vl": 0},
{"inst": "vpsrlw W:xmm {kz}, xmm, xmm/m128" , "op": "RVM-M128: EVEX.128.66.0F.WIG D1 /r" , "vl": 1},
{"inst": "vpsrlw W:xmm {kz}, xmm/m128, ib/ub" , "op": "VM-FVM: EVEX.128.66.0F.WIG 71 /2 ib" , "vl": 1},
{"inst": "vpsrlw W:ymm {kz}, ymm, xmm/m128" , "op": "RVM-M128: EVEX.256.66.0F.WIG D1 /r" , "vl": 1},
{"inst": "vpsrlw W:ymm {kz}, ymm/m256, ib/ub" , "op": "VM-FVM: EVEX.256.66.0F.WIG 71 /2 ib" , "vl": 1},
{"inst": "vpsrlw W:zmm {kz}, zmm, xmm/m128" , "op": "RVM-M128: EVEX.512.66.0F.WIG D1 /r" , "vl": 0},
{"inst": "vpsrlw W:zmm {kz}, zmm/m512, ib/ub" , "op": "VM-FVM: EVEX.512.66.0F.WIG 71 /2 ib" , "vl": 0},
{"inst": "vpsubb W:xmm {kz}, xmm, xmm/m128" , "op": "RVM-FVM: EVEX.128.66.0F.WIG F8 /r" , "vl": 1},
{"inst": "vpsubb W:ymm {kz}, ymm, ymm/m256" , "op": "RVM-FVM: EVEX.256.66.0F.WIG F8 /r" , "vl": 1},
{"inst": "vpsubb W:zmm {kz}, zmm, zmm/m512" , "op": "RVM-FVM: EVEX.512.66.0F.WIG F8 /r" , "vl": 0},
{"inst": "vpsubsb W:xmm {kz}, xmm, xmm/m128" , "op": "RVM-FVM: EVEX.128.66.0F.WIG E8 /r" , "vl": 1},
{"inst": "vpsubsb W:ymm {kz}, ymm, ymm/m256" , "op": "RVM-FVM: EVEX.256.66.0F.WIG E8 /r" , "vl": 1},
{"inst": "vpsubsb W:zmm {kz}, zmm, zmm/m512" , "op": "RVM-FVM: EVEX.512.66.0F.WIG E8 /r" , "vl": 0},
{"inst": "vpsubsw W:xmm {kz}, xmm, xmm/m128" , "op": "RVM-FVM: EVEX.128.66.0F.WIG E9 /r" , "vl": 1},
{"inst": "vpsubsw W:ymm {kz}, ymm, ymm/m256" , "op": "RVM-FVM: EVEX.256.66.0F.WIG E9 /r" , "vl": 1},
{"inst": "vpsubsw W:zmm {kz}, zmm, zmm/m512" , "op": "RVM-FVM: EVEX.512.66.0F.WIG E9 /r" , "vl": 0},
{"inst": "vpsubusb W:xmm {kz}, xmm, xmm/m128" , "op": "RVM-FVM: EVEX.128.66.0F.WIG D8 /r" , "vl": 1},
{"inst": "vpsubusb W:ymm {kz}, ymm, ymm/m256" , "op": "RVM-FVM: EVEX.256.66.0F.WIG D8 /r" , "vl": 1},
{"inst": "vpsubusb W:zmm {kz}, zmm, zmm/m512" , "op": "RVM-FVM: EVEX.512.66.0F.WIG D8 /r" , "vl": 0},
{"inst": "vpsubusw W:xmm {kz}, xmm, xmm/m128" , "op": "RVM-FVM: EVEX.128.66.0F.WIG D9 /r" , "vl": 1},
{"inst": "vpsubusw W:ymm {kz}, ymm, ymm/m256" , "op": "RVM-FVM: EVEX.256.66.0F.WIG D9 /r" , "vl": 1},
{"inst": "vpsubusw W:zmm {kz}, zmm, zmm/m512" , "op": "RVM-FVM: EVEX.512.66.0F.WIG D9 /r" , "vl": 0},
{"inst": "vpsubw W:xmm {kz}, xmm, xmm/m128" , "op": "RVM-FVM: EVEX.128.66.0F.WIG F9 /r" , "vl": 1},
{"inst": "vpsubw W:ymm {kz}, ymm, ymm/m256" , "op": "RVM-FVM: EVEX.256.66.0F.WIG F9 /r" , "vl": 1},
{"inst": "vpsubw W:zmm {kz}, zmm, zmm/m512" , "op": "RVM-FVM: EVEX.512.66.0F.WIG F9 /r" , "vl": 0},
{"inst": "vptestmb W:k {k}, xmm, xmm/m128" , "op": "RVM-FVM: EVEX.128.66.0F38.W0 26 /r" , "vl": 1, "k": "zeroing"},
{"inst": "vptestmb W:k {k}, ymm, ymm/m256" , "op": "RVM-FVM: EVEX.256.66.0F38.W0 26 /r" , "vl": 1, "k": "zeroing"},
{"inst": "vptestmb W:k {k}, zmm, zmm/m512" , "op": "RVM-FVM: EVEX.512.66.0F38.W0 26 /r" , "vl": 0, "k": "zeroing"},
{"inst": "vptestmw W:k {k}, xmm, xmm/m128" , "op": "RVM-FVM: EVEX.128.66.0F38.W1 26 /r" , "vl": 1, "k": "zeroing"},
{"inst": "vptestmw W:k {k}, ymm, ymm/m256" , "op": "RVM-FVM: EVEX.256.66.0F38.W1 26 /r" , "vl": 1, "k": "zeroing"},
{"inst": "vptestmw W:k {k}, zmm, zmm/m512" , "op": "RVM-FVM: EVEX.512.66.0F38.W1 26 /r" , "vl": 0, "k": "zeroing"},
{"inst": "vptestnmb W:k {k}, xmm, xmm/m128" , "op": "RVM-FVM: EVEX.128.F3.0F38.W0 26 /r" , "vl": 1, "k": "zeroing"},
{"inst": "vptestnmb W:k {k}, ymm, ymm/m256" , "op": "RVM-FVM: EVEX.256.F3.0F38.W0 26 /r" , "vl": 1, "k": "zeroing"},
{"inst": "vptestnmb W:k {k}, zmm, zmm/m512" , "op": "RVM-FVM: EVEX.512.F3.0F38.W0 26 /r" , "vl": 0, "k": "zeroing"},
{"inst": "vptestnmw W:k {k}, xmm, xmm/m128" , "op": "RVM-FVM: EVEX.128.F3.0F38.W1 26 /r" , "vl": 1, "k": "zeroing"},
{"inst": "vptestnmw W:k {k}, ymm, ymm/m256" , "op": "RVM-FVM: EVEX.256.F3.0F38.W1 26 /r" , "vl": 1, "k": "zeroing"},
{"inst": "vptestnmw W:k {k}, zmm, zmm/m512" , "op": "RVM-FVM: EVEX.512.F3.0F38.W1 26 /r" , "vl": 0, "k": "zeroing"},
{"inst": "vpunpckhbw W:xmm {kz}, xmm, xmm/m128" , "op": "RVM-FVM: EVEX.128.66.0F.WIG 68 /r" , "vl": 1},
{"inst": "vpunpckhbw W:ymm {kz}, ymm, ymm/m256" , "op": "RVM-FVM: EVEX.256.66.0F.WIG 68 /r" , "vl": 1},
{"inst": "vpunpckhbw W:zmm {kz}, zmm, zmm/m512" , "op": "RVM-FVM: EVEX.512.66.0F.WIG 68 /r" , "vl": 0},
{"inst": "vpunpckhwd W:xmm {kz}, xmm, xmm/m128" , "op": "RVM-FVM: EVEX.128.66.0F.WIG 69 /r" , "vl": 1},
{"inst": "vpunpckhwd W:ymm {kz}, ymm, ymm/m256" , "op": "RVM-FVM: EVEX.256.66.0F.WIG 69 /r" , "vl": 1},
{"inst": "vpunpckhwd W:zmm {kz}, zmm, zmm/m512" , "op": "RVM-FVM: EVEX.512.66.0F.WIG 69 /r" , "vl": 0},
{"inst": "vpunpcklbw W:xmm {kz}, xmm, xmm/m128" , "op": "RVM-FVM: EVEX.128.66.0F.WIG 60 /r" , "vl": 1},
{"inst": "vpunpcklbw W:ymm {kz}, ymm, ymm/m256" , "op": "RVM-FVM: EVEX.256.66.0F.WIG 60 /r" , "vl": 1},
{"inst": "vpunpcklbw W:zmm {kz}, zmm, zmm/m512" , "op": "RVM-FVM: EVEX.512.66.0F.WIG 60 /r" , "vl": 0},
{"inst": "vpunpcklwd W:xmm {kz}, xmm, xmm/m128" , "op": "RVM-FVM: EVEX.128.66.0F.WIG 61 /r" , "vl": 1},
{"inst": "vpunpcklwd W:ymm {kz}, ymm, ymm/m256" , "op": "RVM-FVM: EVEX.256.66.0F.WIG 61 /r" , "vl": 1},
{"inst": "vpunpcklwd W:zmm {kz}, zmm, zmm/m512" , "op": "RVM-FVM: EVEX.512.66.0F.WIG 61 /r" , "vl": 0}
]},
{"category": "AVX512 SIMD", "ext": "AVX512_CD", "data": [
{"inst": "vpbroadcastmb2q W:xmm, k" , "op": "RM: EVEX.128.F3.0F38.W1 2A /r" , "vl": 1},
{"inst": "vpbroadcastmb2q W:ymm, k" , "op": "RM: EVEX.256.F3.0F38.W1 2A /r" , "vl": 1},
{"inst": "vpbroadcastmb2q W:zmm, k" , "op": "RM: EVEX.512.F3.0F38.W1 2A /r" , "vl": 0},
{"inst": "vpbroadcastmw2d W:xmm, k" , "op": "RM: EVEX.128.F3.0F38.W0 3A /r" , "vl": 1},
{"inst": "vpbroadcastmw2d W:ymm, k" , "op": "RM: EVEX.256.F3.0F38.W0 3A /r" , "vl": 1},
{"inst": "vpbroadcastmw2d W:zmm, k" , "op": "RM: EVEX.512.F3.0F38.W0 3A /r" , "vl": 0},
{"inst": "vpconflictd W:xmm {kz}, xmm/m128/b32" , "op": "RM-FV: EVEX.128.66.0F38.W0 C4 /r" , "vl": 1},
{"inst": "vpconflictd W:ymm {kz}, ymm/m256/b32" , "op": "RM-FV: EVEX.256.66.0F38.W0 C4 /r" , "vl": 1},
{"inst": "vpconflictd W:zmm {kz}, zmm/m512/b32" , "op": "RM-FV: EVEX.512.66.0F38.W0 C4 /r" , "vl": 0},
{"inst": "vpconflictq W:xmm {kz}, xmm/m128/b32" , "op": "RM-FV: EVEX.128.66.0F38.W1 C4 /r" , "vl": 1},
{"inst": "vpconflictq W:ymm {kz}, ymm/m256/b32" , "op": "RM-FV: EVEX.256.66.0F38.W1 C4 /r" , "vl": 1},
{"inst": "vpconflictq W:zmm {kz}, zmm/m512/b32" , "op": "RM-FV: EVEX.512.66.0F38.W1 C4 /r" , "vl": 0},
{"inst": "vplzcntd W:xmm {kz}, xmm/m128/b32" , "op": "RM-FV: EVEX.128.66.0F38.W0 44 /r" , "vl": 1},
{"inst": "vplzcntd W:ymm {kz}, ymm/m256/b32" , "op": "RM-FV: EVEX.256.66.0F38.W0 44 /r" , "vl": 1},
{"inst": "vplzcntd W:zmm {kz}, zmm/m512/b32" , "op": "RM-FV: EVEX.512.66.0F38.W0 44 /r" , "vl": 0},
{"inst": "vplzcntq W:xmm {kz}, xmm/m128/b64" , "op": "RM-FV: EVEX.128.66.0F38.W1 44 /r" , "vl": 1},
{"inst": "vplzcntq W:ymm {kz}, ymm/m256/b64" , "op": "RM-FV: EVEX.256.66.0F38.W1 44 /r" , "vl": 1},
{"inst": "vplzcntq W:zmm {kz}, zmm/m512/b64" , "op": "RM-FV: EVEX.512.66.0F38.W1 44 /r" , "vl": 0}
]},
{"category": "AVX512 SCALAR", "ext": "AVX512_ER", "data": [
{"inst": "vrcp28sd W:xmm {kz}, xmm[127:64], xmm[63:0]/m64 {sae}" , "op": "RVM-T1S: EVEX.LIG.66.0F38.W1 CB /r"},
{"inst": "vrcp28ss W:xmm {kz}, xmm[127:32], xmm[31:0]/m32 {sae}" , "op": "RVM-T1S: EVEX.LIG.66.0F38.W0 CB /r"},
{"inst": "vrsqrt28sd W:xmm {kz}, xmm[127:64], xmm[63:0]/m64 {sae}" , "op": "RVM-T1S: EVEX.LIG.66.0F38.W1 CD /r"},
{"inst": "vrsqrt28ss W:xmm {kz}, xmm[127:32], xmm[31:0]/m32 {sae}" , "op": "RVM-T1S: EVEX.LIG.66.0F38.W0 CD /r"}
]},
{"category": "AVX512 SIMD", "ext": "AVX512_ER", "data": [
{"inst": "vrcp28pd W:zmm {kz}, zmm/m512/b64 {sae}" , "op": "RM-FV: EVEX.512.66.0F38.W1 CA /r"},
{"inst": "vrcp28ps W:zmm {kz}, zmm/m512/b32 {sae}" , "op": "RM-FV: EVEX.512.66.0F38.W0 CA /r"},
{"inst": "vrsqrt28pd W:zmm {kz}, zmm/m512/b64 {sae}" , "op": "RM-FV: EVEX.512.66.0F38.W1 CC /r"},
{"inst": "vrsqrt28ps W:zmm {kz}, zmm/m512/b32 {sae}" , "op": "RM-FV: EVEX.512.66.0F38.W0 CC /r"},
{"inst": "vexp2pd W:zmm {kz}, zmm/m512/b64 {sae}" , "op": "RM-FV: EVEX.512.66.0F38.W1 C8 /r"},
{"inst": "vexp2ps W:zmm {kz}, zmm/m512/b32 {sae}" , "op": "RM-FV: EVEX.512.66.0F38.W0 C8 /r"}
]},
{"category": "AVX512 SIMD", "ext": "AVX512_PF", "data": [
{"inst": "vgatherpf0dpd R:vm32y {k}" , "op": "M-T1S: EVEX.512.66.0F38.W1 C6 /1"},
{"inst": "vgatherpf0dps R:vm32z {k}" , "op": "M-T1S: EVEX.512.66.0F38.W0 C6 /1"},
{"inst": "vgatherpf0qpd R:vm64z {k}" , "op": "M-T1S: EVEX.512.66.0F38.W1 C7 /1"},
{"inst": "vgatherpf0qps R:vm64z {k}" , "op": "M-T1S: EVEX.512.66.0F38.W0 C7 /1"},
{"inst": "vgatherpf1dpd R:vm32y {k}" , "op": "M-T1S: EVEX.512.66.0F38.W1 C6 /2"},
{"inst": "vgatherpf1dps R:vm32z {k}" , "op": "M-T1S: EVEX.512.66.0F38.W0 C6 /2"},
{"inst": "vgatherpf1qpd R:vm64z {k}" , "op": "M-T1S: EVEX.512.66.0F38.W1 C7 /2"},
{"inst": "vgatherpf1qps R:vm64z {k}" , "op": "M-T1S: EVEX.512.66.0F38.W0 C7 /2"},
{"inst": "vscatterpf0dpd R:vm32y {k}" , "op": "M-T1S: EVEX.512.66.0F38.W1 C6 /5"},
{"inst": "vscatterpf0dps R:vm32z {k}" , "op": "M-T1S: EVEX.512.66.0F38.W0 C6 /5"},
{"inst": "vscatterpf0qpd R:vm64z {k}" , "op": "M-T1S: EVEX.512.66.0F38.W1 C7 /5"},
{"inst": "vscatterpf0qps R:vm64z {k}" , "op": "M-T1S: EVEX.512.66.0F38.W0 C7 /5"},
{"inst": "vscatterpf1dpd R:vm32y {k}" , "op": "M-T1S: EVEX.512.66.0F38.W1 C6 /6"},
{"inst": "vscatterpf1dps R:vm32z {k}" , "op": "M-T1S: EVEX.512.66.0F38.W0 C6 /6"},
{"inst": "vscatterpf1qpd R:vm64z {k}" , "op": "M-T1S: EVEX.512.66.0F38.W1 C7 /6"},
{"inst": "vscatterpf1qps R:vm64z {k}" , "op": "M-T1S: EVEX.512.66.0F38.W0 C7 /6"}
]},
{"category": "AVX512 SIMD", "ext": "AVX512_IFMA", "data": [
{"inst": "vpmadd52luq X:xmm {kz}, ~xmm, ~xmm/m128/b64" , "op": "RVM-FV: EVEX.128.66.0F38.W1 B4 /r" , "vl": 1},
{"inst": "vpmadd52luq X:ymm {kz}, ~ymm, ~ymm/m256/b64" , "op": "RVM-FV: EVEX.256.66.0F38.W1 B4 /r" , "vl": 1},
{"inst": "vpmadd52luq X:zmm {kz}, ~zmm, ~zmm/m512/b64" , "op": "RVM-FV: EVEX.512.66.0F38.W1 B4 /r" , "vl": 0},
{"inst": "vpmadd52huq X:xmm {kz}, ~xmm, ~xmm/m128/b64" , "op": "RVM-FV: EVEX.128.66.0F38.W1 B5 /r" , "vl": 1},
{"inst": "vpmadd52huq X:ymm {kz}, ~ymm, ~ymm/m256/b64" , "op": "RVM-FV: EVEX.256.66.0F38.W1 B5 /r" , "vl": 1},
{"inst": "vpmadd52huq X:zmm {kz}, ~zmm, ~zmm/m512/b64" , "op": "RVM-FV: EVEX.512.66.0F38.W1 B5 /r" , "vl": 0}
]},
{"category": "AVX512 SIMD", "ext": "AVX512_VPOPCNTDQ", "data": [
{"inst": "vpopcntd W:xmm {kz}, xmm/m128/b32" , "op": "RM-FVM: EVEX.128.66.0F38.W0 55 /r" , "vl": 1},
{"inst": "vpopcntd W:ymm {kz}, ymm/m256/b32" , "op": "RM-FVM: EVEX.256.66.0F38.W0 55 /r" , "vl": 1},
{"inst": "vpopcntd W:zmm {kz}, zmm/m512/b32" , "op": "RM-FVM: EVEX.512.66.0F38.W0 55 /r" , "vl": 0},
{"inst": "vpopcntq W:xmm {kz}, xmm/m128/b64" , "op": "RM-FVM: EVEX.128.66.0F38.W1 55 /r" , "vl": 1},
{"inst": "vpopcntq W:ymm {kz}, ymm/m256/b64" , "op": "RM-FVM: EVEX.256.66.0F38.W1 55 /r" , "vl": 1},
{"inst": "vpopcntq W:zmm {kz}, zmm/m512/b64" , "op": "RM-FVM: EVEX.512.66.0F38.W1 55 /r" , "vl": 0}
]},
{"category": "AVX512 SIMD", "ext": "AVX512_VBMI", "data": [
{"inst": "vpermb W:xmm {kz}, xmm, xmm/m128" , "op": "RVM-FVM: EVEX.128.66.0F38.W0 8D /r" , "vl": 1},
{"inst": "vpermb W:ymm {kz}, ymm, ymm/m256" , "op": "RVM-FVM: EVEX.256.66.0F38.W0 8D /r" , "vl": 1},
{"inst": "vpermb W:zmm {kz}, zmm, zmm/m512" , "op": "RVM-FVM: EVEX.512.66.0F38.W0 8D /r" , "vl": 0},
{"inst": "vpermi2b W:xmm {kz}, xmm, xmm/m128" , "op": "RVM-FVM: EVEX.128.66.0F38.W0 75 /r" , "vl": 1},
{"inst": "vpermi2b W:ymm {kz}, ymm, ymm/m256" , "op": "RVM-FVM: EVEX.256.66.0F38.W0 75 /r" , "vl": 1},
{"inst": "vpermi2b W:zmm {kz}, zmm, zmm/m512" , "op": "RVM-FVM: EVEX.512.66.0F38.W0 75 /r" , "vl": 0},
{"inst": "vpermt2b W:xmm {kz}, xmm, xmm/m128" , "op": "RVM-FVM: EVEX.128.66.0F38.W0 7D /r" , "vl": 1},
{"inst": "vpermt2b W:ymm {kz}, ymm, ymm/m256" , "op": "RVM-FVM: EVEX.256.66.0F38.W0 7D /r" , "vl": 1},
{"inst": "vpermt2b W:zmm {kz}, zmm, zmm/m512" , "op": "RVM-FVM: EVEX.512.66.0F38.W0 7D /r" , "vl": 0},
{"inst": "vpmultishiftqb W:xmm {kz}, xmm, xmm/m128/b64" , "op": "RVM-FV: EVEX.128.66.0F38.W1 83 /r" , "vl": 1},
{"inst": "vpmultishiftqb W:ymm {kz}, ymm, ymm/m256/b64" , "op": "RVM-FV: EVEX.256.66.0F38.W1 83 /r" , "vl": 1},
{"inst": "vpmultishiftqb W:zmm {kz}, zmm, zmm/m512/b64" , "op": "RVM-FV: EVEX.512.66.0F38.W1 83 /r" , "vl": 0}
]},
{"category": "AVX512 SIMD", "ext": "AVX512_VBMI2", "data": [
{"inst": "vpcompressb W:xmm/m128 {kz}, xmm" , "op": "RVM-T1S: EVEX.128.66.0F38.W0 63 /r" , "vl": 1},
{"inst": "vpcompressb W:ymm/m256 {kz}, ymm" , "op": "RVM-T1S: EVEX.256.66.0F38.W0 63 /r" , "vl": 1},
{"inst": "vpcompressb W:zmm/m512 {kz}, zmm" , "op": "RVM-T1S: EVEX.512.66.0F38.W0 63 /r" , "vl": 0},
{"inst": "vpcompressw W:xmm/m128 {kz}, xmm" , "op": "RVM-T1S: EVEX.128.66.0F38.W1 63 /r" , "vl": 1},
{"inst": "vpcompressw W:ymm/m256 {kz}, ymm" , "op": "RVM-T1S: EVEX.256.66.0F38.W1 63 /r" , "vl": 1},
{"inst": "vpcompressw W:zmm/m512 {kz}, zmm" , "op": "RVM-T1S: EVEX.512.66.0F38.W1 63 /r" , "vl": 0},
{"inst": "vpexpandb W:xmm {kz}, xmm/m128" , "op": "RM-FVM: EVEX.128.66.0F38.W0 62 /r" , "vl": 1},
{"inst": "vpexpandb W:ymm {kz}, ymm/m256" , "op": "RM-FVM: EVEX.256.66.0F38.W0 62 /r" , "vl": 1},
{"inst": "vpexpandb W:zmm {kz}, zmm/m512" , "op": "RM-FVM: EVEX.512.66.0F38.W0 62 /r" , "vl": 0},
{"inst": "vpexpandw W:xmm {kz}, xmm/m128" , "op": "RM-FVM: EVEX.128.66.0F38.W1 62 /r" , "vl": 1},
{"inst": "vpexpandw W:ymm {kz}, ymm/m256" , "op": "RM-FVM: EVEX.256.66.0F38.W1 62 /r" , "vl": 1},
{"inst": "vpexpandw W:zmm {kz}, zmm/m512" , "op": "RM-FVM: EVEX.512.66.0F38.W1 62 /r" , "vl": 0},
{"inst": "vpshldd W:xmm {kz}, xmm, xmm/m128/b32, ib/ub" , "op": "RVM-FVM: EVEX.128.66.0F3A.W0 71 /r ib" , "vl": 1},
{"inst": "vpshldd W:ymm {kz}, ymm, ymm/m256/b32, ib/ub" , "op": "RVM-FVM: EVEX.256.66.0F3A.W0 71 /r ib" , "vl": 1},
{"inst": "vpshldd W:zmm {kz}, zmm, zmm/m512/b32, ib/ub" , "op": "RVM-FVM: EVEX.512.66.0F3A.W0 71 /r ib" , "vl": 0},
{"inst": "vpshldq W:xmm {kz}, xmm, xmm/m128/b64, ib/ub" , "op": "RVM-FVM: EVEX.128.66.0F3A.W1 71 /r ib" , "vl": 1},
{"inst": "vpshldq W:ymm {kz}, ymm, ymm/m256/b64, ib/ub" , "op": "RVM-FVM: EVEX.256.66.0F3A.W1 71 /r ib" , "vl": 1},
{"inst": "vpshldq W:zmm {kz}, zmm, zmm/m512/b64, ib/ub" , "op": "RVM-FVM: EVEX.512.66.0F3A.W1 71 /r ib" , "vl": 0},
{"inst": "vpshldvd X:xmm {kz}, xmm, xmm/m128/b32" , "op": "RVM-FVM: EVEX.128.66.0F38.W0 71 /r" , "vl": 1},
{"inst": "vpshldvd X:ymm {kz}, ymm, ymm/m256/b32" , "op": "RVM-FVM: EVEX.256.66.0F38.W0 71 /r" , "vl": 1},
{"inst": "vpshldvd X:zmm {kz}, zmm, zmm/m512/b32" , "op": "RVM-FVM: EVEX.512.66.0F38.W0 71 /r" , "vl": 0},
{"inst": "vpshldvq X:xmm {kz}, xmm, xmm/m128/b64" , "op": "RVM-FVM: EVEX.128.66.0F38.W1 71 /r" , "vl": 1},
{"inst": "vpshldvq X:ymm {kz}, ymm, ymm/m256/b64" , "op": "RVM-FVM: EVEX.256.66.0F38.W1 71 /r" , "vl": 1},
{"inst": "vpshldvq X:zmm {kz}, zmm, zmm/m512/b64" , "op": "RVM-FVM: EVEX.512.66.0F38.W1 71 /r" , "vl": 0},
{"inst": "vpshldvw X:xmm {kz}, xmm, xmm/m128" , "op": "RVM-FV: EVEX.128.66.0F38.W1 70 /r" , "vl": 1},
{"inst": "vpshldvw X:ymm {kz}, ymm, ymm/m256" , "op": "RVM-FV: EVEX.256.66.0F38.W1 70 /r" , "vl": 1},
{"inst": "vpshldvw X:zmm {kz}, zmm, zmm/m512" , "op": "RVM-FV: EVEX.512.66.0F38.W1 70 /r" , "vl": 0},
{"inst": "vpshldw W:xmm {kz}, xmm, xmm/m128, ib/ub" , "op": "RVM-FV: EVEX.128.66.0F3A.W1 70 /r ib" , "vl": 1},
{"inst": "vpshldw W:ymm {kz}, ymm, ymm/m256, ib/ub" , "op": "RVM-FV: EVEX.256.66.0F3A.W1 70 /r ib" , "vl": 1},
{"inst": "vpshldw W:zmm {kz}, zmm, zmm/m512, ib/ub" , "op": "RVM-FV: EVEX.512.66.0F3A.W1 70 /r ib" , "vl": 0},
{"inst": "vpshrdd W:xmm {kz}, xmm, xmm/m128/b32, ib/ub" , "op": "RVM-FVM: EVEX.128.66.0F3A.W0 73 /r ib" , "vl": 1},
{"inst": "vpshrdd W:ymm {kz}, ymm, ymm/m256/b32, ib/ub" , "op": "RVM-FVM: EVEX.256.66.0F3A.W0 73 /r ib" , "vl": 1},
{"inst": "vpshrdd W:zmm {kz}, zmm, zmm/m512/b32, ib/ub" , "op": "RVM-FVM: EVEX.512.66.0F3A.W0 73 /r ib" , "vl": 0},
{"inst": "vpshrdq W:xmm {kz}, xmm, xmm/m128/b64, ib/ub" , "op": "RVM-FVM: EVEX.128.66.0F3A.W1 73 /r ib" , "vl": 1},
{"inst": "vpshrdq W:ymm {kz}, ymm, ymm/m256/b64, ib/ub" , "op": "RVM-FVM: EVEX.256.66.0F3A.W1 73 /r ib" , "vl": 1},
{"inst": "vpshrdq W:zmm {kz}, zmm, zmm/m512/b64, ib/ub" , "op": "RVM-FVM: EVEX.512.66.0F3A.W1 73 /r ib" , "vl": 0},
{"inst": "vpshrdvd X:xmm {kz}, xmm, xmm/m128/b32" , "op": "RVM-FVM: EVEX.128.66.0F38.W0 73 /r" , "vl": 1},
{"inst": "vpshrdvd X:ymm {kz}, ymm, ymm/m256/b32" , "op": "RVM-FVM: EVEX.256.66.0F38.W0 73 /r" , "vl": 1},
{"inst": "vpshrdvd X:zmm {kz}, zmm, zmm/m512/b32" , "op": "RVM-FVM: EVEX.512.66.0F38.W0 73 /r" , "vl": 0},
{"inst": "vpshrdvq X:xmm {kz}, xmm, xmm/m128/b64" , "op": "RVM-FVM: EVEX.128.66.0F38.W1 73 /r" , "vl": 1},
{"inst": "vpshrdvq X:ymm {kz}, ymm, ymm/m256/b64" , "op": "RVM-FVM: EVEX.256.66.0F38.W1 73 /r" , "vl": 1},
{"inst": "vpshrdvq X:zmm {kz}, zmm, zmm/m512/b64" , "op": "RVM-FVM: EVEX.512.66.0F38.W1 73 /r" , "vl": 0},
{"inst": "vpshrdvw X:xmm {kz}, xmm, xmm/m128" , "op": "RVM-FV: EVEX.128.66.0F38.W1 72 /r" , "vl": 1},
{"inst": "vpshrdvw X:ymm {kz}, ymm, ymm/m256" , "op": "RVM-FV: EVEX.256.66.0F38.W1 72 /r" , "vl": 1},
{"inst": "vpshrdvw X:zmm {kz}, zmm, zmm/m512" , "op": "RVM-FV: EVEX.512.66.0F38.W1 72 /r" , "vl": 0},
{"inst": "vpshrdw W:xmm {kz}, xmm, xmm/m128, ib/ub" , "op": "RVM-FV: EVEX.128.66.0F3A.W1 72 /r ib" , "vl": 1},
{"inst": "vpshrdw W:ymm {kz}, ymm, ymm/m256, ib/ub" , "op": "RVM-FV: EVEX.256.66.0F3A.W1 72 /r ib" , "vl": 1},
{"inst": "vpshrdw W:zmm {kz}, zmm, zmm/m512, ib/ub" , "op": "RVM-FV: EVEX.512.66.0F3A.W1 72 /r ib" , "vl": 0}
]},
{"category": "AVX512 SIMD", "ext": "AVX512_4FMAPS", "data": [
{"inst": "v4fmaddps X:zmm {kz}, zmm, zmm+1, zmm+2, zmm+3, m128" , "op": "RM-T1_4X: EVEX.512.F2.0F38.W0 9A /r" , "vl": 0},
{"inst": "v4fmaddss X:xmm {kz}, xmm, xmm+1, xmm+2, xmm+3, m128" , "op": "RM-T1_4X: EVEX.LIG.F2.0F38.W0 9B /r" , "vl": 0},
{"inst": "v4fnmaddps X:zmm {kz}, zmm, zmm+1, zmm+2, zmm+3, m128" , "op": "RM-T1_4X: EVEX.512.F2.0F38.W0 AA /r" , "vl": 0},
{"inst": "v4fnmaddss X:xmm {kz}, xmm, xmm+1, xmm+2, xmm+3, m128" , "op": "RM-T1_4X: EVEX.LIG.F2.0F38.W0 AB /r" , "vl": 0}
]},
{"category": "AVX512 SIMD", "ext": "AVX512_4VNNIW", "data": [
{"inst": "vp4dpwssd W:zmm {kz}, zmm, zmm+1, zmm+2, zmm+3, m128" , "op": "RM-T1_4X: EVEX.512.F2.0F38.W0 52 /r" , "vl": 0},
{"inst": "vp4dpwssds W:zmm {kz}, zmm, zmm+1, zmm+2, zmm+3, m128" , "op": "RM-T1_4X: EVEX.512.F2.0F38.W0 53 /r" , "vl": 0}
]},
{"category": "AVX512 SIMD", "ext": "AVX512_VNNI", "data": [
{"inst": "vpdpbusd X:xmm {kz}, xmm, xmm/m128/b32" , "op": "RVM-FV: EVEX.128.66.0F38.W0 50 /r" , "vl": 1},
{"inst": "vpdpbusd X:ymm {kz}, ymm, ymm/m256/b32" , "op": "RVM-FV: EVEX.256.66.0F38.W0 50 /r" , "vl": 1},
{"inst": "vpdpbusd X:zmm {kz}, zmm, zmm/m512/b32" , "op": "RVM-FV: EVEX.512.66.0F38.W0 50 /r" , "vl": 0},
{"inst": "vpdpbusds X:xmm {kz}, xmm, xmm/m128/b32" , "op": "RVM-FV: EVEX.128.66.0F38.W0 51 /r" , "vl": 1},
{"inst": "vpdpbusds X:ymm {kz}, ymm, ymm/m256/b32" , "op": "RVM-FV: EVEX.256.66.0F38.W0 51 /r" , "vl": 1},
{"inst": "vpdpbusds X:zmm {kz}, zmm, zmm/m512/b32" , "op": "RVM-FV: EVEX.512.66.0F38.W0 51 /r" , "vl": 0},
{"inst": "vpdpwssd X:xmm {kz}, xmm, xmm/m128/b32" , "op": "RVM-FV: EVEX.128.66.0F38.W0 52 /r" , "vl": 1},
{"inst": "vpdpwssd X:ymm {kz}, ymm, ymm/m256/b32" , "op": "RVM-FV: EVEX.256.66.0F38.W0 52 /r" , "vl": 1},
{"inst": "vpdpwssd X:zmm {kz}, zmm, zmm/m512/b32" , "op": "RVM-FV: EVEX.512.66.0F38.W0 52 /r" , "vl": 0},
{"inst": "vpdpwssds X:xmm {kz}, xmm, xmm/m128/b32" , "op": "RVM-FV: EVEX.128.66.0F38.W0 53 /r" , "vl": 1},
{"inst": "vpdpwssds X:ymm {kz}, ymm, ymm/m256/b32" , "op": "RVM-FV: EVEX.256.66.0F38.W0 53 /r" , "vl": 1},
{"inst": "vpdpwssds X:zmm {kz}, zmm, zmm/m512/b32" , "op": "RVM-FV: EVEX.512.66.0F38.W0 53 /r" , "vl": 0}
]},
{"category": "AVX512 SIMD", "ext": "AVX512_BITALG", "data": [
{"inst": "vpopcntb W:xmm {kz}, xmm/m128" , "op": "RM-FVM: EVEX.128.66.0F38.W0 54 /r" , "vl": 1},
{"inst": "vpopcntb W:ymm {kz}, ymm/m256" , "op": "RM-FVM: EVEX.256.66.0F38.W0 54 /r" , "vl": 1},
{"inst": "vpopcntb W:zmm {kz}, zmm/m512" , "op": "RM-FVM: EVEX.512.66.0F38.W0 54 /r" , "vl": 0},
{"inst": "vpopcntw W:xmm {kz}, xmm/m128" , "op": "RM-FVM: EVEX.128.66.0F38.W1 54 /r" , "vl": 1},
{"inst": "vpopcntw W:ymm {kz}, ymm/m256" , "op": "RM-FVM: EVEX.256.66.0F38.W1 54 /r" , "vl": 1},
{"inst": "vpopcntw W:zmm {kz}, zmm/m512" , "op": "RM-FVM: EVEX.512.66.0F38.W1 54 /r" , "vl": 0},
{"inst": "vpshufbitqmb W:k {k}, xmm, xmm/m128" , "op": "RM-FVM: EVEX.128.66.0F38.W0 8F /r" , "vl": 1, "k": "zeroing"},
{"inst": "vpshufbitqmb W:k {k}, ymm, ymm/m256" , "op": "RM-FVM: EVEX.256.66.0F38.W0 8F /r" , "vl": 1, "k": "zeroing"},
{"inst": "vpshufbitqmb W:k {k}, zmm, zmm/m512" , "op": "RM-FVM: EVEX.512.66.0F38.W0 8F /r" , "vl": 0, "k": "zeroing"}
]},
{"category": "AVX512 SIMD", "ext": "AVX512_VP2INTERSECT", "data": [
{"inst": "vp2intersectd W:k, W:k+1, xmm, xmm/m128/b32" , "op": "RVM: EVEX.128.F2.0F38.W0 68 /r" , "vl": 1},
{"inst": "vp2intersectd W:k, W:k+1, ymm, ymm/m256/b32" , "op": "RVM: EVEX.256.F2.0F38.W0 68 /r" , "vl": 1},
{"inst": "vp2intersectd W:k, W:k+1, zmm, zmm/m512/b32" , "op": "RVM: EVEX.512.F2.0F38.W0 68 /r" , "vl": 0},
{"inst": "vp2intersectq W:k, W:k+1, xmm, xmm/m128/b64" , "op": "RVM: EVEX.128.F2.0F38.W1 68 /r" , "vl": 1},
{"inst": "vp2intersectq W:k, W:k+1, ymm, ymm/m256/b64" , "op": "RVM: EVEX.256.F2.0F38.W1 68 /r" , "vl": 1},
{"inst": "vp2intersectq W:k, W:k+1, zmm, zmm/m512/b64" , "op": "RVM: EVEX.512.F2.0F38.W1 68 /r" , "vl": 0}
]},
{"category": "AVX512 SIMD", "ext": "AVX512_BF16", "data": [
{"inst": "vcvtne2ps2bf16 W:xmm {kz}, xmm, xmm/m128/b32" , "op": "RVM-FV: EVEX.128.F2.0F38.W0 72 /r" , "vl": 1},
{"inst": "vcvtne2ps2bf16 W:ymm {kz}, ymm, ymm/m256/b32" , "op": "RVM-FV: EVEX.256.F2.0F38.W0 72 /r" , "vl": 1},
{"inst": "vcvtne2ps2bf16 W:zmm {kz}, zmm, zmm/m512/b32" , "op": "RVM-FV: EVEX.512.F2.0F38.W0 72 /r" , "vl": 0},
{"inst": "vcvtneps2bf16 W:xmm {kz}, xmm/m128/b32" , "op": "RM-FV: EVEX.128.F3.0F38.W0 72 /r" , "vl": 1},
{"inst": "vcvtneps2bf16 W:xmm {kz}, ymm/m256/b32" , "op": "RM-FV: EVEX.256.F3.0F38.W0 72 /r" , "vl": 1},
{"inst": "vcvtneps2bf16 W:ymm {kz}, zmm/m512/b32" , "op": "RM-FV: EVEX.512.F3.0F38.W0 72 /r" , "vl": 0},
{"inst": "vdpbf16ps W:xmm {kz}, xmm, xmm/m128/b32" , "op": "RVM-FV: EVEX.128.F3.0F38.W0 52 /r" , "vl": 1},
{"inst": "vdpbf16ps W:ymm {kz}, ymm, ymm/m256/b32" , "op": "RVM-FV: EVEX.256.F3.0F38.W0 52 /r" , "vl": 1},
{"inst": "vdpbf16ps W:zmm {kz}, zmm, zmm/m512/b32" , "op": "RVM-FV: EVEX.512.F3.0F38.W0 52 /r" , "vl": 0}
]},
{"category": "AVX512 SCALAR", "ext": "AVX512_FP16", "data": [
{"inst": "vaddsh W:xmm {kz}, xmm, xmm[15:0]/m16 {er}" , "op": "RVM-T1S: EVEX.LIG.F3.MAP5.W0 58 /r" , "vl": 0},
{"inst": "vcmpsh W:k {k}, xmm[15:0], xmm[15:0]/m16, ib/ub {sae}" , "op": "RVM-T1S: EVEX.LIG.F3.0F3A.W0 C2 /r ib" , "vl": 0, "k": "zeroing"},
{"inst": "vcomish R:xmm[15:0], xmm[15:0]/m16 {sae}" , "op": "RM-T1S: EVEX.LIG.NP.MAP5.W0 2F /r" , "vl": 0, "io": "OF=0 SF=0 ZF=W AF=0 PF=W CF=W"},
{"inst": "vcvtsd2sh W:xmm {kz}, xmm, xmm/m64 {er}" , "op": "RVM-T1S: EVEX.LIG.F2.MAP5.W1 5A /r" , "vl": 0},
{"inst": "vcvtsh2sd W:xmm {kz}, xmm, xmm/m16 {sae}" , "op": "RVM-T1S: EVEX.LIG.F3.MAP5.W0 5A /r" , "vl": 0},
{"inst": "vcvtsh2si W:r32, xmm/m16 {er}" , "op": "RM-T1S: EVEX.LIG.F3.MAP5.W0 2D /r" , "vl": 0},
{"inst": "vcvtsh2si W:r64, xmm/m16 {er}" , "op": "RM-T1S: EVEX.LIG.F3.MAP5.W1 2D /r" , "vl": 0},
{"inst": "vcvtsh2ss W:xmm {kz}, xmm, xmm/m16 {sae}" , "op": "RVM-T1S: EVEX.LIG.NP.MAP6.W0 13 /r" , "vl": 0},
{"inst": "vcvtsh2usi W:r32, xmm/m16 {er}" , "op": "RM-T1S: EVEX.LIG.F3.MAP5.W0 79 /r" , "vl": 0},
{"inst": "vcvtsh2usi W:r64, xmm/m16 {er}" , "op": "RM-T1S: EVEX.LIG.F3.MAP5.W1 79 /r" , "vl": 0},
{"inst": "vcvtsi2sh W:xmm, xmm, r32/m32 {er}" , "op": "RVM-T1S: EVEX.LIG.F3.MAP5.W0 2A /r" , "vl": 0},
{"inst": "vcvtsi2sh W:xmm, xmm, r64/m64 {er}" , "op": "RVM-T1S: EVEX.LIG.F3.MAP5.W1 2A /r" , "vl": 0},
{"inst": "vcvtss2sh W:xmm {kz}, xmm, xmm/m32 {er}" , "op": "RVM-T1S: EVEX.LIG.NP.MAP5.W0 1D /r" , "vl": 0},
{"inst": "vcvttsh2si W:r32, xmm/m16 {sae}" , "op": "RM-T1S: EVEX.LIG.F3.MAP5.W0 2C /r" , "vl": 0},
{"inst": "vcvttsh2si W:r64, xmm/m16 {sae}" , "op": "RM-T1S: EVEX.LIG.F3.MAP5.W1 2C /r" , "vl": 0},
{"inst": "vcvttsh2usi W:r32, xmm/m16 {sae}" , "op": "RM-T1S: EVEX.LIG.F3.MAP5.W0 78 /r" , "vl": 0},
{"inst": "vcvttsh2usi W:r64, xmm/m16 {sae}" , "op": "RM-T1S: EVEX.LIG.F3.MAP5.W1 78 /r" , "vl": 0},
{"inst": "vcvtusi2sh W:xmm, xmm, r32/m32 {er}" , "op": "RVM-T1S: EVEX.LIG.F3.MAP5.W0 7B /r" , "vl": 0},
{"inst": "vcvtusi2sh W:xmm, xmm, r64/m64 {er}" , "op": "RVM-T1S: EVEX.LIG.F3.MAP5.W1 7B /r" , "vl": 0},
{"inst": "vdivsh W:xmm {kz}, xmm, xmm/m16 {er}" , "op": "RVM-T1S: EVEX.LIG.F3.MAP5.W0 5E /r" , "vl": 0},
{"inst": "vfmadd132sh X:xmm {kz}, xmm, xmm/m16 {er}" , "op": "RVM-T1S: EVEX.LIG.66.MAP6.W0 99 /r" , "vl": 0},
{"inst": "vfmadd213sh X:xmm {kz}, xmm, xmm/m16 {er}" , "op": "RVM-T1S: EVEX.LIG.66.MAP6.W0 A9 /r" , "vl": 0},
{"inst": "vfmadd231sh X:xmm {kz}, xmm, xmm/m16 {er}" , "op": "RVM-T1S: EVEX.LIG.66.MAP6.W0 B9 /r" , "vl": 0},
{"inst": "vfmsub132sh X:xmm {kz}, xmm, xmm[15:0]/m16 {er}" , "op": "RVM-T1S: EVEX.LIG.66.MAP6.W0 9B /r" , "vl": 0},
{"inst": "vfmsub213sh X:xmm {kz}, xmm, xmm[15:0]/m16 {er}" , "op": "RVM-T1S: EVEX.LIG.66.MAP6.W0 AB /r" , "vl": 0},
{"inst": "vfmsub231sh X:xmm {kz}, xmm, xmm[15:0]/m16 {er}" , "op": "RVM-T1S: EVEX.LIG.66.MAP6.W0 BB /r" , "vl": 0},
{"inst": "vfnmadd132sh X:xmm {kz}, xmm, xmm/m16 {er}" , "op": "RVM-T1S: EVEX.LIG.66.MAP6.W0 9D /r" , "vl": 0},
{"inst": "vfnmadd213sh X:xmm {kz}, xmm, xmm/m16 {er}" , "op": "RVM-T1S: EVEX.LIG.66.MAP6.W0 AD /r" , "vl": 0},
{"inst": "vfnmadd231sh X:xmm {kz}, xmm, xmm/m16 {er}" , "op": "RVM-T1S: EVEX.LIG.66.MAP6.W0 BD /r" , "vl": 0},
{"inst": "vfnmsub132sh X:xmm {kz}, xmm, xmm[15:0]/m16 {er}" , "op": "RVM-T1S: EVEX.LIG.66.MAP6.W0 9F /r" , "vl": 0},
{"inst": "vfnmsub213sh X:xmm {kz}, xmm, xmm[15:0]/m16 {er}" , "op": "RVM-T1S: EVEX.LIG.66.MAP6.W0 AF /r" , "vl": 0},
{"inst": "vfnmsub231sh X:xmm {kz}, xmm, xmm[15:0]/m16 {er}" , "op": "RVM-T1S: EVEX.LIG.66.MAP6.W0 BF /r" , "vl": 0},
{"inst": "vfpclasssh W:k {k}, xmm[15:0]/m16, ib/ub" , "op": "RM-T1S: EVEX.LIG.NP.0F3A.W0 67 /r ib" , "vl": 0},
{"inst": "vgetexpsh W:xmm {kz}, xmm[127:16], xmm[15:0]/m16 {sae}" , "op": "RM-T1S: EVEX.LIG.66.MAP6.W0 43 /r" , "vl": 0},
{"inst": "vgetmantsh W:xmm {kz},xmm[127:16],xmm[15:0]/m16,ib/ub {sae}", "op": "RM-T1S: EVEX.LIG.NP.0F3A.W0 27 /r ib" , "vl": 0},
{"inst": "vmaxsh W:xmm {kz}, xmm, xmm[15:0]/m16 {sae}" , "op": "RVM-T1S: EVEX.LIG.F3.MAP5.W0 5F /r" , "vl": 0},
{"inst": "vminsh W:xmm {kz}, xmm, xmm[15:0]/m16 {sae}" , "op": "RVM-T1S: EVEX.LIG.F3.MAP5.W0 5D /r" , "vl": 0},
{"inst": "vmovsh W:m16, xmm[15:0]" , "op": "MR-T1S: EVEX.LIG.F3.MAP5.W0 11 /r" , "vl": 0},
{"inst": "vmovsh W:xmm[15:0] {kz}, m16" , "op": "RM-T1S: EVEX.LIG.F3.MAP5.W0 10 /r" , "vl": 0},
{"inst": "vmovsh W:xmm {kz}, xmm[127:16], xmm[15:0]" , "op": "MVR: EVEX.LIG.F3.MAP5.W0 11 /r" , "vl": 0},
{"inst": "vmovsh W:xmm {kz}, xmm[127:16], xmm[15:0]" , "op": "RVM: EVEX.LIG.F3.MAP5.W0 10 /r" , "vl": 0},
{"inst": "vmulsh W:xmm {kz}, xmm, xmm[15:0]/m16 {er}" , "op": "RVM-T1S: EVEX.LIG.F3.MAP5.W0 59 /r" , "vl": 0},
{"inst": "vrcpsh W:xmm {kz}, xmm[127:16], xmm[15:0]/m16" , "op": "RVM-T1S: EVEX.LIG.66.MAP6.W0 4D /r" , "vl": 0},
{"inst": "vreducesh W:xmm {kz},xmm[127:16],xmm[15:0]/m16,ib/ub {sae}" , "op": "RVM-T1S: EVEX.LIG.NP.0F3A.W0 57 /r ib" , "vl": 0},
{"inst": "vrndscalesh W:xmm {kz},xmm[127:16],xmm[15:0]/m16,ib/ub {sae}","op": "RVM-T1S: EVEX.LIG.NP.0F3A.W0 0A /r ib" , "vl": 0},
{"inst": "vrsqrtsh W:xmm {kz}, xmm[127:16], xmm[15:0]/m16" , "op": "RVM-T1S: EVEX.LIG.66.MAP6.W0 4F /r" , "vl": 0},
{"inst": "vscalefsh W:xmm {kz}, xmm, xmm[15:0]/m16 {er}" , "op": "RVM-T1S: EVEX.LIG.66.MAP6.W0 2D /r" , "vl": 0},
{"inst": "vsqrtsh W:xmm {kz}, xmm[127:16], xmm[15:0]/m16 {er}" , "op": "RVM-T1S: EVEX.LIG.F3.MAP5.W0 51 /r" , "vl": 0},
{"inst": "vsubsh W:xmm {kz}, xmm, xmm[15:0]/m16 {er}" , "op": "RVM-T1S: EVEX.LIG.F3.MAP5.W0 5C /r" , "vl": 0},
{"inst": "vucomish R:xmm[15:0], xmm[15:0]/m16 {sae}" , "op": "RM-T1S: EVEX.LIG.NP.MAP5.W0 2E /r" , "vl": 0, "io": "OF=0 SF=0 ZF=W AF=0 PF=W CF=W"},
{"inst": "vfcmaddcsh X:xmm {kz}, xmm, xmm/m32 {er}" , "op": "RVM-T1S: EVEX.LIG.F2.MAP6.W0 57 /r" , "vl": 0},
{"inst": "vfcmulcsh X:xmm {kz}, xmm, xmm/m32 {er}" , "op": "RVM-T1S: EVEX.LIG.F2.MAP6.W0 D7 /r" , "vl": 0},
{"inst": "vfmaddcsh X:xmm {kz}, xmm, xmm/m32 {er}" , "op": "RVM-T1S: EVEX.LIG.F3.MAP6.W0 57 /r" , "vl": 0}
]},
{"category": "AVX512 SIMD", "ext": "AVX512_FP16", "data": [
{"inst": "vaddph W:xmm {kz}, ~xmm, ~xmm/m128/b16" , "op": "RVM-FV: EVEX.128.NP.MAP5.W0 58 /r" , "vl": 1},
{"inst": "vaddph W:ymm {kz}, ~ymm, ~ymm/m256/b16" , "op": "RVM-FV: EVEX.256.NP.MAP5.W0 58 /r" , "vl": 1},
{"inst": "vaddph W:zmm {kz}, ~zmm, ~zmm/m512/b16 {er}" , "op": "RVM-FV: EVEX.512.NP.MAP5.W0 58 /r" , "vl": 0},
{"inst": "vcmpph W:k {k}, xmm, xmm/m128/b16, ib/ub" , "op": "RVM-FV: EVEX.128.NP.0F3A.W0 C2 /r ib" , "vl": 1, "k": "zeroing"},
{"inst": "vcmpph W:k {k}, ymm, ymm/m256/b16, ib/ub" , "op": "RVM-FV: EVEX.256.NP.0F3A.W0 C2 /r ib" , "vl": 1, "k": "zeroing"},
{"inst": "vcmpph W:k {k}, zmm, zmm/m512/b16, ib/ub {sae}" , "op": "RVM-FV: EVEX.512.NP.0F3A.W0 C2 /r ib" , "vl": 0, "k": "zeroing"},
{"inst": "vcvtdq2ph W:xmm {kz}, xmm/m128/b32" , "op": "RM-FV: EVEX.128.NP.MAP5.W0 5B /r" , "vl": 1},
{"inst": "vcvtdq2ph W:xmm {kz}, ymm/m256/b32" , "op": "RM-FV: EVEX.256.NP.MAP5.W0 5B /r" , "vl": 1},
{"inst": "vcvtdq2ph W:ymm {kz}, zmm/m512/b32 {er}" , "op": "RM-FV: EVEX.512.NP.MAP5.W0 5B /r" , "vl": 0},
{"inst": "vcvtpd2ph W:xmm {kz}, xmm/m128/b64" , "op": "RM-FV: EVEX.128.66.MAP5.W1 5A /r" , "vl": 1},
{"inst": "vcvtpd2ph W:xmm {kz}, ymm/m256/b64" , "op": "RM-FV: EVEX.256.66.MAP5.W1 5A /r" , "vl": 1},
{"inst": "vcvtpd2ph W:xmm {kz}, zmm/m512/b64 {er}" , "op": "RM-FV: EVEX.512.66.MAP5.W1 5A /r" , "vl": 0},
{"inst": "vcvtph2dq W:xmm {kz}, xmm/m64/b16" , "op": "RM-HV: EVEX.128.66.MAP5.W0 5B /r" , "vl": 1},
{"inst": "vcvtph2dq W:ymm {kz}, xmm/m128/b16" , "op": "RM-HV: EVEX.256.66.MAP5.W0 5B /r" , "vl": 1},
{"inst": "vcvtph2dq W:zmm {kz}, ymm/m256/b16 {er}" , "op": "RM-HV: EVEX.512.66.MAP5.W0 5B /r" , "vl": 0},
{"inst": "vcvtph2pd W:xmm {kz}, xmm/m32/b16" , "op": "RM-QV: EVEX.128.NP.MAP5.W0 5A /r" , "vl": 1},
{"inst": "vcvtph2pd W:ymm {kz}, xmm/m64/b16" , "op": "RM-QV: EVEX.256.NP.MAP5.W0 5A /r" , "vl": 1},
{"inst": "vcvtph2pd W:zmm {kz}, xmm/m128/b16 {sae}" , "op": "RM-QV: EVEX.512.NP.MAP5.W0 5A /r" , "vl": 0},
{"inst": "vcvtph2psx W:xmm {kz}, xmm/m64/b16" , "op": "RM-HV: EVEX.128.66.MAP6.W0 13 /r" , "vl": 1},
{"inst": "vcvtph2psx W:ymm {kz}, xmm/m128/b16" , "op": "RM-HV: EVEX.256.66.MAP6.W0 13 /r" , "vl": 1},
{"inst": "vcvtph2psx W:zmm {kz}, ymm/m256/b16 {sae}" , "op": "RM-HV: EVEX.512.66.MAP6.W0 13 /r" , "vl": 0},
{"inst": "vcvtph2qq W:xmm {kz}, xmm/m32/b16" , "op": "RM-QV: EVEX.128.66.MAP5.W0 7B /r" , "vl": 1},
{"inst": "vcvtph2qq W:ymm {kz}, xmm/m64/b16" , "op": "RM-QV: EVEX.256.66.MAP5.W0 7B /r" , "vl": 1},
{"inst": "vcvtph2qq W:zmm {kz}, xmm/m128/b16 {er}" , "op": "RM-QV: EVEX.512.66.MAP5.W0 7B /r" , "vl": 0},
{"inst": "vcvtph2udq W:xmm {kz}, xmm/m64/b16" , "op": "RM-HV: EVEX.128.NP.MAP5.W0 79 /r" , "vl": 1},
{"inst": "vcvtph2udq W:ymm {kz}, xmm/m128/b16" , "op": "RM-HV: EVEX.256.NP.MAP5.W0 79 /r" , "vl": 1},
{"inst": "vcvtph2udq W:zmm {kz}, ymm/m256/b16 {er}" , "op": "RM-HV: EVEX.512.NP.MAP5.W0 79 /r" , "vl": 0},
{"inst": "vcvtph2uqq W:xmm {kz}, xmm/m32/b16" , "op": "RM-QV: EVEX.128.66.MAP5.W0 79 /r" , "vl": 1},
{"inst": "vcvtph2uqq W:ymm {kz}, xmm/m64/b16" , "op": "RM-QV: EVEX.256.66.MAP5.W0 79 /r" , "vl": 1},
{"inst": "vcvtph2uqq W:zmm {kz}, xmm/m128/b16 {er}" , "op": "RM-QV: EVEX.512.66.MAP5.W0 79 /r" , "vl": 0},
{"inst": "vcvtph2uw W:xmm {kz}, xmm/m128/b16" , "op": "RM-FV: EVEX.128.NP.MAP5.W0 7D /r" , "vl": 1},
{"inst": "vcvtph2uw W:ymm {kz}, ymm/m256/b16" , "op": "RM-FV: EVEX.256.NP.MAP5.W0 7D /r" , "vl": 1},
{"inst": "vcvtph2uw W:zmm {kz}, zmm/m512/b16 {er}" , "op": "RM-FV: EVEX.512.NP.MAP5.W0 7D /r" , "vl": 0},
{"inst": "vcvtph2w W:xmm {kz}, xmm/m128/b16" , "op": "RM-FV: EVEX.128.66.MAP5.W0 7D /r" , "vl": 1},
{"inst": "vcvtph2w W:ymm {kz}, ymm/m256/b16" , "op": "RM-FV: EVEX.256.66.MAP5.W0 7D /r" , "vl": 1},
{"inst": "vcvtph2w W:zmm {kz}, zmm/m512/b16 {er}" , "op": "RM-FV: EVEX.512.66.MAP5.W0 7D /r" , "vl": 0},
{"inst": "vcvtps2phx W:xmm {kz}, xmm/m128/b32" , "op": "RM-FV: EVEX.128.66.MAP5.W0 1D /r" , "vl": 1},
{"inst": "vcvtps2phx W:xmm {kz}, ymm/m256/b32" , "op": "RM-FV: EVEX.256.66.MAP5.W0 1D /r" , "vl": 1},
{"inst": "vcvtps2phx W:ymm {kz}, zmm/m512/b32 {er}" , "op": "RM-FV: EVEX.512.66.MAP5.W0 1D /r" , "vl": 0},
{"inst": "vcvtqq2ph W:xmm {kz}, xmm/m128/b64" , "op": "RM-FV: EVEX.128.NP.MAP5.W1 5B /r" , "vl": 1},
{"inst": "vcvtqq2ph W:xmm {kz}, ymm/m256/b64" , "op": "RM-FV: EVEX.256.NP.MAP5.W1 5B /r" , "vl": 1},
{"inst": "vcvtqq2ph W:xmm {kz}, zmm/m512/b64 {er}" , "op": "RM-FV: EVEX.512.NP.MAP5.W1 5B /r" , "vl": 0},
{"inst": "vcvttph2dq W:xmm {kz}, xmm/m64/b16" , "op": "RM-HV: EVEX.128.F3.MAP5.W0 5B /r" , "vl": 1},
{"inst": "vcvttph2dq W:ymm {kz}, xmm/m128/b16" , "op": "RM-HV: EVEX.256.F3.MAP5.W0 5B /r" , "vl": 1},
{"inst": "vcvttph2dq W:zmm {kz}, ymm/m256/b16 {sae}" , "op": "RM-HV: EVEX.512.F3.MAP5.W0 5B /r" , "vl": 0},
{"inst": "vcvttph2qq W:xmm {kz}, xmm/m32/b16" , "op": "RM-QV: EVEX.128.66.MAP5.W0 7A /r" , "vl": 1},
{"inst": "vcvttph2qq W:ymm {kz}, xmm/m64/b16" , "op": "RM-QV: EVEX.256.66.MAP5.W0 7A /r" , "vl": 1},
{"inst": "vcvttph2qq W:zmm {kz}, xmm/m128/b16 {sae}" , "op": "RM-QV: EVEX.512.66.MAP5.W0 7A /r" , "vl": 0},
{"inst": "vcvttph2udq W:xmm {kz}, xmm/m64/b16" , "op": "RM-HV: EVEX.128.NP.MAP5.W0 78 /r" , "vl": 1},
{"inst": "vcvttph2udq W:ymm {kz}, xmm/m128/b16" , "op": "RM-HV: EVEX.256.NP.MAP5.W0 78 /r" , "vl": 1},
{"inst": "vcvttph2udq W:zmm {kz}, ymm/m256/b16 {sae}" , "op": "RM-HV: EVEX.512.NP.MAP5.W0 78 /r" , "vl": 0},
{"inst": "vcvttph2uqq W:xmm {kz}, xmm/m32/b16" , "op": "RM-QV: EVEX.128.66.MAP5.W0 78 /r" , "vl": 1},
{"inst": "vcvttph2uqq W:ymm {kz}, xmm/m64/b16" , "op": "RM-QV: EVEX.256.66.MAP5.W0 78 /r" , "vl": 1},
{"inst": "vcvttph2uqq W:zmm {kz}, xmm/m128/b16 {sae}" , "op": "RM-QV: EVEX.512.66.MAP5.W0 78 /r" , "vl": 0},
{"inst": "vcvttph2uw W:xmm {kz}, xmm/m128/b16" , "op": "RM-FV: EVEX.128.NP.MAP5.W0 7C /r" , "vl": 1},
{"inst": "vcvttph2uw W:ymm {kz}, ymm/m256/b16" , "op": "RM-FV: EVEX.256.NP.MAP5.W0 7C /r" , "vl": 1},
{"inst": "vcvttph2uw W:zmm {kz}, zmm/m512/b16 {sae}" , "op": "RM-FV: EVEX.512.NP.MAP5.W0 7C /r" , "vl": 0},
{"inst": "vcvttph2w W:xmm {kz}, xmm/m128/b16" , "op": "RM-FV: EVEX.128.66.MAP5.W0 7C /r" , "vl": 1},
{"inst": "vcvttph2w W:ymm {kz}, ymm/m256/b16" , "op": "RM-FV: EVEX.256.66.MAP5.W0 7C /r" , "vl": 1},
{"inst": "vcvttph2w W:zmm {kz}, zmm/m512/b16 {sae}" , "op": "RM-FV: EVEX.512.66.MAP5.W0 7C /r" , "vl": 0},
{"inst": "vcvtudq2ph W:xmm {kz}, xmm/m128/b32" , "op": "RM-FV: EVEX.128.F2.MAP5.W0 7A /r" , "vl": 1},
{"inst": "vcvtudq2ph W:xmm {kz}, ymm/m256/b32" , "op": "RM-FV: EVEX.256.F2.MAP5.W0 7A /r" , "vl": 1},
{"inst": "vcvtudq2ph W:ymm {kz}, zmm/m512/b32 {er}" , "op": "RM-FV: EVEX.512.F2.MAP5.W0 7A /r" , "vl": 0},
{"inst": "vcvtuqq2ph W:xmm {kz}, xmm/m128/b64" , "op": "RM-FV: EVEX.128.F2.MAP5.W1 7A /r" , "vl": 1},
{"inst": "vcvtuqq2ph W:xmm {kz}, ymm/m256/b64" , "op": "RM-FV: EVEX.256.F2.MAP5.W1 7A /r" , "vl": 1},
{"inst": "vcvtuqq2ph W:xmm {kz}, zmm/m512/b64 {er}" , "op": "RM-FV: EVEX.512.F2.MAP5.W1 7A /r" , "vl": 0},
{"inst": "vcvtuw2ph W:xmm {kz}, xmm/m128/b16" , "op": "RM-FV: EVEX.128.F2.MAP5.W0 7D /r" , "vl": 1},
{"inst": "vcvtuw2ph W:ymm {kz}, ymm/m256/b16" , "op": "RM-FV: EVEX.256.F2.MAP5.W0 7D /r" , "vl": 1},
{"inst": "vcvtuw2ph W:zmm {kz}, zmm/m512/b16 {er}" , "op": "RM-FV: EVEX.512.F2.MAP5.W0 7D /r" , "vl": 0},
{"inst": "vcvtw2ph W:xmm {kz}, xmm/m128/b16" , "op": "RM-FV: EVEX.128.F3.MAP5.W0 7D /r" , "vl": 1},
{"inst": "vcvtw2ph W:ymm {kz}, ymm/m256/b16" , "op": "RM-FV: EVEX.256.F3.MAP5.W0 7D /r" , "vl": 1},
{"inst": "vcvtw2ph W:zmm {kz}, zmm/m512/b16 {er}" , "op": "RM-FV: EVEX.512.F3.MAP5.W0 7D /r" , "vl": 0},
{"inst": "vdivph W:xmm {kz}, xmm, xmm/m128/b16" , "op": "RVM-FV: EVEX.128.NP.MAP5.W0 5E /r" , "vl": 1},
{"inst": "vdivph W:ymm {kz}, ymm, ymm/m256/b16" , "op": "RVM-FV: EVEX.256.NP.MAP5.W0 5E /r" , "vl": 1},
{"inst": "vdivph W:zmm {kz}, zmm, zmm/m512/b16 {er}" , "op": "RVM-FV: EVEX.512.NP.MAP5.W0 5E /r" , "vl": 0},
{"inst": "vfcmaddcph X:xmm {kz}, xmm, xmm/m128/b32" , "op": "RVM-FV: EVEX.128.F2.MAP6.W0 56 /r" , "vl": 1},
{"inst": "vfcmaddcph X:ymm {kz}, ymm, ymm/m256/b32" , "op": "RVM-FV: EVEX.256.F2.MAP6.W0 56 /r" , "vl": 1},
{"inst": "vfcmaddcph X:zmm {kz}, zmm, zmm/m512/b32 {er}" , "op": "RVM-FV: EVEX.512.F2.MAP6.W0 56 /r" , "vl": 0},
{"inst": "vfcmulcph X:xmm {kz}, xmm, xmm/m128/b32" , "op": "RVM-FV: EVEX.128.F2.MAP6.W0 D6 /r" , "vl": 1},
{"inst": "vfcmulcph X:ymm {kz}, ymm, ymm/m256/b32" , "op": "RVM-FV: EVEX.256.F2.MAP6.W0 D6 /r" , "vl": 1},
{"inst": "vfcmulcph X:zmm {kz}, zmm, zmm/m512/b32 {er}" , "op": "RVM-FV: EVEX.512.F2.MAP6.W0 D6 /r" , "vl": 0},
{"inst": "vfmadd132ph X:xmm {kz}, xmm, xmm/m128/b16" , "op": "RVM-FV: EVEX.128.66.MAP6.W0 98 /r" , "vl": 1},
{"inst": "vfmadd132ph X:ymm {kz}, ymm, ymm/m256/b16" , "op": "RVM-FV: EVEX.256.66.MAP6.W0 98 /r" , "vl": 1},
{"inst": "vfmadd132ph X:zmm {kz}, zmm, zmm/m512/b16 {er}" , "op": "RVM-FV: EVEX.512.66.MAP6.W0 98 /r" , "vl": 0},
{"inst": "vfmadd213ph X:xmm {kz}, xmm, xmm/m128/b16" , "op": "RVM-FV: EVEX.128.66.MAP6.W0 A8 /r" , "vl": 1},
{"inst": "vfmadd213ph X:ymm {kz}, ymm, ymm/m256/b16" , "op": "RVM-FV: EVEX.256.66.MAP6.W0 A8 /r" , "vl": 1},
{"inst": "vfmadd213ph X:zmm {kz}, zmm, zmm/m512/b16 {er}" , "op": "RVM-FV: EVEX.512.66.MAP6.W0 A8 /r" , "vl": 0},
{"inst": "vfmadd231ph X:xmm {kz}, xmm, xmm/m128/b16" , "op": "RVM-FV: EVEX.128.66.MAP6.W0 B8 /r" , "vl": 1},
{"inst": "vfmadd231ph X:ymm {kz}, ymm, ymm/m256/b16" , "op": "RVM-FV: EVEX.256.66.MAP6.W0 B8 /r" , "vl": 1},
{"inst": "vfmadd231ph X:zmm {kz}, zmm, zmm/m512/b16 {er}" , "op": "RVM-FV: EVEX.512.66.MAP6.W0 B8 /r" , "vl": 0},
{"inst": "vfmaddcph X:xmm {kz}, xmm, xmm/m128/b32" , "op": "RVM-FV: EVEX.128.F3.MAP6.W0 56 /r" , "vl": 1},
{"inst": "vfmaddcph X:ymm {kz}, ymm, ymm/m256/b32" , "op": "RVM-FV: EVEX.256.F3.MAP6.W0 56 /r" , "vl": 1},
{"inst": "vfmaddcph X:zmm {kz}, zmm, zmm/m512/b32 {er}" , "op": "RVM-FV: EVEX.512.F3.MAP6.W0 56 /r" , "vl": 0},
{"inst": "vfmaddsub132ph X:xmm {kz}, xmm, xmm/m128/b16" , "op": "RVM-FV: EVEX.128.66.MAP6.W0 96 /r" , "vl": 1},
{"inst": "vfmaddsub132ph X:ymm {kz}, ymm, ymm/m256/b16" , "op": "RVM-FV: EVEX.256.66.MAP6.W0 96 /r" , "vl": 1},
{"inst": "vfmaddsub132ph X:zmm {kz}, zmm, zmm/m512/b16 {er}" , "op": "RVM-FV: EVEX.512.66.MAP6.W0 96 /r" , "vl": 0},
{"inst": "vfmaddsub213ph X:xmm {kz}, xmm, xmm/m128/b16" , "op": "RVM-FV: EVEX.128.66.MAP6.W0 A6 /r" , "vl": 1},
{"inst": "vfmaddsub213ph X:ymm {kz}, ymm, ymm/m256/b16" , "op": "RVM-FV: EVEX.256.66.MAP6.W0 A6 /r" , "vl": 1},
{"inst": "vfmaddsub213ph X:zmm {kz}, zmm, zmm/m512/b16 {er}" , "op": "RVM-FV: EVEX.512.66.MAP6.W0 A6 /r" , "vl": 0},
{"inst": "vfmaddsub231ph X:xmm {kz}, xmm, xmm/m128/b16" , "op": "RVM-FV: EVEX.128.66.MAP6.W0 B6 /r" , "vl": 1},
{"inst": "vfmaddsub231ph X:ymm {kz}, ymm, ymm/m256/b16" , "op": "RVM-FV: EVEX.256.66.MAP6.W0 B6 /r" , "vl": 1},
{"inst": "vfmaddsub231ph X:zmm {kz}, zmm, zmm/m512/b16 {er}" , "op": "RVM-FV: EVEX.512.66.MAP6.W0 B6 /r" , "vl": 0},
{"inst": "vfmsub132ph X:xmm {kz}, xmm, xmm/m128/b16" , "op": "RVM-FV: EVEX.128.66.MAP6.W0 9A /r" , "vl": 1},
{"inst": "vfmsub132ph X:ymm {kz}, ymm, ymm/m256/b16" , "op": "RVM-FV: EVEX.256.66.MAP6.W0 9A /r" , "vl": 1},
{"inst": "vfmsub132ph X:zmm {kz}, zmm, zmm/m512/b16 {er}" , "op": "RVM-FV: EVEX.512.66.MAP6.W0 9A /r" , "vl": 0},
{"inst": "vfmsub213ph X:xmm {kz}, xmm, xmm/m128/b16" , "op": "RVM-FV: EVEX.128.66.MAP6.W0 AA /r" , "vl": 1},
{"inst": "vfmsub213ph X:ymm {kz}, ymm, ymm/m256/b16" , "op": "RVM-FV: EVEX.256.66.MAP6.W0 AA /r" , "vl": 1},
{"inst": "vfmsub213ph X:zmm {kz}, zmm, zmm/m512/b16 {er}" , "op": "RVM-FV: EVEX.512.66.MAP6.W0 AA /r" , "vl": 0},
{"inst": "vfmsub231ph X:xmm {kz}, xmm, xmm/m128/b16" , "op": "RVM-FV: EVEX.128.66.MAP6.W0 BA /r" , "vl": 1},
{"inst": "vfmsub231ph X:ymm {kz}, ymm, ymm/m256/b16" , "op": "RVM-FV: EVEX.256.66.MAP6.W0 BA /r" , "vl": 1},
{"inst": "vfmsub231ph X:zmm {kz}, zmm, zmm/m512/b16 {er}" , "op": "RVM-FV: EVEX.512.66.MAP6.W0 BA /r" , "vl": 0},
{"inst": "vfmsubadd132ph X:xmm {kz}, xmm, xmm/m128/b16" , "op": "RVM-FV: EVEX.128.66.MAP6.W0 97 /r" , "vl": 1},
{"inst": "vfmsubadd132ph X:ymm {kz}, ymm, ymm/m256/b16" , "op": "RVM-FV: EVEX.256.66.MAP6.W0 97 /r" , "vl": 1},
{"inst": "vfmsubadd132ph X:zmm {kz}, zmm, zmm/m512/b16 {er}" , "op": "RVM-FV: EVEX.512.66.MAP6.W0 97 /r" , "vl": 0},
{"inst": "vfmsubadd213ph X:xmm {kz}, xmm, xmm/m128/b16" , "op": "RVM-FV: EVEX.128.66.MAP6.W0 A7 /r" , "vl": 1},
{"inst": "vfmsubadd213ph X:ymm {kz}, ymm, ymm/m256/b16" , "op": "RVM-FV: EVEX.256.66.MAP6.W0 A7 /r" , "vl": 1},
{"inst": "vfmsubadd213ph X:zmm {kz}, zmm, zmm/m512/b16 {er}" , "op": "RVM-FV: EVEX.512.66.MAP6.W0 A7 /r" , "vl": 0},
{"inst": "vfmsubadd231ph X:xmm {kz}, xmm, xmm/m128/b16" , "op": "RVM-FV: EVEX.128.66.MAP6.W0 B7 /r" , "vl": 1},
{"inst": "vfmsubadd231ph X:ymm {kz}, ymm, ymm/m256/b16" , "op": "RVM-FV: EVEX.256.66.MAP6.W0 B7 /r" , "vl": 1},
{"inst": "vfmsubadd231ph X:zmm {kz}, zmm, zmm/m512/b16 {er}" , "op": "RVM-FV: EVEX.512.66.MAP6.W0 B7 /r" , "vl": 0},
{"inst": "vfmulcph X:xmm {kz}, xmm, xmm/m128/b32" , "op": "RVM-FV: EVEX.128.F3.MAP6.W0 D6 /r" , "vl": 1},
{"inst": "vfmulcph X:ymm {kz}, ymm, ymm/m256/b32" , "op": "RVM-FV: EVEX.256.F3.MAP6.W0 D6 /r" , "vl": 1},
{"inst": "vfmulcph X:zmm {kz}, zmm, zmm/m512/b32 {er}" , "op": "RVM-FV: EVEX.512.F3.MAP6.W0 D6 /r" , "vl": 0},
{"inst": "vfmulcsh X:xmm {kz}, xmm, xmm/m32 {er}" , "op": "RVM-T1S: EVEX.LIG.F3.MAP6.W0 D7 /r" , "vl": 1},
{"inst": "vfnmadd132ph X:xmm {kz}, xmm, xmm/m128/b16" , "op": "RVM-FV: EVEX.128.66.MAP6.W0 9C /r" , "vl": 1},
{"inst": "vfnmadd132ph X:ymm {kz}, ymm, ymm/m256/b16" , "op": "RVM-FV: EVEX.256.66.MAP6.W0 9C /r" , "vl": 1},
{"inst": "vfnmadd132ph X:zmm {kz}, zmm, zmm/m512/b16 {er}" , "op": "RVM-FV: EVEX.512.66.MAP6.W0 9C /r" , "vl": 0},
{"inst": "vfnmadd213ph X:xmm {kz}, xmm, xmm/m128/b16" , "op": "RVM-FV: EVEX.128.66.MAP6.W0 AC /r" , "vl": 1},
{"inst": "vfnmadd213ph X:ymm {kz}, ymm, ymm/m256/b16" , "op": "RVM-FV: EVEX.256.66.MAP6.W0 AC /r" , "vl": 1},
{"inst": "vfnmadd213ph X:zmm {kz}, zmm, zmm/m512/b16 {er}" , "op": "RVM-FV: EVEX.512.66.MAP6.W0 AC /r" , "vl": 0},
{"inst": "vfnmadd231ph X:xmm {kz}, xmm, xmm/m128/b16" , "op": "RVM-FV: EVEX.128.66.MAP6.W0 BC /r" , "vl": 1},
{"inst": "vfnmadd231ph X:ymm {kz}, ymm, ymm/m256/b16" , "op": "RVM-FV: EVEX.256.66.MAP6.W0 BC /r" , "vl": 1},
{"inst": "vfnmadd231ph X:zmm {kz}, zmm, zmm/m512/b16 {er}" , "op": "RVM-FV: EVEX.512.66.MAP6.W0 BC /r" , "vl": 0},
{"inst": "vfnmsub132ph X:xmm {kz}, xmm, xmm/m128/b16" , "op": "RVM-FV: EVEX.128.66.MAP6.W0 9E /r" , "vl": 1},
{"inst": "vfnmsub132ph X:ymm {kz}, ymm, ymm/m256/b16" , "op": "RVM-FV: EVEX.256.66.MAP6.W0 9E /r" , "vl": 1},
{"inst": "vfnmsub132ph X:zmm {kz}, zmm, zmm/m512/b16 {er}" , "op": "RVM-FV: EVEX.512.66.MAP6.W0 9E /r" , "vl": 0},
{"inst": "vfnmsub213ph X:xmm {kz}, xmm, xmm/m128/b16" , "op": "RVM-FV: EVEX.128.66.MAP6.W0 AE /r" , "vl": 1},
{"inst": "vfnmsub213ph X:ymm {kz}, ymm, ymm/m256/b16" , "op": "RVM-FV: EVEX.256.66.MAP6.W0 AE /r" , "vl": 1},
{"inst": "vfnmsub213ph X:zmm {kz}, zmm, zmm/m512/b16 {er}" , "op": "RVM-FV: EVEX.512.66.MAP6.W0 AE /r" , "vl": 0},
{"inst": "vfnmsub231ph X:xmm {kz}, xmm, xmm/m128/b16" , "op": "RVM-FV: EVEX.128.66.MAP6.W0 BE /r" , "vl": 1},
{"inst": "vfnmsub231ph X:ymm {kz}, ymm, ymm/m256/b16" , "op": "RVM-FV: EVEX.256.66.MAP6.W0 BE /r" , "vl": 1},
{"inst": "vfnmsub231ph X:zmm {kz}, zmm, zmm/m512/b16 {er}" , "op": "RVM-FV: EVEX.512.66.MAP6.W0 BE /r" , "vl": 0},
{"inst": "vfpclassph W:k {k}, xmm/m128/b16, ib/ub" , "op": "RM-FV: EVEX.128.NP.0F3A.W0 66 /r ib" , "vl": 1},
{"inst": "vfpclassph W:k {k}, ymm/m256/b16, ib/ub" , "op": "RM-FV: EVEX.256.NP.0F3A.W0 66 /r ib" , "vl": 1},
{"inst": "vfpclassph W:k {k}, zmm/m512/b16, ib/ub" , "op": "RM-FV: EVEX.512.NP.0F3A.W0 66 /r ib" , "vl": 0},
{"inst": "vgetexpph W:xmm {kz}, xmm/m128/b16" , "op": "RM-FV: EVEX.128.66.MAP6.W0 42 /r" , "vl": 1},
{"inst": "vgetexpph W:ymm {kz}, ymm/m256/b16" , "op": "RM-FV: EVEX.256.66.MAP6.W0 42 /r" , "vl": 1},
{"inst": "vgetexpph W:zmm {kz}, zmm/m512/b16 {sae}" , "op": "RM-FV: EVEX.512.66.MAP6.W0 42 /r" , "vl": 0},
{"inst": "vgetmantph W:xmm {kz}, xmm/m128/b16, ib/ub" , "op": "RM-FV: EVEX.128.NP.0F3A.W0 26 /r ib" , "vl": 1},
{"inst": "vgetmantph W:ymm {kz}, ymm/m256/b16, ib/ub" , "op": "RM-FV: EVEX.256.NP.0F3A.W0 26 /r ib" , "vl": 1},
{"inst": "vgetmantph W:zmm {kz}, zmm/m512/b16, ib/ub {sae}" , "op": "RM-FV: EVEX.512.NP.0F3A.W0 26 /r ib" , "vl": 0},
{"inst": "vmaxph W:xmm {kz}, xmm, xmm/m128/b16" , "op": "RVM-FV: EVEX.128.NP.MAP5.W0 5F /r" , "vl": 1},
{"inst": "vmaxph W:ymm {kz}, ymm, ymm/m256/b16" , "op": "RVM-FV: EVEX.256.NP.MAP5.W0 5F /r" , "vl": 1},
{"inst": "vmaxph W:zmm {kz}, zmm, zmm/m512/b16 {sae}" , "op": "RVM-FV: EVEX.512.NP.MAP5.W0 5F /r" , "vl": 0},
{"inst": "vminph W:xmm {kz}, xmm, xmm/m128/b16" , "op": "RVM-FV: EVEX.128.NP.MAP5.W0 5D /r" , "vl": 1},
{"inst": "vminph W:ymm {kz}, ymm, ymm/m256/b16" , "op": "RVM-FV: EVEX.256.NP.MAP5.W0 5D /r" , "vl": 1},
{"inst": "vminph W:zmm {kz}, zmm, zmm/m512/b16 {sae}" , "op": "RVM-FV: EVEX.512.NP.MAP5.W0 5D /r" , "vl": 0},
{"inst": "vmovw W:r32[15:0]/m16, xmm[15:0]" , "op": "MR-T1S: EVEX.128.66.MAP5.WIG 7E /r" , "vl": 0},
{"inst": "vmovw W:xmm[15:0] {kz}, r32[15:0]/m16" , "op": "RM-T1S: EVEX.128.66.MAP5.WIG 6E /r" , "vl": 0},
{"inst": "vmulph W:xmm {kz}, ~xmm, ~xmm/m128/b16" , "op": "RVM-FV: EVEX.128.NP.MAP5.W0 59 /r" , "vl": 1},
{"inst": "vmulph W:ymm {kz}, ~ymm, ~ymm/m256/b16" , "op": "RVM-FV: EVEX.256.NP.MAP5.W0 59 /r" , "vl": 1},
{"inst": "vmulph W:zmm {kz}, ~zmm, ~zmm/m512/b16 {er}" , "op": "RVM-FV: EVEX.512.NP.MAP5.W0 59 /r" , "vl": 0},
{"inst": "vrcpph W:xmm {kz}, xmm/m128/b16" , "op": "RM-FV: EVEX.128.66.MAP6.W0 4C /r" , "vl": 0},
{"inst": "vrcpph W:ymm {kz}, ymm/m256/b16" , "op": "RM-FV: EVEX.256.66.MAP6.W0 4C /r" , "vl": 0},
{"inst": "vrcpph W:zmm {kz}, zmm/m512/b16" , "op": "RM-FV: EVEX.512.66.MAP6.W0 4C /r" , "vl": 0},
{"inst": "vreduceph W:xmm {kz}, xmm/m128/b16, ib/ub" , "op": "RM-FV: EVEX.128.NP.0F3A.W0 56 /r ib" , "vl": 1},
{"inst": "vreduceph W:ymm {kz}, ymm/m256/b16, ib/ub" , "op": "RM-FV: EVEX.256.NP.0F3A.W0 56 /r ib" , "vl": 1},
{"inst": "vreduceph W:zmm {kz}, zmm/m512/b16, ib/ub {sae}" , "op": "RM-FV: EVEX.512.NP.0F3A.W0 56 /r ib" , "vl": 0},
{"inst": "vrndscaleph W:xmm {kz}, xmm/m128/b16, ib/ub" , "op": "RM-FV: EVEX.128.NP.0F3A.W0 08 /r ib" , "vl": 1},
{"inst": "vrndscaleph W:ymm {kz}, ymm/m256/b16, ib/ub" , "op": "RM-FV: EVEX.256.NP.0F3A.W0 08 /r ib" , "vl": 1},
{"inst": "vrndscaleph W:zmm {kz}, zmm/m512/b16, ib/ub {sae}" , "op": "RM-FV: EVEX.512.NP.0F3A.W0 08 /r ib" , "vl": 0},
{"inst": "vrsqrtph W:xmm {kz}, xmm/m128/b16" , "op": "RM-FV: EVEX.128.66.MAP6.W0 4E /r" , "vl": 1},
{"inst": "vrsqrtph W:ymm {kz}, ymm/m256/b16" , "op": "RM-FV: EVEX.256.66.MAP6.W0 4E /r" , "vl": 1},
{"inst": "vrsqrtph W:zmm {kz}, zmm/m512/b16" , "op": "RM-FV: EVEX.512.66.MAP6.W0 4E /r" , "vl": 0},
{"inst": "vscalefph W:xmm {kz}, xmm, xmm/m128/b16" , "op": "RVM-FV: EVEX.128.66.MAP6.W0 2C /r" , "vl": 1},
{"inst": "vscalefph W:ymm {kz}, ymm, ymm/m256/b16" , "op": "RVM-FV: EVEX.256.66.MAP6.W0 2C /r" , "vl": 1},
{"inst": "vscalefph W:zmm {kz}, zmm, zmm/m512/b16 {er}" , "op": "RVM-FV: EVEX.512.66.MAP6.W0 2C /r" , "vl": 0},
{"inst": "vsqrtph W:xmm {kz}, xmm/m128/b16" , "op": "RM-FV: EVEX.128.NP.MAP5.W0 51 /r" , "vl": 1},
{"inst": "vsqrtph W:ymm {kz}, ymm/m256/b16" , "op": "RM-FV: EVEX.256.NP.MAP5.W0 51 /r" , "vl": 1},
{"inst": "vsqrtph W:zmm {kz}, zmm/m512/b16 {er}" , "op": "RM-FV: EVEX.512.NP.MAP5.W0 51 /r" , "vl": 0},
{"inst": "vsubph W:xmm {kz}, ~xmm, ~xmm/m128/b16" , "op": "RVM-FV: EVEX.128.NP.MAP5.W0 5C /r" , "vl": 1},
{"inst": "vsubph W:ymm {kz}, ~ymm, ~ymm/m256/b16" , "op": "RVM-FV: EVEX.256.NP.MAP5.W0 5C /r" , "vl": 1},
{"inst": "vsubph W:zmm {kz}, ~zmm, ~zmm/m512/b16 {er}" , "op": "RVM-FV: EVEX.512.NP.MAP5.W0 5C /r" , "vl": 0}
]},
{"category": "AMX", "ext": "AMX_TILE", "arch": "X64", "data": [
{"inst": "ldtilecfg R:m512" , "op": "VEX.128.0F38.W0 49 /0"},
{"inst": "sttilecfg W:m512" , "op": "VEX.128.66.0F38.W0 49 /0"},
{"inst": "tileloadd W:tmm, tmem" , "op": "RM: VEX.128.F2.0F38.W0 4B /r"},
{"inst": "tileloaddt1 W:tmm, tmem" , "op": "RM: VEX.128.66.0F38.W0 4B /r"},
{"inst": "tilerelease" , "op": "VEX.128.0F38.W0 49 /0"},
{"inst": "tilestored W:tmem, tmm" , "op": "MR: VEX.128.F3.0F38.W0 4B /r"},
{"inst": "tilezero W:tmm" , "op": "R: VEX.128.F2.0F38.W0 49 /r"}
]},
{"category": "AMX", "ext": "AMX_BF16", "arch": "X64", "data": [
{"inst": "tdpbf16ps X:tmm, tmm, tmm" , "op": "RMV: VEX.128.F3.0F38.W0 5C /r"}
]},
{"category": "AMX", "ext": "AMX_COMPLEX", "arch": "X64", "data": [
{"inst": "tcmmimfp16ps X:tmm, tmm, tmm" , "op": "RMV: VEX.128.66.0F38.W0 6C /r"},
{"inst": "tcmmrlfp16ps X:tmm, tmm, tmm" , "op": "RMV: VEX.128.NP.0F38.W0 6C /r"}
]},
{"category": "AMX", "ext": "AMX_FP16", "arch": "X64", "data": [
{"inst": "tdpfp16ps X:tmm, tmm, tmm" , "op": "RMV: VEX.128.F2.0F38.W0 5C /r"}
]},
{"category": "AMX", "ext": "AMX_INT8", "arch": "X64", "data": [
{"inst": "tdpbssd X:tmm, tmm, tmm" , "op": "RMV: VEX.128.F2.0F38.W0 5E /r"},
{"inst": "tdpbsud X:tmm, tmm, tmm" , "op": "RMV: VEX.128.F3.0F38.W0 5E /r"},
{"inst": "tdpbusd X:tmm, tmm, tmm" , "op": "RMV: VEX.128.66.0F38.W0 5E /r"},
{"inst": "tdpbuud X:tmm, tmm, tmm" , "op": "RMV: VEX.128.0F38.W0 5E /r"}
]}
],
"postproc": [
{"group": "Control Flow", "instructions": [
{"inst": "call lcall", "control": "call"},
{"inst": "iret iretd iretq", "control": "return"},
{"inst": "jae jnb jnc jo jno jb jnae jc je jz jne jnz jbe jna ja jnbe js jns jp jpe jnp jpo jl jnge jge jnl jle jng jg jnle jecxz", "control": "branch"},
{"inst": "jmp ljmp", "control": "jump"},
{"inst": "loop loope loopne", "control": "branch"},
{"inst": "ret retf", "control": "return"}
]},
{"group": "Encoding Preference", "instructions": [
{"inst": "vcvtneps2bf16", "encodingPreference": "EVEX"},
{"inst": "vpmadd52huq vpmadd52luq", "encodingPreference": "EVEX"},
{"inst": "vpdpbusd vpdpbusds vpdpwssd vpdpwssds", "encodingPreference": "EVEX"}
]}
]
}