504 lines
18 KiB
C++
504 lines
18 KiB
C++
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// This file is part of AsmJit project <https://asmjit.com>
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//
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// See asmjit.h or LICENSE.md for license and copyright information
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// SPDX-License-Identifier: Zlib
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#include "../core/api-build_p.h"
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#if !defined(ASMJIT_NO_X86)
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#include "../x86/x86func_p.h"
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#include "../x86/x86emithelper_p.h"
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#include "../x86/x86operand.h"
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ASMJIT_BEGIN_SUB_NAMESPACE(x86)
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namespace FuncInternal {
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static inline bool shouldThreatAsCDeclIn64BitMode(CallConvId ccId) noexcept {
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return ccId == CallConvId::kCDecl ||
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ccId == CallConvId::kStdCall ||
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ccId == CallConvId::kThisCall ||
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ccId == CallConvId::kFastCall ||
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ccId == CallConvId::kRegParm1 ||
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ccId == CallConvId::kRegParm2 ||
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ccId == CallConvId::kRegParm3;
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}
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ASMJIT_FAVOR_SIZE Error initCallConv(CallConv& cc, CallConvId ccId, const Environment& environment) noexcept {
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constexpr uint32_t kZax = Gp::kIdAx;
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constexpr uint32_t kZbx = Gp::kIdBx;
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constexpr uint32_t kZcx = Gp::kIdCx;
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constexpr uint32_t kZdx = Gp::kIdDx;
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constexpr uint32_t kZsp = Gp::kIdSp;
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constexpr uint32_t kZbp = Gp::kIdBp;
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constexpr uint32_t kZsi = Gp::kIdSi;
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constexpr uint32_t kZdi = Gp::kIdDi;
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bool winABI = environment.isPlatformWindows() || environment.isMSVC();
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cc.setArch(environment.arch());
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cc.setSaveRestoreRegSize(RegGroup::kVec, 16);
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cc.setSaveRestoreRegSize(RegGroup::kX86_MM, 8);
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cc.setSaveRestoreRegSize(RegGroup::kX86_K, 8);
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cc.setSaveRestoreAlignment(RegGroup::kVec, 16);
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cc.setSaveRestoreAlignment(RegGroup::kX86_MM, 8);
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cc.setSaveRestoreAlignment(RegGroup::kX86_K, 8);
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if (environment.is32Bit()) {
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bool isStandardCallConv = true;
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cc.setSaveRestoreRegSize(RegGroup::kGp, 4);
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cc.setSaveRestoreAlignment(RegGroup::kGp, 4);
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cc.setPreservedRegs(RegGroup::kGp, Support::bitMask(Gp::kIdBx, Gp::kIdSp, Gp::kIdBp, Gp::kIdSi, Gp::kIdDi));
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cc.setNaturalStackAlignment(4);
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switch (ccId) {
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case CallConvId::kCDecl:
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break;
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case CallConvId::kStdCall:
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cc.setFlags(CallConvFlags::kCalleePopsStack);
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break;
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case CallConvId::kFastCall:
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cc.setFlags(CallConvFlags::kCalleePopsStack);
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cc.setPassedOrder(RegGroup::kGp, kZcx, kZdx);
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break;
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case CallConvId::kVectorCall:
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cc.setFlags(CallConvFlags::kCalleePopsStack);
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cc.setPassedOrder(RegGroup::kGp, kZcx, kZdx);
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cc.setPassedOrder(RegGroup::kVec, 0, 1, 2, 3, 4, 5);
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break;
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case CallConvId::kThisCall:
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// NOTE: Even MINGW (starting with GCC 4.7.0) now uses __thiscall on MS Windows, so we won't bail to any
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// other calling convention if __thiscall was specified.
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if (winABI) {
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cc.setFlags(CallConvFlags::kCalleePopsStack);
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cc.setPassedOrder(RegGroup::kGp, kZcx);
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}
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else {
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ccId = CallConvId::kCDecl;
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}
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break;
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case CallConvId::kRegParm1:
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cc.setPassedOrder(RegGroup::kGp, kZax);
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break;
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case CallConvId::kRegParm2:
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cc.setPassedOrder(RegGroup::kGp, kZax, kZdx);
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break;
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case CallConvId::kRegParm3:
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cc.setPassedOrder(RegGroup::kGp, kZax, kZdx, kZcx);
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break;
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case CallConvId::kLightCall2:
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case CallConvId::kLightCall3:
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case CallConvId::kLightCall4: {
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uint32_t n = uint32_t(ccId) - uint32_t(CallConvId::kLightCall2) + 2;
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cc.setFlags(CallConvFlags::kPassFloatsByVec);
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cc.setPassedOrder(RegGroup::kGp, kZax, kZdx, kZcx, kZsi, kZdi);
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cc.setPassedOrder(RegGroup::kVec, 0, 1, 2, 3, 4, 5, 6, 7);
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cc.setPassedOrder(RegGroup::kX86_K, 0, 1, 2, 3, 4, 5, 6, 7);
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cc.setPassedOrder(RegGroup::kX86_MM, 0, 1, 2, 3, 4, 5, 6, 7);
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cc.setPreservedRegs(RegGroup::kGp, Support::lsbMask<uint32_t>(8));
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cc.setPreservedRegs(RegGroup::kVec, Support::lsbMask<uint32_t>(8) & ~Support::lsbMask<uint32_t>(n));
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cc.setNaturalStackAlignment(16);
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isStandardCallConv = false;
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break;
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}
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default:
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return DebugUtils::errored(kErrorInvalidArgument);
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}
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if (isStandardCallConv) {
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// MMX arguments is something where compiler vendors disagree. For example GCC and MSVC would pass first three
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// via registers and the rest via stack, however Clang passes all via stack. Returning MMX registers is even
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// more fun, where GCC uses MM0, but Clang uses EAX:EDX pair. I'm not sure it's something we should be worried
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// about as MMX is deprecated anyway.
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cc.setPassedOrder(RegGroup::kX86_MM, 0, 1, 2);
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// Vector arguments (XMM|YMM|ZMM) are passed via registers. However, if the function is variadic then they have
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// to be passed via stack.
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cc.setPassedOrder(RegGroup::kVec, 0, 1, 2);
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// Functions with variable arguments always use stack for MM and vector arguments.
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cc.addFlags(CallConvFlags::kPassVecByStackIfVA);
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}
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if (ccId == CallConvId::kCDecl) {
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cc.addFlags(CallConvFlags::kVarArgCompatible);
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}
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}
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else {
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cc.setSaveRestoreRegSize(RegGroup::kGp, 8);
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cc.setSaveRestoreAlignment(RegGroup::kGp, 8);
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// Preprocess the calling convention into a common id as many conventions are normally ignored even by C/C++
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// compilers and treated as `__cdecl`.
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if (shouldThreatAsCDeclIn64BitMode(ccId))
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ccId = winABI ? CallConvId::kX64Windows : CallConvId::kX64SystemV;
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switch (ccId) {
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case CallConvId::kX64SystemV: {
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cc.setFlags(CallConvFlags::kPassFloatsByVec |
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CallConvFlags::kPassMmxByXmm |
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CallConvFlags::kVarArgCompatible);
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cc.setNaturalStackAlignment(16);
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cc.setRedZoneSize(128);
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cc.setPassedOrder(RegGroup::kGp, kZdi, kZsi, kZdx, kZcx, 8, 9);
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cc.setPassedOrder(RegGroup::kVec, 0, 1, 2, 3, 4, 5, 6, 7);
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cc.setPreservedRegs(RegGroup::kGp, Support::bitMask(kZbx, kZsp, kZbp, 12, 13, 14, 15));
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break;
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}
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case CallConvId::kX64Windows: {
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cc.setStrategy(CallConvStrategy::kX64Windows);
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cc.setFlags(CallConvFlags::kPassFloatsByVec |
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CallConvFlags::kIndirectVecArgs |
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CallConvFlags::kPassMmxByGp |
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CallConvFlags::kVarArgCompatible);
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cc.setNaturalStackAlignment(16);
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// Maximum 4 arguments in registers, each adds 8 bytes to the spill zone.
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cc.setSpillZoneSize(4 * 8);
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cc.setPassedOrder(RegGroup::kGp, kZcx, kZdx, 8, 9);
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cc.setPassedOrder(RegGroup::kVec, 0, 1, 2, 3);
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cc.setPreservedRegs(RegGroup::kGp, Support::bitMask(kZbx, kZsp, kZbp, kZsi, kZdi, 12, 13, 14, 15));
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cc.setPreservedRegs(RegGroup::kVec, Support::bitMask(6, 7, 8, 9, 10, 11, 12, 13, 14, 15));
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break;
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}
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case CallConvId::kVectorCall: {
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cc.setStrategy(CallConvStrategy::kX64VectorCall);
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cc.setFlags(CallConvFlags::kPassFloatsByVec |
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CallConvFlags::kPassMmxByGp );
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cc.setNaturalStackAlignment(16);
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// Maximum 6 arguments in registers, each adds 8 bytes to the spill zone.
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cc.setSpillZoneSize(6 * 8);
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cc.setPassedOrder(RegGroup::kGp, kZcx, kZdx, 8, 9);
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cc.setPassedOrder(RegGroup::kVec, 0, 1, 2, 3, 4, 5);
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cc.setPreservedRegs(RegGroup::kGp, Support::bitMask(kZbx, kZsp, kZbp, kZsi, kZdi, 12, 13, 14, 15));
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cc.setPreservedRegs(RegGroup::kVec, Support::bitMask(6, 7, 8, 9, 10, 11, 12, 13, 14, 15));
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break;
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}
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case CallConvId::kLightCall2:
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case CallConvId::kLightCall3:
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case CallConvId::kLightCall4: {
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uint32_t n = uint32_t(ccId) - uint32_t(CallConvId::kLightCall2) + 2;
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cc.setFlags(CallConvFlags::kPassFloatsByVec);
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cc.setNaturalStackAlignment(16);
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cc.setPassedOrder(RegGroup::kGp, kZax, kZdx, kZcx, kZsi, kZdi);
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cc.setPassedOrder(RegGroup::kVec, 0, 1, 2, 3, 4, 5, 6, 7);
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cc.setPassedOrder(RegGroup::kX86_K, 0, 1, 2, 3, 4, 5, 6, 7);
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cc.setPassedOrder(RegGroup::kX86_MM, 0, 1, 2, 3, 4, 5, 6, 7);
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cc.setPreservedRegs(RegGroup::kGp, Support::lsbMask<uint32_t>(16));
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cc.setPreservedRegs(RegGroup::kVec, ~Support::lsbMask<uint32_t>(n));
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break;
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}
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default:
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return DebugUtils::errored(kErrorInvalidArgument);
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}
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}
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cc.setId(ccId);
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return kErrorOk;
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}
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ASMJIT_FAVOR_SIZE void unpackValues(FuncDetail& func, FuncValuePack& pack) noexcept {
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TypeId typeId = pack[0].typeId();
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switch (typeId) {
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case TypeId::kInt64:
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case TypeId::kUInt64: {
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if (Environment::is32Bit(func.callConv().arch())) {
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// Convert a 64-bit return value to two 32-bit return values.
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pack[0].initTypeId(TypeId::kUInt32);
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pack[1].initTypeId(TypeId(uint32_t(typeId) - 2));
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break;
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}
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break;
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}
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default: {
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break;
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}
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}
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}
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ASMJIT_FAVOR_SIZE Error initFuncDetail(FuncDetail& func, const FuncSignature& signature, uint32_t registerSize) noexcept {
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const CallConv& cc = func.callConv();
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Arch arch = cc.arch();
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uint32_t stackOffset = cc._spillZoneSize;
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uint32_t argCount = func.argCount();
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// Up to two return values can be returned in GP registers.
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static const uint8_t gpReturnIndexes[4] = {
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uint8_t(Gp::kIdAx),
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uint8_t(Gp::kIdDx),
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uint8_t(BaseReg::kIdBad),
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uint8_t(BaseReg::kIdBad)
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};
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if (func.hasRet()) {
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unpackValues(func, func._rets);
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for (uint32_t valueIndex = 0; valueIndex < Globals::kMaxValuePack; valueIndex++) {
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TypeId typeId = func._rets[valueIndex].typeId();
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// Terminate at the first void type (end of the pack).
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if (typeId == TypeId::kVoid)
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break;
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switch (typeId) {
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case TypeId::kInt64:
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case TypeId::kUInt64: {
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if (gpReturnIndexes[valueIndex] != BaseReg::kIdBad)
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func._rets[valueIndex].initReg(RegType::kX86_Gpq, gpReturnIndexes[valueIndex], typeId);
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else
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return DebugUtils::errored(kErrorInvalidState);
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break;
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}
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case TypeId::kInt8:
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case TypeId::kInt16:
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case TypeId::kInt32: {
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if (gpReturnIndexes[valueIndex] != BaseReg::kIdBad)
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func._rets[valueIndex].initReg(RegType::kX86_Gpd, gpReturnIndexes[valueIndex], TypeId::kInt32);
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else
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return DebugUtils::errored(kErrorInvalidState);
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break;
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}
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case TypeId::kUInt8:
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case TypeId::kUInt16:
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case TypeId::kUInt32: {
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if (gpReturnIndexes[valueIndex] != BaseReg::kIdBad)
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func._rets[valueIndex].initReg(RegType::kX86_Gpd, gpReturnIndexes[valueIndex], TypeId::kUInt32);
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else
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return DebugUtils::errored(kErrorInvalidState);
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break;
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}
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case TypeId::kFloat32:
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case TypeId::kFloat64: {
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RegType regType = Environment::is32Bit(arch) ? RegType::kX86_St : RegType::kX86_Xmm;
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func._rets[valueIndex].initReg(regType, valueIndex, typeId);
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break;
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}
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case TypeId::kFloat80: {
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// 80-bit floats are always returned by FP0.
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func._rets[valueIndex].initReg(RegType::kX86_St, valueIndex, typeId);
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break;
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}
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case TypeId::kMmx32:
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case TypeId::kMmx64: {
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// MM registers are returned through XMM (SystemV) or GPQ (Win64).
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RegType regType = RegType::kX86_Mm;
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uint32_t regIndex = valueIndex;
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if (Environment::is64Bit(arch)) {
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regType = cc.strategy() == CallConvStrategy::kDefault ? RegType::kX86_Xmm : RegType::kX86_Gpq;
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regIndex = cc.strategy() == CallConvStrategy::kDefault ? valueIndex : gpReturnIndexes[valueIndex];
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if (regIndex == BaseReg::kIdBad)
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return DebugUtils::errored(kErrorInvalidState);
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}
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func._rets[valueIndex].initReg(regType, regIndex, typeId);
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break;
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}
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default: {
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func._rets[valueIndex].initReg(vecTypeIdToRegType(typeId), valueIndex, typeId);
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break;
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}
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}
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}
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}
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|
||
|
|
switch (cc.strategy()) {
|
||
|
|
case CallConvStrategy::kDefault: {
|
||
|
|
uint32_t gpzPos = 0;
|
||
|
|
uint32_t vecPos = 0;
|
||
|
|
|
||
|
|
for (uint32_t argIndex = 0; argIndex < argCount; argIndex++) {
|
||
|
|
unpackValues(func, func._args[argIndex]);
|
||
|
|
|
||
|
|
for (uint32_t valueIndex = 0; valueIndex < Globals::kMaxValuePack; valueIndex++) {
|
||
|
|
FuncValue& arg = func._args[argIndex][valueIndex];
|
||
|
|
|
||
|
|
// Terminate if there are no more arguments in the pack.
|
||
|
|
if (!arg)
|
||
|
|
break;
|
||
|
|
|
||
|
|
TypeId typeId = arg.typeId();
|
||
|
|
|
||
|
|
if (TypeUtils::isInt(typeId)) {
|
||
|
|
uint32_t regId = BaseReg::kIdBad;
|
||
|
|
|
||
|
|
if (gpzPos < CallConv::kMaxRegArgsPerGroup)
|
||
|
|
regId = cc._passedOrder[RegGroup::kGp].id[gpzPos];
|
||
|
|
|
||
|
|
if (regId != BaseReg::kIdBad) {
|
||
|
|
RegType regType = typeId <= TypeId::kUInt32 ? RegType::kX86_Gpd : RegType::kX86_Gpq;
|
||
|
|
arg.assignRegData(regType, regId);
|
||
|
|
func.addUsedRegs(RegGroup::kGp, Support::bitMask(regId));
|
||
|
|
gpzPos++;
|
||
|
|
}
|
||
|
|
else {
|
||
|
|
uint32_t size = Support::max<uint32_t>(TypeUtils::sizeOf(typeId), registerSize);
|
||
|
|
arg.assignStackOffset(int32_t(stackOffset));
|
||
|
|
stackOffset += size;
|
||
|
|
}
|
||
|
|
continue;
|
||
|
|
}
|
||
|
|
|
||
|
|
if (TypeUtils::isFloat(typeId) || TypeUtils::isVec(typeId)) {
|
||
|
|
uint32_t regId = BaseReg::kIdBad;
|
||
|
|
|
||
|
|
if (vecPos < CallConv::kMaxRegArgsPerGroup)
|
||
|
|
regId = cc._passedOrder[RegGroup::kVec].id[vecPos];
|
||
|
|
|
||
|
|
if (TypeUtils::isFloat(typeId)) {
|
||
|
|
// If this is a float, but `kFlagPassFloatsByVec` is false, we have to use stack instead. This should
|
||
|
|
// be only used by 32-bit calling conventions.
|
||
|
|
if (!cc.hasFlag(CallConvFlags::kPassFloatsByVec))
|
||
|
|
regId = BaseReg::kIdBad;
|
||
|
|
}
|
||
|
|
else {
|
||
|
|
// Pass vector registers via stack if this is a variable arguments function. This should be only used
|
||
|
|
// by 32-bit calling conventions.
|
||
|
|
if (signature.hasVarArgs() && cc.hasFlag(CallConvFlags::kPassVecByStackIfVA))
|
||
|
|
regId = BaseReg::kIdBad;
|
||
|
|
}
|
||
|
|
|
||
|
|
if (regId != BaseReg::kIdBad) {
|
||
|
|
arg.initTypeId(typeId);
|
||
|
|
arg.assignRegData(vecTypeIdToRegType(typeId), regId);
|
||
|
|
func.addUsedRegs(RegGroup::kVec, Support::bitMask(regId));
|
||
|
|
vecPos++;
|
||
|
|
}
|
||
|
|
else {
|
||
|
|
uint32_t size = TypeUtils::sizeOf(typeId);
|
||
|
|
arg.assignStackOffset(int32_t(stackOffset));
|
||
|
|
stackOffset += size;
|
||
|
|
}
|
||
|
|
continue;
|
||
|
|
}
|
||
|
|
}
|
||
|
|
}
|
||
|
|
break;
|
||
|
|
}
|
||
|
|
|
||
|
|
case CallConvStrategy::kX64Windows:
|
||
|
|
case CallConvStrategy::kX64VectorCall: {
|
||
|
|
// Both X64 and VectorCall behave similarly - arguments are indexed from left to right. The position of the
|
||
|
|
// argument determines in which register the argument is allocated, so it's either GP or one of XMM/YMM/ZMM
|
||
|
|
// registers.
|
||
|
|
//
|
||
|
|
// [ X64 ] [VecCall]
|
||
|
|
// Index: #0 #1 #2 #3 #4 #5
|
||
|
|
//
|
||
|
|
// GP : RCX RDX R8 R9
|
||
|
|
// VEC : XMM0 XMM1 XMM2 XMM3 XMM4 XMM5
|
||
|
|
//
|
||
|
|
// For example function `f(int a, double b, int c, double d)` will be:
|
||
|
|
//
|
||
|
|
// (a) (b) (c) (d)
|
||
|
|
// RCX XMM1 R8 XMM3
|
||
|
|
//
|
||
|
|
// Unused vector registers are used by HVA.
|
||
|
|
bool isVectorCall = (cc.strategy() == CallConvStrategy::kX64VectorCall);
|
||
|
|
|
||
|
|
for (uint32_t argIndex = 0; argIndex < argCount; argIndex++) {
|
||
|
|
unpackValues(func, func._args[argIndex]);
|
||
|
|
|
||
|
|
for (uint32_t valueIndex = 0; valueIndex < Globals::kMaxValuePack; valueIndex++) {
|
||
|
|
FuncValue& arg = func._args[argIndex][valueIndex];
|
||
|
|
|
||
|
|
// Terminate if there are no more arguments in the pack.
|
||
|
|
if (!arg)
|
||
|
|
break;
|
||
|
|
|
||
|
|
TypeId typeId = arg.typeId();
|
||
|
|
uint32_t size = TypeUtils::sizeOf(typeId);
|
||
|
|
|
||
|
|
if (TypeUtils::isInt(typeId) || TypeUtils::isMmx(typeId)) {
|
||
|
|
uint32_t regId = BaseReg::kIdBad;
|
||
|
|
|
||
|
|
if (argIndex < CallConv::kMaxRegArgsPerGroup)
|
||
|
|
regId = cc._passedOrder[RegGroup::kGp].id[argIndex];
|
||
|
|
|
||
|
|
if (regId != BaseReg::kIdBad) {
|
||
|
|
RegType regType = size <= 4 && !TypeUtils::isMmx(typeId) ? RegType::kX86_Gpd : RegType::kX86_Gpq;
|
||
|
|
arg.assignRegData(regType, regId);
|
||
|
|
func.addUsedRegs(RegGroup::kGp, Support::bitMask(regId));
|
||
|
|
}
|
||
|
|
else {
|
||
|
|
arg.assignStackOffset(int32_t(stackOffset));
|
||
|
|
stackOffset += 8;
|
||
|
|
}
|
||
|
|
continue;
|
||
|
|
}
|
||
|
|
|
||
|
|
if (TypeUtils::isFloat(typeId) || TypeUtils::isVec(typeId)) {
|
||
|
|
uint32_t regId = BaseReg::kIdBad;
|
||
|
|
|
||
|
|
if (argIndex < CallConv::kMaxRegArgsPerGroup)
|
||
|
|
regId = cc._passedOrder[RegGroup::kVec].id[argIndex];
|
||
|
|
|
||
|
|
if (regId != BaseReg::kIdBad) {
|
||
|
|
// X64-ABI doesn't allow vector types (XMM|YMM|ZMM) to be passed via registers, however, VectorCall
|
||
|
|
// was designed for that purpose.
|
||
|
|
if (TypeUtils::isFloat(typeId) || isVectorCall) {
|
||
|
|
RegType regType = vecTypeIdToRegType(typeId);
|
||
|
|
arg.assignRegData(regType, regId);
|
||
|
|
func.addUsedRegs(RegGroup::kVec, Support::bitMask(regId));
|
||
|
|
continue;
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
// Passed via stack if the argument is float/double or indirectly. The trap is - if the argument is
|
||
|
|
// passed indirectly, the address can be passed via register, if the argument's index has GP one.
|
||
|
|
if (TypeUtils::isFloat(typeId)) {
|
||
|
|
arg.assignStackOffset(int32_t(stackOffset));
|
||
|
|
}
|
||
|
|
else {
|
||
|
|
uint32_t gpRegId = cc._passedOrder[RegGroup::kGp].id[argIndex];
|
||
|
|
if (gpRegId != BaseReg::kIdBad)
|
||
|
|
arg.assignRegData(RegType::kX86_Gpq, gpRegId);
|
||
|
|
else
|
||
|
|
arg.assignStackOffset(int32_t(stackOffset));
|
||
|
|
arg.addFlags(FuncValue::kFlagIsIndirect);
|
||
|
|
}
|
||
|
|
|
||
|
|
// Always 8 bytes (float/double/pointer).
|
||
|
|
stackOffset += 8;
|
||
|
|
continue;
|
||
|
|
}
|
||
|
|
}
|
||
|
|
}
|
||
|
|
break;
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
func._argStackSize = stackOffset;
|
||
|
|
return kErrorOk;
|
||
|
|
}
|
||
|
|
|
||
|
|
} // {FuncInternal}
|
||
|
|
|
||
|
|
ASMJIT_END_SUB_NAMESPACE
|
||
|
|
|
||
|
|
#endif // !ASMJIT_NO_X86
|