Rim/iw6-mod
Rim/iw6-mod
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases 1 Wiki Activity

chore: update deps

Browse Source
This commit is contained in:
Rim 2025-02-20 05:32:33 -05:00
parent 402f9626cb
commit 0e1471de1f
1009 changed files with 26087 additions and 13302 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

50
deps/GSL/.github/workflows/android.yml vendored
View File

@ -1,50 +0,0 @@
name: CI_Android
on:
push:
branches: [ main ]
pull_request:
branches: [ main ]
jobs:
Android:
runs-on: macos-latest
defaults:
run:
working-directory: build
steps:
- uses: actions/checkout@v4
- name: Create build directory
run: mkdir -p build
working-directory: .
- name: Start emulator
run: |
echo "y" | $ANDROID_HOME/tools/bin/sdkmanager --install 'system-images;android-24;default;x86_64'
echo "no" | $ANDROID_HOME/tools/bin/avdmanager create avd -n xamarin_android_emulator -k 'system-images;android-24;default;x86_64' --force
$ANDROID_HOME/emulator/emulator -list-avds
echo "Starting emulator"
# Start emulator in background
nohup $ANDROID_HOME/emulator/emulator -avd xamarin_android_emulator -no-snapshot > /dev/null 2>&1 &
echo "Emulator starting"
- name: Configure
run: cmake -Werror=dev -DCMAKE_TOOLCHAIN_FILE=$ANDROID_NDK_LATEST_HOME/build/cmake/android.toolchain.cmake -DANDROID_PLATFORM=16 -DANDROID_ABI=x86_64 -DCMAKE_BUILD_TYPE=Debug ..
- name: Build
run: cmake --build . --parallel
- name: Wait for emulator ready
run: |
$ANDROID_HOME/platform-tools/adb wait-for-device shell 'while [[ -z $(getprop sys.boot_completed | tr -d '\r') ]]; do sleep 10; done; input keyevent 82'
$ANDROID_HOME/platform-tools/adb devices
$ANDROID_HOME/platform-tools/adb shell getprop ro.product.cpu.abi
echo "Emulator started"
- name: Deploy tests
run: |
adb push tests /data/local/tmp
adb shell find /data/local/tmp/tests -maxdepth 1 -exec chmod +x {} \\\;
- name: Test
run: adb shell find /data/local/tmp/tests -name "*_tests" -maxdepth 1 -exec {} \\\;

25
deps/GSL/.github/workflows/cmake_find_package.yml vendored
View File

@ -1,25 +0,0 @@
name: cmake_find_package
on:
push:
branches: [ main ]
pull_request:
branches: [ main ]
jobs:
cmake-find-package:
name: Build ${{ matrix.os }}
runs-on: ${{ matrix.os }}
strategy:
matrix:
os: [ ubuntu-latest, macos-latest ]
steps:
- uses: actions/checkout@v4
- uses: lukka/get-cmake@latest
with:
cmakeVersion: 3.14.0
- name: Configure GSL
run: cmake -S . -B build -G "Ninja" -D GSL_TEST=OFF -D CMAKE_INSTALL_PREFIX=${GITHUB_WORKSPACE}/build/install
- name: Install GSL
run: cmake --build build --target install
- name: Test GSL find_package support
run: cmake -S tests/ -B build/tests_find_package -G "Ninja" -D CMAKE_PREFIX_PATH=${GITHUB_WORKSPACE}/build/install -D CMAKE_BUILD_TYPE=Release

52
deps/GSL/.github/workflows/ios.yml vendored
View File

@ -1,52 +0,0 @@
name: CI_iOS
on:
push:
branches: [ main ]
pull_request:
branches: [ main ]
jobs:
iOS:
runs-on: macos-latest
defaults:
run:
working-directory: build
steps:
- uses: actions/checkout@v4
- name: Create build directory
run: mkdir -p build
working-directory: .
- name: Configure
run: |
cmake \
-Werror=dev \
-GXcode \
-DCMAKE_SYSTEM_NAME=iOS \
"-DCMAKE_OSX_ARCHITECTURES=arm64;x86_64" \
-DCMAKE_OSX_DEPLOYMENT_TARGET=9 \
-DCMAKE_TRY_COMPILE_TARGET_TYPE=STATIC_LIBRARY \
"-DMACOSX_BUNDLE_GUI_IDENTIFIER=GSL.\$(EXECUTABLE_NAME)" \
-DMACOSX_BUNDLE_BUNDLE_VERSION=3.1.0 \
-DMACOSX_BUNDLE_SHORT_VERSION_STRING=3.1.0 \
..
- name: Build
run: cmake --build . --parallel `sysctl -n hw.ncpu` --config Release -- -sdk iphonesimulator
- name: Start simulator
run: |
RUNTIME=`xcrun simctl list runtimes iOS -j|jq '.runtimes|last.identifier'`
UDID=`xcrun simctl list devices iPhone available -j|jq -r ".devices[$RUNTIME]|last.udid"`
xcrun simctl bootstatus $UDID -b
- name: Test
run: |
for TEST in `find tests/Release-iphonesimulator -depth 1 -name "*.app"`
do
xcrun simctl install booted $TEST
TEST_ID=`plutil -convert json -o - $TEST/Info.plist|jq -r ".CFBundleIdentifier"`
xcrun simctl launch --console booted $TEST_ID
xcrun simctl uninstall booted $TEST_ID
done

2
deps/GSL/CMakeLists.txt vendored
View File

@ -1,6 +1,6 @@
cmake_minimum_required(VERSION 3.14...3.16)
project(GSL VERSION 4.0.0 LANGUAGES CXX)
project(GSL VERSION 4.1.0 LANGUAGES CXX)
add_library(GSL INTERFACE)
add_library(Microsoft.GSL::GSL ALIAS GSL)

38
deps/GSL/README.md vendored
View File

@ -1,5 +1,6 @@
# GSL: Guidelines Support Library
[![Build Status](https://dev.azure.com/cppstat/GSL/_apis/build/status/microsoft.GSL?branchName=main)](https://dev.azure.com/cppstat/GSL/_build/latest?definitionId=1&branchName=main)
[![CI](https://github.com/Microsoft/GSL/actions/workflows/compilers.yml/badge.svg)](https://github.com/microsoft/GSL/actions/workflows/compilers.yml?query=branch%3Amain)
[![vcpkg](https://img.shields.io/vcpkg/v/ms-gsl)](https://vcpkg.io/en/package/ms-gsl)
The Guidelines Support Library (GSL) contains functions and types that are suggested for use by the
[C++ Core Guidelines](https://github.com/isocpp/CppCoreGuidelines) maintained by the [Standard C++ Foundation](https://isocpp.org).
@ -86,24 +87,17 @@ This is based on [CppCoreGuidelines semi-specification](https://github.com/isocp
# Quick Start
## Supported Compilers / Toolsets
The GSL officially supports the latest and previous major versions of VS with MSVC & LLVM, GCC, Clang, and XCode with Apple-Clang.
Within these two major versions, we try to target the latest minor updates / revisions (although this may be affected by
delays between a toolchain's release and when it becomes widely available for use).
Below is a table showing the versions currently being tested.
The GSL officially supports recent major versions of Visual Studio with both MSVC and LLVM, GCC, Clang, and XCode with Apple-Clang.
For each of these major versions, the GSL officially supports C++14, C++17, C++20, and C++23 (when supported by the compiler).
Below is a table showing the versions currently being tested (also see [.github/workflows/compilers.yml](the workflow).)
Compiler |Toolset Versions Currently Tested
:------- |--:
XCode | 13.2.1 & 12.5.1
GCC | 11[^1] & 10[^2]
Clang | 12[^2] & 11[^2]
Visual Studio with MSVC | VS2022[^3] & VS2019[^4]
Visual Studio with LLVM | VS2022[^3] & VS2019[^4]
[^1]: Precise version may be found in the [latest CI results](https://dev.azure.com/cppstat/GSL/_build?definitionId=1&branchFilter=26).
[^2]: Precise version may be found in the [latest CI results](https://dev.azure.com/cppstat/GSL/_build?definitionId=1&branchFilter=26). Should be the version specified [here](https://github.com/actions/virtual-environments/blob/main/images/linux/Ubuntu2004-Readme.md#language-and-runtime).
[^3]: Precise version may be found in the [latest CI results](https://dev.azure.com/cppstat/GSL/_build?definitionId=1&branchFilter=26). Should be the version specified [here](https://github.com/actions/virtual-environments/blob/main/images/win/Windows2022-Readme.md#visual-studio-enterprise-2022).
[^4]: Precise version may be found in the [latest CI results](https://dev.azure.com/cppstat/GSL/_build?definitionId=1&branchFilter=26). Should be the version specified [here](https://github.com/actions/virtual-environments/blob/main/images/win/Windows2019-Readme.md#visual-studio-enterprise-2019).
GCC | 10, 11, 12
XCode | 14.3.1, 15.4
Clang | 13, 14, 15
Visual Studio with MSVC | VS2019, VS2022
Visual Studio with LLVM | VS2019, VS2022
---
If you successfully port GSL to another platform, we would love to hear from you!
@ -113,8 +107,8 @@ If you successfully port GSL to another platform, we would love to hear from you
Target | CI/CD Status
:------- | -----------:
iOS | ![CI_iOS](https://github.com/microsoft/GSL/workflows/CI_iOS/badge.svg)
Android | ![CI_Android](https://github.com/microsoft/GSL/workflows/CI_Android/badge.svg)
iOS | [![CI_iOS](https://github.com/microsoft/GSL/workflows/CI_iOS/badge.svg?branch=main)](https://github.com/microsoft/GSL/actions/workflows/ios.yml?query=branch%3Amain)
Android | [![CI_Android](https://github.com/microsoft/GSL/workflows/CI_Android/badge.svg?branch=main)](https://github.com/microsoft/GSL/actions/workflows/android.yml?query=branch%3Amain)
Note: These CI/CD steps are run with each pull request, however failures in them are non-blocking.
@ -192,7 +186,7 @@ target_link_libraries(foobar PRIVATE Microsoft.GSL::GSL)
### FetchContent
If you are using CMake version 3.11+ you can use the offical [FetchContent module](https://cmake.org/cmake/help/latest/module/FetchContent.html).
If you are using CMake version 3.11+ you can use the official [FetchContent module](https://cmake.org/cmake/help/latest/module/FetchContent.html).
This allows you to easily incorporate GSL into your project.
```cmake
@ -204,7 +198,7 @@ include(FetchContent)
FetchContent_Declare(GSL
GIT_REPOSITORY "https://github.com/microsoft/GSL"
GIT_TAG "v4.0.0"
GIT_TAG "v4.1.0"
GIT_SHALLOW ON
)
@ -216,3 +210,7 @@ target_link_libraries(foobar PRIVATE Microsoft.GSL::GSL)
## Debugging visualization support
For Visual Studio users, the file [GSL.natvis](./GSL.natvis) in the root directory of the repository can be added to your project if you would like more helpful visualization of GSL types in the Visual Studio debugger than would be offered by default.
## See Also
For information on [Microsoft Gray Systems Lab (GSL)](https://aka.ms/gsl) of applied data management and system research see <https://aka.ms/gsl>.

66
deps/GSL/azure-pipelines.yml vendored
View File

@ -1,66 +0,0 @@
trigger:
- main
pr:
autoCancel: true
stages:
- stage: GCC
dependsOn: []
jobs:
- template: ./pipelines/jobs.yml
parameters:
compiler: gcc
image: ubuntu-20.04
compilerVersions: [ 11, 10 ]
setupfile: 'setup_gcc.yml'
- stage: Clang
dependsOn: []
jobs:
- template: ./pipelines/jobs.yml
parameters:
compiler: clang
image: ubuntu-20.04
compilerVersions: [ 12, 11 ]
setupfile: 'setup_clang.yml'
- stage: Xcode
dependsOn: []
jobs:
- template: ./pipelines/jobs.yml
parameters:
compiler: 'Xcode'
image: macOS-11
compilerVersions: [ '12.5.1', '13.2.1' ]
setupfile: 'setup_apple.yml'
- stage: VS_MSVC
dependsOn: []
jobs:
- template: ./pipelines/jobs.yml
parameters:
compiler: 'VS2019 (MSVC)'
compilerVersions: [ 'default' ]
image: windows-2019
- template: ./pipelines/jobs.yml
parameters:
compiler: 'VS2022 (MSVC)'
compilerVersions: [ 'default' ]
image: windows-2022
- stage: VS_LLVM
dependsOn: []
jobs:
- template: ./pipelines/jobs.yml
parameters:
compiler: 'VS2019 (LLVM)'
compilerVersions: [ 'default' ]
image: windows-2019
extraCmakeArgs: '-T ClangCL'
- template: ./pipelines/jobs.yml
parameters:
compiler: 'VS2022 (LLVM)'
compilerVersions: [ 'default' ]
image: windows-2022
extraCmakeArgs: '-T ClangCL'

29
deps/GSL/docs/headers.md vendored
View File

@ -133,6 +133,13 @@ constexpr byte operator~(byte b) noexcept;
Bitwise negation of a `byte`. Flips all bits. Zeroes become ones, ones become zeroes.
```cpp
template <class IntegerType, class = std::enable_if_t<std::is_integral<IntegerType>::value>>
constexpr IntegerType to_integer(byte b) noexcept;
```
Convert the given `byte` value to an integral type.
```cpp
template <typename T>
constexpr byte to_byte(T t) noexcept;
@ -287,6 +294,12 @@ void operator[](std::ptrdiff_t) const = delete;
Array index operator is explicitly deleted. Pointers point to single objects ([I.13: Do not pass an array as a single pointer](http://isocpp.github.io/CppCoreGuidelines/CppCoreGuidelines#Ri-array)), so don't allow treating them as an array.
```cpp
void swap(not_null<T>& other) { std::swap(ptr_, other.ptr_); }
```
Swaps contents with another `gsl::not_null` object.
#### Non-member functions
```cpp
@ -296,6 +309,13 @@ auto make_not_null(T&& t) noexcept;
Creates a `gsl::not_null` object, deducing the target type from the type of the argument.
```cpp
template <typename T, typename = std::enable_if_t<std::is_move_assignable<T>::value && std::is_move_constructible<T>::value>>
void swap(not_null<T>& a, not_null<T>& b);
```
Swaps the contents of two `gsl::not_null` objects.
```cpp
template <class T, class U>
auto operator==(const not_null<T>& lhs,
@ -804,7 +824,7 @@ void operator=(const final_action&) = delete;
void operator=(final_action&&) = delete;
```
Move construction is allowed. Copy construction is deleted. Copy and move assignment are also explicitely deleted.
Move construction is allowed. Copy construction is deleted. Copy and move assignment are also explicitly deleted.
#### <a name="H-util-finally" />Non-member functions
```cpp
@ -851,3 +871,10 @@ constexpr auto at(std::span<T, extent> sp, const index i) -> decltype(sp[sp.size
This overload returns a reference to the `i`s element of the `std::span` `sp`. It [`Expects`](#user-content-H-assert-expects) that the provided index is within the bounds of the array.
For [`gsl::at`](#user-content-H-span_ext-at) for [`gsl::span`](#user-content-H-span-span) see header [`span_ext`](#user-content-H-span_ext).
```cpp
template <class T, std::enable_if_t<std::is_move_assignable<T>::value && std::is_move_constructible<T>::value>>
void swap(T& a, T& b);
```
Swaps the contents of two objects. Exists only to specialize `gsl::swap<T>(gsl::not_null<T>&, gsl::not_null<T>&)`.

11
deps/GSL/include/gsl/byte vendored
View File

@ -19,8 +19,6 @@
#include <type_traits>
// VS2017 15.8 added support for the __cpp_lib_byte definition
// To do: drop _HAS_STD_BYTE when support for pre 15.8 expires
#ifdef _MSC_VER
#pragma warning(push)
@ -31,18 +29,15 @@
#ifndef GSL_USE_STD_BYTE
// this tests if we are under MSVC and the standard lib has std::byte and it is enabled
#if (defined(_HAS_STD_BYTE) && _HAS_STD_BYTE) || \
(defined(__cpp_lib_byte) && __cpp_lib_byte >= 201603)
#if defined(__cpp_lib_byte) && __cpp_lib_byte >= 201603
#define GSL_USE_STD_BYTE 1
#else // (defined(_HAS_STD_BYTE) && _HAS_STD_BYTE) || (defined(__cpp_lib_byte) && __cpp_lib_byte >=
// 201603)
#else // defined(__cpp_lib_byte) && __cpp_lib_byte >= 201603
#define GSL_USE_STD_BYTE 0
#endif // (defined(_HAS_STD_BYTE) && _HAS_STD_BYTE) || (defined(__cpp_lib_byte) && __cpp_lib_byte >=
// 201603)
#endif // defined(__cpp_lib_byte) && __cpp_lib_byte >= 201603
#endif // GSL_USE_STD_BYTE
#else // _MSC_VER

2
deps/GSL/include/gsl/gsl vendored
View File

@ -17,6 +17,7 @@
#ifndef GSL_GSL_H
#define GSL_GSL_H
// IWYU pragma: begin_exports
#include "algorithm" // copy
#include "assert" // Ensures/Expects
#include "byte" // byte
@ -28,5 +29,6 @@
#ifdef __cpp_exceptions
#include "narrow" // narrow()
#endif
// IWYU pragma: end_exports
#endif // GSL_GSL_H

6
deps/GSL/include/gsl/narrow vendored
View File

@ -30,13 +30,12 @@ struct narrowing_error : public std::exception
template <class T, class U, typename std::enable_if<std::is_arithmetic<T>::value>::type* = nullptr>
// clang-format off
GSL_SUPPRESS(type.1) // NO-FORMAT: attribute
GSL_SUPPRESS(f.6) // NO-FORMAT: attribute // TODO: MSVC /analyze does not recognise noexcept(false)
GSL_SUPPRESS(es.46) // NO-FORMAT: attribute // The warning suggests that a floating->unsigned conversion can occur
// in the static_cast below, and that gsl::narrow should be used instead.
// Suppress this warning, since gsl::narrow is defined in terms of
// static_cast
// clang-format on
constexpr T narrow(U u) noexcept(false)
constexpr T narrow(U u)
{
constexpr const bool is_different_signedness =
(std::is_signed<T>::value != std::is_signed<U>::value);
@ -67,9 +66,8 @@ GSL_SUPPRESS(p.2) // NO-FORMAT: attribute // don't rely on undefined behavior
template <class T, class U, typename std::enable_if<!std::is_arithmetic<T>::value>::type* = nullptr>
// clang-format off
GSL_SUPPRESS(type.1) // NO-FORMAT: attribute
GSL_SUPPRESS(f.6) // NO-FORMAT: attribute // TODO: MSVC /analyze does not recognise noexcept(false)
// clang-format on
constexpr T narrow(U u) noexcept(false)
constexpr T narrow(U u)
{
const T t = narrow_cast<T>(u);

19
deps/GSL/include/gsl/pointers vendored
View File

@ -19,12 +19,11 @@
#include "assert" // for Ensures, Expects
#include <algorithm> // for forward
#include <cstddef> // for ptrdiff_t, nullptr_t, size_t
#include <memory> // for shared_ptr, unique_ptr
#include <system_error> // for hash
#include <functional> // for less, greater
#include <memory> // for shared_ptr, unique_ptr, hash
#include <type_traits> // for enable_if_t, is_convertible, is_assignable
#include <utility> // for declval
#include <utility> // for declval, forward
#if !defined(GSL_NO_IOSTREAMS)
#include <iosfwd> // for ostream
@ -76,7 +75,7 @@ using std::unique_ptr;
// T must be a pointer type
// - disallow construction from any type other than pointer type
//
template <class T, class = std::enable_if_t<std::is_pointer<T>::value>>
template <class T, std::enable_if_t<std::is_pointer<T>::value, bool> = true>
using owner = T;
//
@ -118,7 +117,7 @@ public:
not_null(const not_null& other) = default;
not_null& operator=(const not_null& other) = default;
constexpr details::value_or_reference_return_t<T> get() const
noexcept(noexcept(details::value_or_reference_return_t<T>{std::declval<T&>()}))
noexcept(noexcept(details::value_or_reference_return_t<T>(std::declval<T&>())))
{
return ptr_;
}
@ -140,10 +139,18 @@ public:
not_null& operator-=(std::ptrdiff_t) = delete;
void operator[](std::ptrdiff_t) const = delete;
void swap(not_null<T>& other) { std::swap(ptr_, other.ptr_); }
private:
T ptr_;
};
template <typename T, typename = std::enable_if_t<std::is_move_assignable<T>::value && std::is_move_constructible<T>::value>>
void swap(not_null<T>& a, not_null<T>& b)
{
a.swap(b);
}
template <class T>
auto make_not_null(T&& t) noexcept
{

30
deps/GSL/include/gsl/span vendored
View File

@ -63,6 +63,14 @@
#pragma GCC diagnostic ignored "-Wsign-conversion"
#endif
// Turn off clang unsafe buffer warnings as all accessed are guarded by runtime checks
#if defined(__clang__)
#if __has_warning("-Wunsafe-buffer-usage")
#pragma clang diagnostic push
#pragma clang diagnostic ignored "-Wunsafe-buffer-usage"
#endif // __has_warning("-Wunsafe-buffer-usage")
#endif // defined(__clang__)
namespace gsl
{
@ -132,7 +140,9 @@ namespace details
constexpr span_iterator(pointer begin, pointer end, pointer current)
: begin_(begin), end_(end), current_(current)
{}
{
Expects(begin_ <= current_ && current <= end_);
}
constexpr operator span_iterator<const Type>() const noexcept
{
@ -141,21 +151,18 @@ namespace details
constexpr reference operator*() const noexcept
{
Expects(begin_ && end_);
Expects(begin_ <= current_ && current_ < end_);
Expects(current_ != end_);
return *current_;
}
constexpr pointer operator->() const noexcept
{
Expects(begin_ && end_);
Expects(begin_ <= current_ && current_ < end_);
Expects(current_ != end_);
return current_;
}
constexpr span_iterator& operator++() noexcept
{
Expects(begin_ && current_ && end_);
Expects(current_ < end_);
Expects(current_ != end_);
// clang-format off
GSL_SUPPRESS(bounds.1) // NO-FORMAT: attribute
// clang-format on
@ -172,8 +179,7 @@ namespace details
constexpr span_iterator& operator--() noexcept
{
Expects(begin_ && end_);
Expects(begin_ < current_);
Expects(begin_ != current_);
--current_;
return *this;
}
@ -846,4 +852,10 @@ as_writable_bytes(span<ElementType, Extent> s) noexcept
#pragma GCC diagnostic pop
#endif // __GNUC__ > 6
#if defined(__clang__)
#if __has_warning("-Wunsafe-buffer-usage")
#pragma clang diagnostic pop
#endif // __has_warning("-Wunsafe-buffer-usage")
#endif // defined(__clang__)
#endif // GSL_SPAN_H

17
deps/GSL/include/gsl/util vendored
View File

@ -40,6 +40,14 @@
#endif // _MSC_VER
// Turn off clang unsafe buffer warnings as all accessed are guarded by runtime checks
#if defined(__clang__)
#if __has_warning("-Wunsafe-buffer-usage")
#pragma clang diagnostic push
#pragma clang diagnostic ignored "-Wunsafe-buffer-usage"
#endif // __has_warning("-Wunsafe-buffer-usage")
#endif // defined(__clang__)
#if defined(__cplusplus) && (__cplusplus >= 201703L)
#define GSL_NODISCARD [[nodiscard]]
#else
@ -138,6 +146,9 @@ GSL_SUPPRESS(bounds.1) // NO-FORMAT: attribute
return *(cont.begin() + i);
}
template <class T, std::enable_if_t<std::is_move_assignable<T>::value && std::is_move_constructible<T>::value>>
void swap(T& a, T& b) { std::swap(a, b); }
#if defined(__cpp_lib_span) && __cpp_lib_span >= 202002L
template <class T, std::size_t extent = std::dynamic_extent>
constexpr auto at(std::span<T, extent> sp, const index i) -> decltype(sp[sp.size()])
@ -154,4 +165,10 @@ constexpr auto at(std::span<T, extent> sp, const index i) -> decltype(sp[sp.size
#endif // _MSC_VER
#if defined(__clang__)
#if __has_warning("-Wunsafe-buffer-usage")
#pragma clang diagnostic pop
#endif // __has_warning("-Wunsafe-buffer-usage")
#endif // defined(__clang__)
#endif // GSL_UTIL_H

43
deps/GSL/pipelines/jobs.yml vendored
View File

@ -1,43 +0,0 @@
parameters:
CXXVersions: [ 14, 17, 20 ]
buildTypes: [ 'Debug', 'Release' ]
image: ''
compiler: ''
compilerVersions: ["default"] # if default value, simply uses whatever version is on the machine.
# the text of this default value doesn't actually matter.
setupfile: ''
extraCmakeArgs: ''
jobs:
- ${{ each compilerVersion in parameters.compilerVersions }}:
- ${{ each CXXVersion in parameters.CXXVersions }}:
- ${{ each buildType in parameters.buildTypes }}:
- job:
displayName: ${{ format('{0} {1} C++{2} {3}', parameters.compiler, compilerVersion, CXXVersion, buildType) }}
pool:
vmImage: ${{ parameters.image }}
continueOnError: false
steps:
- ${{ if not(eq(parameters.setupfile, '')) }}:
- template: ${{ parameters.setupfile }}
parameters:
version: ${{ compilerVersion }}
- task: CMake@1
name: Configure
inputs:
workingDirectory: build
cmakeArgs: '-DGSL_CXX_STANDARD=${{ CXXVersion }} -DCMAKE_BUILD_TYPE=${{ buildType }} -DCI_TESTING:BOOL=ON -DCMAKE_VERBOSE_MAKEFILE:BOOL=ON -Werror=dev ${{ parameters.extraCmakeArgs }} .. '
- task: CMake@1
name: Build
inputs:
workingDirectory: build
cmakeArgs: '--build . '
- script: ctest . --output-on-failure --no-compress-output
name: CTest
workingDirectory: build
failOnStderr: true

9
deps/GSL/pipelines/setup_apple.yml vendored
View File

@ -1,9 +0,0 @@
parameters:
version: 0
steps:
- script: |
if [ "${{ parameters.version }}" != "default" ]; then sudo xcode-select -switch /Applications/Xcode_${{ parameters.version }}.app; fi
displayName: "Setup Xcode Version"
failOnStderr: true

13
deps/GSL/pipelines/setup_clang.yml vendored
View File

@ -1,13 +0,0 @@
parameters:
version: 0
steps:
- script: |
echo "##vso[task.setvariable variable=CXX;]${CXX}"
echo "##vso[task.setvariable variable=CC;]${CC}"
displayName: "Setup Clang Version"
failOnStderr: true
env:
CC: clang-${{ parameters.version }}
CXX: clang++-${{ parameters.version }}

14
deps/GSL/pipelines/setup_gcc.yml vendored
View File

@ -1,14 +0,0 @@
parameters:
version: 0
steps:
- script: |
echo "##vso[task.setvariable variable=CXX;]${CXX}"
echo "##vso[task.setvariable variable=CC;]${CC}"
if [ "${{ parameters.version }}" = "11" ]; then sudo apt-get install $CXX; fi
displayName: "Setup GCC Version"
failOnStderr: true
env:
CC: gcc-${{ parameters.version }}
CXX: g++-${{ parameters.version }}

0
deps/GSL/pipelines/steps.yml vendored
View File

23
deps/GSL/tests/CMakeLists.txt vendored
View File

@ -110,6 +110,7 @@ if(MSVC) # MSVC or simulating MSVC
-Wno-shift-sign-overflow # GTest gtest-port.h
-Wno-undef # GTest
-Wno-used-but-marked-unused # GTest EXPECT_DEATH
-Wno-switch-default # GTest EXPECT_DEATH
$<$<EQUAL:${GSL_CXX_STANDARD},14>: # no support for [[maybe_unused]]
-Wno-unused-member-function
-Wno-unused-variable
@ -123,11 +124,6 @@ if(MSVC) # MSVC or simulating MSVC
if (WARN_RESERVED_ID)
target_compile_options(gsl_tests_config INTERFACE "-Wno-reserved-identifier")
endif()
check_cxx_compiler_flag("-Wno-unsafe-buffer-usage" WARN_UNSAFE_BUFFER)
if (WARN_UNSAFE_BUFFER)
# This test uses very greedy heuristics such as "no pointer arithmetic on raw buffer"
target_compile_options(gsl_tests_config INTERFACE "-Wno-unsafe-buffer-usage")
endif()
else()
target_compile_options(gsl_tests_config INTERFACE
-fno-strict-aliasing
@ -151,6 +147,7 @@ else()
-Wno-global-constructors # GTest
-Wno-missing-prototypes
-Wno-padded
-Wno-switch-default
-Wno-unknown-attributes
-Wno-used-but-marked-unused # GTest EXPECT_DEATH
-Wno-weak-vtables
@ -191,6 +188,11 @@ else()
>
)
endif(MSVC)
check_cxx_compiler_flag("-Wno-unsafe-buffer-usage" WARN_UNSAFE_BUFFER)
if (WARN_UNSAFE_BUFFER)
# This test uses very greedy heuristics such as "no pointer arithmetic on raw buffer"
target_compile_options(gsl_tests_config INTERFACE "-Wno-unsafe-buffer-usage")
endif()
# for tests to find the gtest header
target_include_directories(gsl_tests_config SYSTEM INTERFACE
@ -204,6 +206,7 @@ add_executable(gsl_tests
byte_tests.cpp
notnull_tests.cpp
owner_tests.cpp
pointers_tests.cpp
span_compatibility_tests.cpp
span_ext_tests.cpp
span_tests.cpp
@ -262,11 +265,6 @@ if(MSVC) # MSVC or simulating MSVC
if (WARN_RESERVED_ID)
target_compile_options(gsl_tests_config_noexcept INTERFACE "-Wno-reserved-identifier")
endif()
check_cxx_compiler_flag("-Wno-unsafe-buffer-usage" WARN_UNSAFE_BUFFER)
if (WARN_UNSAFE_BUFFER)
# This test uses very greedy heuristics such as "no pointer arithmetic on raw buffer"
target_compile_options(gsl_tests_config_noexcept INTERFACE "-Wno-unsafe-buffer-usage")
endif()
else()
target_compile_options(gsl_tests_config_noexcept INTERFACE
-fno-exceptions
@ -307,6 +305,11 @@ else()
>
)
endif(MSVC)
check_cxx_compiler_flag("-Wno-unsafe-buffer-usage" WARN_UNSAFE_BUFFER)
if (WARN_UNSAFE_BUFFER)
# This test uses very greedy heuristics such as "no pointer arithmetic on raw buffer"
target_compile_options(gsl_tests_config_noexcept INTERFACE "-Wno-unsafe-buffer-usage")
endif()
add_executable(gsl_noexcept_tests no_exception_ensure_tests.cpp)
target_link_libraries(gsl_noexcept_tests

4
deps/GSL/tests/CMakeLists.txt.in vendored
View File

@ -1,10 +1,10 @@
cmake_minimum_required(VERSION 3.0.2)
cmake_minimum_required(VERSION 3.13)
project(googletest-download NONE)
include(ExternalProject)
ExternalProject_Add(googletest
GIT_REPOSITORY https://github.com/google/googletest.git
GIT_TAG 1b18723e874b256c1e39378c6774a90701d70f7a
GIT_TAG v1.14.0
SOURCE_DIR "${CMAKE_CURRENT_BINARY_DIR}/googletest-src"
BINARY_DIR "${CMAKE_CURRENT_BINARY_DIR}/googletest-build"
CONFIGURE_COMMAND ""

21
deps/GSL/tests/pointers_tests.cpp vendored Normal file
View File

@ -0,0 +1,21 @@
#include <gtest/gtest.h>
#include <gsl/pointers>
#include <memory>
TEST(pointers_test, swap)
{
// taken from gh-1129:
gsl::not_null<std::unique_ptr<int>> a(std::make_unique<int>(0));
gsl::not_null<std::unique_ptr<int>> b(std::make_unique<int>(1));
EXPECT_TRUE(*a == 0);
EXPECT_TRUE(*b == 1);
gsl::swap(a, b);
EXPECT_TRUE(*a == 1);
EXPECT_TRUE(*b == 0);
}

2
deps/GSL/tests/span_compatibility_tests.cpp vendored
View File

@ -519,7 +519,7 @@ TEST(span_compatibility_tests, assertion_tests)
// assertions for span's definition
static_assert(std::is_same<decltype(gsl::dynamic_extent), const std::size_t>::value,
"gsl::dynamic_extent must be respresented as std::size_t");
"gsl::dynamic_extent must be represented as std::size_t");
static_assert(gsl::dynamic_extent == static_cast<std::size_t>(-1),
"gsl::dynamic_extent must be defined as the max value of std::size_t");

2
deps/GSL/tests/span_tests.cpp vendored
View File

@ -333,7 +333,7 @@ TEST(span_test, from_array_constructor)
EXPECT_TRUE(s.data() == std::addressof(arr2d[0]));
}
int arr3d[2][3][2] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12};
int arr3d[2][3][2] = { { {1, 2}, {3, 4}, {5, 6} }, { {7, 8}, {9, 10}, {11, 12} } };
#ifdef CONFIRM_COMPILATION_ERRORS
{

2
deps/WinToast/.github/FUNDING.yml vendored
View File

@ -1,2 +0,0 @@
patreon: mohabouje
custom: https://paypal.me/mohabouje

56
deps/WinToast/.github/workflows/build.yml vendored
View File

@ -1,56 +0,0 @@
name: Build with CMake
on:
push:
branches: [master]
pull_request:
branches: [master]
env:
BUILD_TYPE: Release
QT_VERSION: 6.6.0
jobs:
build:
strategy:
matrix:
include:
# With Qt examples
- with-qt: true
with-examples: true
# Examples without Qt
- with-qt: false
with-examples: true
# No examples
- with-qt: false
with-examples: false
name: 'Examples: ${{ matrix.with-examples }}, Qt: ${{ matrix.with-qt }}'
runs-on: windows-latest
steps:
- uses: actions/checkout@v3
- name: Enable Developer Command Prompt
uses: ilammy/msvc-dev-cmd@v1.12.1
- name: Install Qt
if: matrix.with-qt
uses: jurplel/install-qt-action@v3.3.0
with:
cache: true
cache-key-prefix: QtCache-${{ env.QT_VERSION }}
version: ${{ env.QT_VERSION }}
- name: Configure CMake
run: >
cmake
-B build
-G Ninja
-DCMAKE_BUILD_TYPE=${{ env.BUILD_TYPE }}
-DWINTOASTLIB_BUILD_EXAMPLES=${{ matrix.with-examples && 'On' || 'Off' }}
-DWINTOASTLIB_QT_ENABLED=${{ matrix.with-qt && 'On' || 'Off' }}
- name: Build
working-directory: build
run: ninja all

1
deps/WinToast/README.md vendored
View File

@ -70,6 +70,7 @@ class WinToastHandlerExample : public IWinToastHandler {
WinToastHandlerExample();
// Public interfaces
void toastActivated() const override;
void toastActivated(int actionIndex) const override;
void toastDismissed(WinToastDismissalReason state) const override;
void toastFailed() const override;
};

2
deps/WinToast/src/wintoastlib.cpp vendored
View File

@ -388,7 +388,7 @@ namespace Util {
} // namespace Util
WinToast* WinToast::instance() {
static WinToast instance;
thread_local static WinToast instance;
return &instance;
}

1
deps/asmjit/.github/FUNDING.yml vendored
View File

@ -1 +0,0 @@
github: kobalicek

42
deps/asmjit/.github/ISSUE_TEMPLATE/01_bug_report.yml vendored
View File

@ -1,42 +0,0 @@
name: Bug Report
description: File a bug report
body:
- type: markdown
attributes:
value: |
Before you hit the submit button:
* Please see our [Contribution Guidelines](https://github.com/asmjit/asmjit/blob/master/CONTRIBUTING.md).
* Make sure that you use a recent AsmJit (master branch) before filing a bug report.
* Make sure that you use logging and error handling features to collect as much information as possible, if applicable.
- type: textarea
id: issue-description
attributes:
label: Issue Description
description: Please share a clear and concise description of the issue and optionally provide reproducibility information and output from AsmJit's logger.
placeholder: Description
validations:
required: true
- type: dropdown
id: operating-system
attributes:
label: Operating System
multiple: true
options:
- Not specified / possibly all
- Windows
- Linux
- Mac
- Android
- Other
- type: dropdown
id: target-architecture
attributes:
label: Architecture
multiple: true
options:
- Not specified
- X86 / X86_64
- AArch32
- AArch64
- RISC-V
- Other

18
deps/asmjit/.github/ISSUE_TEMPLATE/02_feature_request.yml vendored
View File

@ -1,18 +0,0 @@
name: Feature Request
description: Request a new feature or enhancement
labels: [enhancement]
body:
- type: markdown
attributes:
value: |
Before you hit the submit button:
* Please see our [Contribution Guidelines](https://github.com/asmjit/asmjit/blob/master/CONTRIBUTING.md).
* Make sure that you use a recent AsmJit (master branch) before filing a feature request.
- type: textarea
id: issue-description
attributes:
label: Issue Description
description: Please share a clear and concise description of a new feature or enhancement.
placeholder: Description
validations:
required: true

18
deps/asmjit/.github/ISSUE_TEMPLATE/03_help_question.yml vendored
View File

@ -1,18 +0,0 @@
name: Help & Questions
description: Ask a question or get help
labels: [question]
body:
- type: markdown
attributes:
value: |
Before you hit the submit button:
* Please see our [Contribution Guidelines](https://github.com/asmjit/asmjit/blob/master/CONTRIBUTING.md).
* [Gitter Chat](https://app.gitter.im/#/room/#asmjit:gitter.im) is usually faster to get answers.
* If you need a help, please include as much information as possible to make it clear what the intend is.
- type: textarea
id: issue-description
attributes:
label: Details
description: The description of the problem or question.
validations:
required: true

11
deps/asmjit/.github/ISSUE_TEMPLATE/99_other_issues.yml vendored
View File

@ -1,11 +0,0 @@
name: Other Issues
description: Something that doesn't fit the other categories
body:
- type: textarea
id: issue-description
attributes:
label: Issue Description
description: Please share a clear and concise description of the issue.
placeholder: Description
validations:
required: true

48
deps/asmjit/.github/workflows/build-config.json vendored
View File

@ -1,48 +0,0 @@
{
"diagnostics": {
"asan": { "definitions": ["ASMJIT_SANITIZE=address"] },
"ubsan": { "definitions": ["ASMJIT_SANITIZE=undefined"] },
"msan": { "definitions": ["ASMJIT_SANITIZE=memory"] }
},
"valgrind_arguments": [
"--leak-check=full",
"--show-reachable=yes",
"--track-origins=yes"
],
"tests": [
{
"cmd": ["asmjit_test_unit", "--quick"],
"optional": true
},
{
"cmd": ["asmjit_test_assembler"],
"optional": true
},
{
"cmd": ["asmjit_test_assembler", "--validate"],
"optional": true
},
{
"cmd": ["asmjit_test_emitters"],
"optional": true
},
{
"cmd": ["asmjit_test_compiler"],
"optional": true
},
{
"cmd": ["asmjit_test_instinfo"],
"optional": true
},
{
"cmd": ["asmjit_test_x86_sections"],
"optional": true
},
{
"cmd": ["asmjit_test_perf", "--quick"],
"optional": true
}
]
}

227
deps/asmjit/.github/workflows/build.yml vendored
View File

@ -1,227 +0,0 @@
name: "Build"
on:
push:
pull_request:
defaults:
run:
shell: bash
jobs:
source-check:
name: "source check"
runs-on: ubuntu-latest
steps:
- name: "Checkout"
uses: actions/checkout@v3
- name: "Setup node.js"
uses: actions/setup-node@v3
with:
node-version: "16"
- name: "Check Enumerations"
run: |
cd tools
node enumgen.js --verify
build:
strategy:
fail-fast: false
matrix:
include:
- { title: "linux-lib" , host: "ubuntu-latest" , arch: "x64" , cc: "clang" , conf: "Debug" }
- { title: "macos-lib" , host: "macos-latest" , arch: "x64" , cc: "clang" , conf: "Debug" }
- { title: "windows-lib" , host: "windows-latest", arch: "x64" , cc: "vs2022" , conf: "Debug" }
- { title: "diag-analyze" , host: "ubuntu-latest" , arch: "x64" , cc: "clang-17", conf: "Debug" , diagnostics: "analyze-build" }
- { title: "diag-asan" , host: "ubuntu-latest" , arch: "x64" , cc: "clang-17", conf: "Release", diagnostics: "asan", defs: "ASMJIT_TEST=1" }
- { title: "diag-msan" , host: "ubuntu-latest" , arch: "x64" , cc: "clang-17", conf: "Release", diagnostics: "msan", defs: "ASMJIT_TEST=1" }
- { title: "diag-ubsan" , host: "ubuntu-latest" , arch: "x64" , cc: "clang-17", conf: "Release", diagnostics: "ubsan", defs: "ASMJIT_TEST=1" }
- { title: "diag-valgrind" , host: "ubuntu-latest" , arch: "x64" , cc: "clang-17", conf: "Release", diagnostics: "valgrind", defs: "ASMJIT_TEST=1" }
- { title: "no-deprecated" , host: "ubuntu-latest" , arch: "x64" , cc: "clang-17", conf: "Release", defs: "ASMJIT_TEST=1,ASMJIT_NO_DEPRECATED=1" }
- { title: "no-intrinsics" , host: "ubuntu-latest" , arch: "x64" , cc: "clang-17", conf: "Release", defs: "ASMJIT_TEST=1,ASMJIT_NO_INTRINSICS=1" }
- { title: "no-logging" , host: "ubuntu-latest" , arch: "x64" , cc: "clang-17", conf: "Release", defs: "ASMJIT_TEST=1,ASMJIT_NO_LOGGING=1" }
- { title: "no-logging-text" , host: "ubuntu-latest" , arch: "x64" , cc: "clang-17", conf: "Release", defs: "ASMJIT_TEST=1,ASMJIT_NO_LOGGING=1,ASMJIT_NO_TEXT=1" }
- { title: "no-builder" , host: "ubuntu-latest" , arch: "x64" , cc: "clang-17", conf: "Release", defs: "ASMJIT_TEST=1,ASMJIT_NO_BUILDER=1" }
- { title: "no-compiler" , host: "ubuntu-latest" , arch: "x64" , cc: "clang-17", conf: "Release", defs: "ASMJIT_TEST=1,ASMJIT_NO_COMPILER=1" }
- { title: "no-introspection", host: "ubuntu-latest" , arch: "x64" , cc: "clang-17", conf: "Release", defs: "ASMJIT_TEST=1,ASMJIT_NO_COMPILER=1,ASMJIT_NO_INTROSPECTION=1" }
- { title: "no-jit" , host: "ubuntu-latest" , arch: "x64" , cc: "clang-17", conf: "Release", defs: "ASMJIT_TEST=1,ASMJIT_NO_JIT=1" }
- { title: "no-validation" , host: "ubuntu-latest" , arch: "x64" , cc: "clang-17", conf: "Release", defs: "ASMJIT_TEST=1,ASMJIT_NO_VALIDATION=1" }
- { title: "no-x86" , host: "ubuntu-latest" , arch: "x64" , cc: "clang-17", conf: "Release", defs: "ASMJIT_TEST=1,ASMJIT_NO_X86=1" }
- { title: "no-aarch64" , host: "ubuntu-latest" , arch: "x64" , cc: "clang-17", conf: "Release", defs: "ASMJIT_TEST=1,ASMJIT_NO_AARCH64=1" }
- { title: "linux" , host: "ubuntu-20.04" , arch: "x86" , cc: "gcc-7" , conf: "Debug" , defs: "ASMJIT_TEST=1" }
- { title: "linux" , host: "ubuntu-20.04" , arch: "x86" , cc: "gcc-7" , conf: "Release", defs: "ASMJIT_TEST=1" }
- { title: "linux" , host: "ubuntu-20.04" , arch: "x64" , cc: "gcc-7" , conf: "Debug" , defs: "ASMJIT_TEST=1" }
- { title: "linux" , host: "ubuntu-20.04" , arch: "x64" , cc: "gcc-7" , conf: "Release", defs: "ASMJIT_TEST=1" }
- { title: "linux" , host: "ubuntu-20.04" , arch: "x86" , cc: "gcc-8" , conf: "Debug" , defs: "ASMJIT_TEST=1" }
- { title: "linux" , host: "ubuntu-20.04" , arch: "x86" , cc: "gcc-8" , conf: "Release", defs: "ASMJIT_TEST=1" }
- { title: "linux" , host: "ubuntu-20.04" , arch: "x64" , cc: "gcc-8" , conf: "Debug" , defs: "ASMJIT_TEST=1" }
- { title: "linux" , host: "ubuntu-20.04" , arch: "x64" , cc: "gcc-8" , conf: "Release", defs: "ASMJIT_TEST=1" }
- { title: "linux" , host: "ubuntu-22.04" , arch: "x86" , cc: "gcc-9" , conf: "Debug" , defs: "ASMJIT_TEST=1" }
- { title: "linux" , host: "ubuntu-22.04" , arch: "x86" , cc: "gcc-9" , conf: "Release", defs: "ASMJIT_TEST=1" }
- { title: "linux" , host: "ubuntu-22.04" , arch: "x64" , cc: "gcc-9" , conf: "Debug" , defs: "ASMJIT_TEST=1" }
- { title: "linux" , host: "ubuntu-22.04" , arch: "x64" , cc: "gcc-9" , conf: "Release", defs: "ASMJIT_TEST=1" }
- { title: "linux" , host: "ubuntu-22.04" , arch: "x86" , cc: "gcc-10" , conf: "Debug" , defs: "ASMJIT_TEST=1" }
- { title: "linux" , host: "ubuntu-22.04" , arch: "x86" , cc: "gcc-10" , conf: "Release", defs: "ASMJIT_TEST=1" }
- { title: "linux" , host: "ubuntu-22.04" , arch: "x64" , cc: "gcc-10" , conf: "Debug" , defs: "ASMJIT_TEST=1" }
- { title: "linux" , host: "ubuntu-22.04" , arch: "x64" , cc: "gcc-10" , conf: "Release", defs: "ASMJIT_TEST=1" }
- { title: "linux" , host: "ubuntu-22.04" , arch: "x86" , cc: "gcc-11" , conf: "Debug" , defs: "ASMJIT_TEST=1" }
- { title: "linux" , host: "ubuntu-22.04" , arch: "x86" , cc: "gcc-11" , conf: "Release", defs: "ASMJIT_TEST=1" }
- { title: "linux" , host: "ubuntu-22.04" , arch: "x64" , cc: "gcc-11" , conf: "Debug" , defs: "ASMJIT_TEST=1" }
- { title: "linux" , host: "ubuntu-22.04" , arch: "x64" , cc: "gcc-11" , conf: "Release", defs: "ASMJIT_TEST=1" }
- { title: "linux" , host: "ubuntu-22.04" , arch: "x86" , cc: "gcc-12" , conf: "Debug" , defs: "ASMJIT_TEST=1" }
- { title: "linux" , host: "ubuntu-22.04" , arch: "x86" , cc: "gcc-12" , conf: "Release", defs: "ASMJIT_TEST=1" }
- { title: "linux" , host: "ubuntu-22.04" , arch: "x64" , cc: "gcc-12" , conf: "Debug" , defs: "ASMJIT_TEST=1" }
- { title: "linux" , host: "ubuntu-22.04" , arch: "x64" , cc: "gcc-12" , conf: "Release", defs: "ASMJIT_TEST=1" }
- { title: "linux" , host: "ubuntu-22.04" , arch: "x86" , cc: "gcc-13" , conf: "Debug" , defs: "ASMJIT_TEST=1" }
- { title: "linux" , host: "ubuntu-22.04" , arch: "x86" , cc: "gcc-13" , conf: "Release", defs: "ASMJIT_TEST=1" }
- { title: "linux" , host: "ubuntu-22.04" , arch: "x64" , cc: "gcc-13" , conf: "Debug" , defs: "ASMJIT_TEST=1" }
- { title: "linux" , host: "ubuntu-22.04" , arch: "x64" , cc: "gcc-13" , conf: "Release", defs: "ASMJIT_TEST=1" }
- { title: "linux" , host: "ubuntu-20.04" , arch: "x86" , cc: "clang-10", conf: "Debug" , defs: "ASMJIT_TEST=1" }
- { title: "linux" , host: "ubuntu-20.04" , arch: "x86" , cc: "clang-10", conf: "Release", defs: "ASMJIT_TEST=1" }
- { title: "linux" , host: "ubuntu-20.04" , arch: "x64" , cc: "clang-10", conf: "Debug" , defs: "ASMJIT_TEST=1" }
- { title: "linux" , host: "ubuntu-20.04" , arch: "x64" , cc: "clang-10", conf: "Release", defs: "ASMJIT_TEST=1" }
- { title: "linux" , host: "ubuntu-22.04" , arch: "x86" , cc: "clang-11", conf: "Debug" , defs: "ASMJIT_TEST=1" }
- { title: "linux" , host: "ubuntu-22.04" , arch: "x86" , cc: "clang-11", conf: "Release", defs: "ASMJIT_TEST=1" }
- { title: "linux" , host: "ubuntu-22.04" , arch: "x64" , cc: "clang-11", conf: "Debug" , defs: "ASMJIT_TEST=1" }
- { title: "linux" , host: "ubuntu-22.04" , arch: "x64" , cc: "clang-11", conf: "Release", defs: "ASMJIT_TEST=1" }
- { title: "linux" , host: "ubuntu-22.04" , arch: "x86" , cc: "clang-12", conf: "Debug" , defs: "ASMJIT_TEST=1" }
- { title: "linux" , host: "ubuntu-22.04" , arch: "x86" , cc: "clang-12", conf: "Release", defs: "ASMJIT_TEST=1" }
- { title: "linux" , host: "ubuntu-22.04" , arch: "x64" , cc: "clang-12", conf: "Debug" , defs: "ASMJIT_TEST=1" }
- { title: "linux" , host: "ubuntu-22.04" , arch: "x64" , cc: "clang-12", conf: "Release", defs: "ASMJIT_TEST=1" }
- { title: "linux" , host: "ubuntu-22.04" , arch: "x86" , cc: "clang-13", conf: "Debug" , defs: "ASMJIT_TEST=1" }
- { title: "linux" , host: "ubuntu-22.04" , arch: "x86" , cc: "clang-13", conf: "Release", defs: "ASMJIT_TEST=1" }
- { title: "linux" , host: "ubuntu-22.04" , arch: "x64" , cc: "clang-13", conf: "Debug" , defs: "ASMJIT_TEST=1" }
- { title: "linux" , host: "ubuntu-22.04" , arch: "x64" , cc: "clang-13", conf: "Release", defs: "ASMJIT_TEST=1" }
- { title: "linux" , host: "ubuntu-22.04" , arch: "x86" , cc: "clang-14", conf: "Debug" , defs: "ASMJIT_TEST=1" }
- { title: "linux" , host: "ubuntu-22.04" , arch: "x86" , cc: "clang-14", conf: "Release", defs: "ASMJIT_TEST=1" }
- { title: "linux" , host: "ubuntu-22.04" , arch: "x64" , cc: "clang-14", conf: "Debug" , defs: "ASMJIT_TEST=1" }
- { title: "linux" , host: "ubuntu-22.04" , arch: "x64" , cc: "clang-14", conf: "Release", defs: "ASMJIT_TEST=1" }
- { title: "linux" , host: "ubuntu-22.04" , arch: "x86" , cc: "clang-15", conf: "Debug" , defs: "ASMJIT_TEST=1" }
- { title: "linux" , host: "ubuntu-22.04" , arch: "x86" , cc: "clang-15", conf: "Release", defs: "ASMJIT_TEST=1" }
- { title: "linux" , host: "ubuntu-22.04" , arch: "x64" , cc: "clang-15", conf: "Debug" , defs: "ASMJIT_TEST=1" }
- { title: "linux" , host: "ubuntu-22.04" , arch: "x64" , cc: "clang-15", conf: "Release", defs: "ASMJIT_TEST=1" }
- { title: "linux" , host: "ubuntu-22.04" , arch: "x86" , cc: "clang-16", conf: "Debug" , defs: "ASMJIT_TEST=1" }
- { title: "linux" , host: "ubuntu-22.04" , arch: "x86" , cc: "clang-16", conf: "Release", defs: "ASMJIT_TEST=1" }
- { title: "linux" , host: "ubuntu-22.04" , arch: "x64" , cc: "clang-16", conf: "Debug" , defs: "ASMJIT_TEST=1" }
- { title: "linux" , host: "ubuntu-22.04" , arch: "x64" , cc: "clang-16", conf: "Release", defs: "ASMJIT_TEST=1" }
- { title: "linux" , host: "ubuntu-22.04" , arch: "x86" , cc: "clang-17", conf: "Debug" , defs: "ASMJIT_TEST=1" }
- { title: "linux" , host: "ubuntu-22.04" , arch: "x86" , cc: "clang-17", conf: "Release", defs: "ASMJIT_TEST=1" }
- { title: "linux" , host: "ubuntu-22.04" , arch: "x64" , cc: "clang-17", conf: "Debug" , defs: "ASMJIT_TEST=1" }
- { title: "linux" , host: "ubuntu-22.04" , arch: "x64" , cc: "clang-17", conf: "Release", defs: "ASMJIT_TEST=1" }
- { title: "macos" , host: "macos-12" , arch: "x64" , cc: "gcc-11" , conf: "Debug" , defs: "ASMJIT_TEST=1" }
- { title: "macos" , host: "macos-12" , arch: "x64" , cc: "gcc-11" , conf: "Release", defs: "ASMJIT_TEST=1" }
- { title: "macos" , host: "macos-12" , arch: "x64" , cc: "clang" , conf: "Debug" , defs: "ASMJIT_TEST=1" }
- { title: "macos" , host: "macos-12" , arch: "x64" , cc: "clang" , conf: "Release", defs: "ASMJIT_TEST=1" }
- { title: "windows" , host: "windows-2019" , arch: "x86" , cc: "vs2019" , conf: "Debug" , defs: "ASMJIT_TEST=1" }
- { title: "windows" , host: "windows-2019" , arch: "x86" , cc: "vs2019" , conf: "Release", defs: "ASMJIT_TEST=1" }
- { title: "windows" , host: "windows-2019" , arch: "x64" , cc: "vs2019" , conf: "Debug" , defs: "ASMJIT_TEST=1" }
- { title: "windows" , host: "windows-2019" , arch: "x64" , cc: "vs2019" , conf: "Release", defs: "ASMJIT_TEST=1" }
- { title: "windows" , host: "windows-2022" , arch: "x86" , cc: "vs2022" , conf: "Debug" , defs: "ASMJIT_TEST=1" }
- { title: "windows" , host: "windows-2022" , arch: "x86" , cc: "vs2022" , conf: "Release", defs: "ASMJIT_TEST=1" }
- { title: "windows" , host: "windows-2022" , arch: "x64" , cc: "vs2022" , conf: "Debug" , defs: "ASMJIT_TEST=1" }
- { title: "windows" , host: "windows-2022" , arch: "x64" , cc: "vs2022" , conf: "Release", defs: "ASMJIT_TEST=1" }
- { title: "freebsd" , host: "macos-12" , arch: "x86-64" , cc: "clang" , conf: "Release", vm: "freebsd", vm_ver: "13.2", defs: "ASMJIT_TEST=1" }
- { title: "netbsd" , host: "macos-12" , arch: "x86-64" , cc: "clang" , conf: "Release", vm: "netbsd" , vm_ver: "9.3" , defs: "ASMJIT_TEST=1" }
- { title: "openbsd" , host: "macos-12" , arch: "x86-64" , cc: "clang" , conf: "Release", vm: "openbsd", vm_ver: "7.4" , defs: "ASMJIT_TEST=1" }
- { title: "openbsd" , host: "ubuntu-latest" , arch: "arm64" , cc: "clang" , conf: "Release", vm: "openbsd", vm_ver: "7.4" , defs: "ASMJIT_TEST=1" }
- { title: "debian" , host: "ubuntu-latest" , arch: "arm/v7" , cc: "clang" , conf: "Release", vm: "debian:unstable", defs: "ASMJIT_TEST=1" }
- { title: "debian" , host: "ubuntu-latest" , arch: "arm64" , cc: "clang" , conf: "Release", vm: "debian:unstable", defs: "ASMJIT_TEST=1" }
- { title: "debian" , host: "ubuntu-latest" , arch: "riscv64", cc: "clang" , conf: "Release", vm: "debian:unstable", defs: "ASMJIT_TEST=1" }
- { title: "debian" , host: "ubuntu-latest" , arch: "ppc64le", cc: "clang" , conf: "Release", vm: "debian:unstable", defs: "ASMJIT_TEST=1" }
name: "${{matrix.title}}/${{matrix.arch}}, ${{matrix.cc}} ${{matrix.conf}}"
runs-on: "${{matrix.host}}"
steps:
- name: "Checkout"
uses: actions/checkout@v3
with:
path: "source"
- name: "Checkout Build Actions"
uses: actions/checkout@v3
with:
repository: build-actions/build-actions
path: "build-actions"
- name: "Python"
uses: actions/setup-python@v4
with:
python-version: "3.x"
- name: QEMU
if: ${{matrix.vm && !matrix.vm_ver}}
uses: docker/setup-qemu-action@v3
with:
platforms: linux/${{matrix.arch}}
- name: "Build & Test - Native"
if: ${{!matrix.vm}}
run: python build-actions/action.py
--step=all
--source-dir=source
--config=source/.github/workflows/build-config.json
--compiler=${{matrix.cc}}
--diagnostics=${{matrix.diagnostics}}
--architecture=${{matrix.arch}}
--problem-matcher=auto
--build-type=${{matrix.conf}}
--build-defs=${{matrix.defs}}
- name: "Build & Test - Cross Platform Actions"
if: ${{matrix.vm && matrix.vm_ver}}
uses: cross-platform-actions/action@master
with:
operating_system: ${{matrix.vm}}
architecture: ${{matrix.arch}}
version: ${{matrix.vm_ver}}
sync_files: "runner-to-vm"
shutdown_vm: false
shell: bash
run: |
set -e
PATH="/usr/sbin:/usr/pkg/sbin:/usr/pkg/bin:$PATH:$(pwd)/build-actions"
CI_NETBSD_USE_PKGIN=1
export PATH
export CI_NETBSD_USE_PKGIN
sh ./build-actions/prepare-environment.sh
python3 build-actions/action.py \
--step=all \
--source-dir=source \
--config=source/.github/workflows/build-config.json \
--compiler=${{matrix.cc}} \
--diagnostics=${{matrix.diagnostics}} \
--architecture=${{matrix.arch}} \
--problem-matcher=auto \
--build-type=${{matrix.conf}} \
--build-defs=${{matrix.defs}}
- name: "Build & Test - Docker + QEMU"
if: ${{matrix.vm && !matrix.vm_ver}}
run: |
docker run \
--rm \
-v $(pwd):/${{github.workspace}} \
-w ${{github.workspace}}/build-actions \
--platform linux/${{matrix.arch}} \
${{matrix.vm}} \
bash action.sh \
--step=all \
--source-dir=../source \
--config=../source/.github/workflows/build-config.json \
--compiler=${{matrix.cc}} \
--diagnostics=${{matrix.diagnostics}} \
--architecture=${{matrix.arch}} \
--problem-matcher=auto \
--build-type=${{matrix.conf}} \
--build-defs=${{matrix.defs}}

70
deps/asmjit/CMakeLists.txt vendored
View File

@ -1,38 +1,16 @@
cmake_minimum_required(VERSION 3.8 FATAL_ERROR)
cmake_minimum_required(VERSION 3.19 FATAL_ERROR)
cmake_policy(PUSH)
if (POLICY CMP0063)
cmake_policy(SET CMP0063 NEW) # Honor visibility properties.
endif()
if (POLICY CMP0092)
cmake_policy(SET CMP0092 NEW) # Don't add -W3 warning level by default.
endif()
# Don't create a project if it was already created by another CMakeLists.txt.
# This allows one library to embed another library without making a collision.
# Don't create a project if it was already created by another CMakeLists.txt. This makes
# it possible to support both add_subdirectory() and include() ways of using AsmJit as a
# dependency.
if (NOT CMAKE_PROJECT_NAME OR "${CMAKE_PROJECT_NAME}" STREQUAL "asmjit")
project(asmjit CXX)
endif()
include(CheckCXXCompilerFlag)
INCLUDE(CheckCXXSourceCompiles)
include(CheckCXXSourceCompiles)
include(GNUInstallDirs)
# AsmJit - Deprecated
# ===================
if (DEFINED ASMJIT_BUILD_EMBED)
message(DEPRECATION "ASMJIT_BUILD_EMBED is deprecated, use ASMJIT_EMBED")
set(ASMJIT_EMBED "${ASMJIT_BUILD_EMBED}")
endif()
if (DEFINED ASMJIT_BUILD_STATIC)
message(DEPRECATION "ASMJIT_BUILD_STATIC is deprecated, use ASMJIT_STATIC")
set(ASMJIT_STATIC "${ASMJIT_BUILD_STATIC}")
endif()
# AsmJit - Configuration - Build
# ==============================
@ -212,18 +190,14 @@ function(asmjit_add_target target target_type)
add_library(${target} ${target_type} ${X_SOURCES})
endif()
set_target_properties(${target} PROPERTIES DEFINE_SYMBOL "")
target_link_libraries(${target} PRIVATE ${X_LIBRARIES})
# target_link_options was added in cmake v3.13, don't use it for now...
foreach(link_flag ${ASMJIT_PRIVATE_LFLAGS})
set_property(TARGET ${target} APPEND_STRING PROPERTY LINK_FLAGS " ${link_flag}")
endforeach()
target_compile_features(${target} PUBLIC cxx_std_11)
set_property(TARGET ${target} PROPERTY CXX_EXTENSIONS NO)
set_property(TARGET ${target} PROPERTY CXX_VISIBILITY_PRESET hidden)
set_target_properties(${target}
PROPERTIES
DEFINE_SYMBOL ""
CXX_VISIBILITY_PRESET hidden)
target_compile_options(${target} PRIVATE ${X_CFLAGS} ${ASMJIT_SANITIZE_CFLAGS} $<$<CONFIG:Debug>:${X_CFLAGS_DBG}> $<$<NOT:$<CONFIG:Debug>>:${X_CFLAGS_REL}>)
target_compile_features(${target} PUBLIC cxx_std_11)
target_link_options(${target} PRIVATE ${ASMJIT_PRIVATE_LFLAGS})
target_link_libraries(${target} PRIVATE ${X_LIBRARIES})
if ("${target_type}" STREQUAL "TEST")
add_test(NAME ${target} COMMAND ${target})
@ -233,17 +207,6 @@ endfunction()
# AsmJit - Compiler Support
# =========================
set(ASMJIT_INCLUDE_DIRS "${ASMJIT_DIR}/src") # Include directory is the same as source dir.
set(ASMJIT_DEPS "") # AsmJit dependencies (libraries) for the linker.
set(ASMJIT_LIBS "") # Dependencies of libs/apps that want to use AsmJit.
set(ASMJIT_CFLAGS "") # Public compiler flags.
set(ASMJIT_PRIVATE_CFLAGS "") # Private compiler flags independent of build type.
set(ASMJIT_PRIVATE_CFLAGS_DBG "") # Private compiler flags used by debug builds.
set(ASMJIT_PRIVATE_CFLAGS_REL "") # Private compiler flags used by release builds.
set(ASMJIT_PRIVATE_LFLAGS "") # Private linker flags.
set(ASMJIT_SANITIZE_CFLAGS "") # Compiler flags required by currently enabled sanitizers.
set(ASMJIT_SANITIZE_LFLAGS "") # Linker flags required by currently enabled sanitizers.
# We will have to keep this most likely forever as some users may still be using it.
set(ASMJIT_INCLUDE_DIR "${ASMJIT_INCLUDE_DIRS}")
@ -286,7 +249,7 @@ endif()
# Support for sanitizers.
if (ASMJIT_SANITIZE)
ASMJIT_detect_sanitizers(ASMJIT_SANITIZE_CFLAGS ${ASMJIT_SANITIZE})
asmjit_detect_sanitizers(ASMJIT_SANITIZE_CFLAGS ${ASMJIT_SANITIZE})
if (ASMJIT_SANITIZE_CFLAGS)
message("-- Enabling sanitizers: '${ASMJIT_SANITIZE_CFLAGS}'")
@ -601,10 +564,8 @@ if (NOT ASMJIT_EMBED)
$<BUILD_INTERFACE:${ASMJIT_INCLUDE_DIRS}>
$<INSTALL_INTERFACE:${CMAKE_INSTALL_INCLUDEDIR}>)
# Add blend2d::blend2d alias.
# Create an asmjit::asmjit alias.
add_library(asmjit::asmjit ALIAS asmjit)
# TODO: [CMAKE] Deprecated alias - we use projectname::libraryname convention now.
add_library(AsmJit::AsmJit ALIAS asmjit)
# Add AsmJit install instructions (library and public headers).
if (NOT ASMJIT_NO_INSTALL)
@ -666,6 +627,7 @@ if (NOT ASMJIT_EMBED)
CFLAGS_REL ${ASMJIT_PRIVATE_CFLAGS_REL})
foreach(_target asmjit_test_emitters
asmjit_test_execute
asmjit_test_x86_sections)
asmjit_add_target(${_target} TEST
SOURCES test/${_target}.cpp
@ -723,5 +685,3 @@ if (NOT ASMJIT_EMBED)
endif()
endif()
cmake_policy(POP)

20
deps/asmjit/CONTRIBUTING.md vendored
View File

@ -4,17 +4,17 @@
* Please use [Issues](https://github.com/asmjit/asmjit/issues) page to report bugs or create a [pull request](https://github.com/asmjit/asmjit/pulls) if you have already fixed it.
* Make sure that when a bug is reported it provides as much information as possible to make it easy to either reproduce it locally or to at least guess where the problem could be. AsmJit is a low-level tool, which makes it very easy to emit code that would crash or not work as intended. Always use AsmJit's [Logging](https://asmjit.com/doc/group__asmjit__logging.html) and [Error Handling](https://asmjit.com/doc/group__asmjit__error__handling.html) features first to analyze whether there is not a simple to catch bug in your own code.
* Make sure that when a bug is reported it provides as much information as possible to make it easy to either reproduce it locally or to at least guess where the problem could be. AsmJit is a low-level tool, which makes it very easy to emit code that would crash or not work as intended when executed. Always use AsmJit's [Logging](https://asmjit.com/doc/group__asmjit__logging.html) and [Error Handling](https://asmjit.com/doc/group__asmjit__error__handling.html) features first to analyze whether there is not a simple to catch bug in your own code.
* Don't be afraid to ask for help if you don't know how to solve a particular problem or in case it's unclear how to do it. The community would help if the problem is well described and has a solution. In general we always try to at least improve the documentation in case it doesn't provide enough information and users must ask for help.
### Asking questions
* We prefer GitHub issues to be used for reporting bugs or feature requests, but it's still okay to do that. Consider joining our [Gitter Chat](https://app.gitter.im/#/room/#asmjit:gitter.im) to ask questions; it has an active community that can quickly.
* We prefer GitHub issues to be used for reporting bugs or feature requests, but it's still okay to ask questions there as well. However, please consider joining our [Gitter Chat](https://app.gitter.im/#/room/#asmjit:gitter.im) to ask questions; it has an active community that can quickly respond.
### Suggesting feature requests
* It's very likely that when using AsmJit you have found something that AsmJit doesn't provide and it would be handy to have it built-in. The [Issues](https://github.com/asmjit/asmjit/issues) page can be used to submit feature requests, but please keep in mind that AsmJit is a relatively small project and not all requested features will be accepted, especially if they are non-trivial, time consuming to implement, or the scope of the feature doesn't match AsmJit goals.
* It's very likely that when using AsmJit you have found something that AsmJit doesn't provide, which would be handy to have as a built-in. The [Issues](https://github.com/asmjit/asmjit/issues) page can be used to submit feature requests, but please keep in mind that AsmJit is a relatively small project and not all requested features will be accepted, especially if they are non-trivial, time consuming to implement, or the scope of the feature doesn't match AsmJit goals.
* If you have already implemented the feature you are suggesting, please open a [pull request](https://github.com/asmjit/asmjit/pulls).
@ -22,11 +22,11 @@
### Suggesting a documentation enhancement
* [AsmJit's documentation](https://asmjit.com/doc/index.html) is auto-generated from source code, so if you would like to improve it just open a [pull request](https://github.com/asmjit/asmjit/pulls) with your changes. The documentation uses [Doxygen](https://www.doxygen.nl/) as a front-end, so please use `\ref`, etc... to create links in documentation when necessary.
* [AsmJit's documentation](https://asmjit.com/doc/index.html) is auto-generated from source code, so if you would like to improve it just open a [pull request](https://github.com/asmjit/asmjit/pulls) with your changes. The documentation uses [Doxygen](https://www.doxygen.nl/) as a front-end, so you can use `\ref` keyword to create links and other Doxygen keywords to enhance the documentation.
### Suggesting a website content enhancement
* [AsmJit's website](https://asmjit.com) is also generated, but not from public sources at the moment. If you did find an issue on the website you can either use contact on the [support page](https://asmjit.com/support.html) or just discuss the change in our [Gitter Chat](https://app.gitter.im/#/room/#asmjit:gitter.im). Alternatively, opening a regular issue is also okay.
* [AsmJit's website](https://asmjit.com) is also generated, but not from public sources at the moment. If you did find an issue on the website you can either use contact information on the [support page](https://asmjit.com/support.html) or to discuss the change on our [Gitter Chat](https://app.gitter.im/#/room/#asmjit:gitter.im). Alternatively, opening a regular issue is also okay.
## Coding Style & Consistency
@ -47,7 +47,7 @@
* The code uses a soft limit of 120 characters per line (including documentation), but it's not enforced and it's okay to use more when it makes sense (for example defining tables, etc...).
* Since AsmJit doesn't use Exceptions nor RTTI the code cannot use containers provided by the C++ standard library as they use exception handling by design. In general, we try to only use a bare minimum from the C++ standard library to make it viable to use AsmJit even in C code bases where JIT complier is implemented in C++ ([Erlang](https://www.erlang.org/) can be seen as a great example).
* Since AsmJit doesn't use Exceptions nor RTTI the code cannot use containers provided by the C++ standard library. In general, we try to only use a bare minimum from the C++ standard library to make it viable to use AsmJit even in C code bases where JIT complier is implemented in C++ ([Erlang](https://www.erlang.org/) can be seen as a great example).
## Testing
@ -79,7 +79,7 @@
* ABI changes happen, but they are usually accumulated and committed within a short time window to not break it often. In general we prefer to break ABI once a year, or once 6 months if there is something that has a high priority. There are no hard rules though.
* AsmJit uses an `inline namespace`, which should make it impossible to link to AsmJit library that is ABI incompatible. When ABI break happens AsmJit version and ABI namespace is changed, see [asmjit/core/api-config.h](./src/asmjit/core/api-config.h) for more details.
* AsmJit uses an `inline namespace`, which should make it impossible to link to AsmJit library that is ABI incompatible. When ABI break happens both AsmJit version and ABI namespace are changed, see [asmjit/core/api-config.h](./src/asmjit/core/api-config.h) for more details.
* What is an ABI break?
@ -87,9 +87,9 @@
* Adding/removing virtual functions to/from classes, respectively
* Changing a signature of a public function or a class member function.
* Changing a signature of a public function or a class member function (for example adding a parameter).
* Changing the value of an enum or global constant (for example instructions are now sorted by name, so adding a new instruction is an ABI break)
* Changing the value of an enum or global constant (for example instructions are now sorted by name, so adding a new instruction breaks ABI)
* Possibly more, but these were the most common...
@ -97,4 +97,6 @@
* Extending the functionality by using reserved members of a struct/class
* Adding new API including new structs and classes
* Changing anything that is internal and that doesn't leak to public headers

26
deps/asmjit/db/LICENSE.md vendored Normal file
View File

@ -0,0 +1,26 @@
AsmJit database is dual licensed under Zlib and Unlicense (public domain)
This is free and unencumbered software released into the public domain.
Anyone is free to copy, modify, publish, use, compile, sell, or
distribute this software, either in source code form or as a compiled
binary, for any purpose, commercial or non-commercial, and by any
means.
In jurisdictions that recognize copyright laws, the author or authors
of this software dedicate any and all copyright interest in the
software to the public domain. We make this dedication for the benefit
of the public at large and to the detriment of our heirs and
successors. We intend this dedication to be an overt act of
relinquishment in perpetuity of all present and future rights to this
software under copyright law.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
IN NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR
OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
OTHER DEALINGS IN THE SOFTWARE.
For more information, please refer to <http://unlicense.org>

5
deps/asmjit/db/README.md vendored
View File

@ -14,3 +14,8 @@ To Be Documented
----------------
This project will be refactored and documented in the future.
License
-------
AsmJit database is dual licensed under Zlib (AsmJit license) or public domain. The database can be used for any purpose, not just by AsmJit.

3
deps/asmjit/db/aarch32.js vendored
View File

@ -1,8 +1,7 @@
// This file is part of AsmJit project <https://asmjit.com>
//
// See asmjit.h or LICENSE.md for license and copyright information
// SPDX-License-Identifier: Zlib
// SPDX-License-Identifier: (Zlib or Unlicense)
(function($scope, $as) {
"use strict";

3
deps/asmjit/db/aarch64.js vendored
View File

@ -1,8 +1,7 @@
// This file is part of AsmJit project <https://asmjit.com>
//
// See asmjit.h or LICENSE.md for license and copyright information
// SPDX-License-Identifier: Zlib
// SPDX-License-Identifier: (Zlib or Unlicense)
(function($scope, $as) {
"use strict";

2
deps/asmjit/db/base.js vendored
View File

@ -1,7 +1,7 @@
// This file is part of AsmJit project <https://asmjit.com>
//
// See asmjit.h or LICENSE.md for license and copyright information
// SPDX-License-Identifier: Zlib
// SPDX-License-Identifier: (Zlib or Unlicense)
(function($scope, $as) {
"use strict";

2
deps/asmjit/db/exp.js vendored
View File

@ -1,7 +1,7 @@
// This file is part of AsmJit project <https://asmjit.com>
//
// See asmjit.h or LICENSE.md for license and copyright information
// SPDX-License-Identifier: Zlib
// SPDX-License-Identifier: (Zlib or Unlicense)
(function($scope, $as) {
"use strict";

2
deps/asmjit/db/index.js vendored
View File

@ -1,7 +1,7 @@
// This file is part of AsmJit project <https://asmjit.com>
//
// See asmjit.h or LICENSE.md for license and copyright information
// SPDX-License-Identifier: Zlib
// SPDX-License-Identifier: (Zlib or Unlicense)
"use strict";

139
deps/asmjit/db/isa_aarch64.json vendored
View File

@ -410,6 +410,13 @@
{"inst": "clrbhb" , "op": "11010101|000|00011|0010|0010|110|11111"}
]},
{"category": "GP", "ext": "CPA", "data": [
{"inst": "addpt Xd|SP, Xn|SP, Xm, {lsl #n}" , "op": "10011010|000|Rm|001|n:3|Rn|Rd"},
{"inst": "maddpt Xd, Xn, Xm, Xa" , "op": "10011011|011|Rm|0|Ra|Rn|Rd"},
{"inst": "msubpt Xd, Xn, Xm, Xa" , "op": "10011011|011|Rm|1|Ra|Rn|Rd"},
{"inst": "subpt Xd|SP, Xn|SP, Xm, {lsl #n}" , "op": "11011010|000|Rm|001|n:3|Rn|Rd"}
]},
{"category": "GP GP_EXT CRYPTO_HASH", "ext": "CRC32", "data": [
{"inst": "crc32b Wd, Wn, Wm" , "op": "00011010|110|Rm|0|10000|Rn|Rd"},
{"inst": "crc32h Wd, Wn, Wm" , "op": "00011010|110|Rm|0|10001|Rn|Rd"},
@ -1936,16 +1943,16 @@
{"inst": "sminv Sd, Vn.4S" , "op": "01001110|10|11000|11010|10|Vn|Vd"},
{"inst": "smlal Vx.ta, Vn.tb, Vm.tb" , "op": "00001110|sz|1|Vm|10000|0|Vn|Vx" , "t": "8H.8B 4S.4H 2D.2S"},
{"inst": "smlal2 Vx.ta, Vn.tb, Vm.tb" , "op": "01001110|sz|1|Vm|10000|0|Vn|Vx" , "t": "8H.16B 4S.8H 2D.4S"},
{"inst": "smlal Vx.4S, Vn.4H, Vm.H[#dx]" , "op": "00001111|01|idx[1:0]|Vm:4|0010|idx[2]|0|Vn|Vx"},
{"inst": "smlal2 Vx.4S, Vn.8H, Vm.H[#dx]" , "op": "01001111|01|idx[1:0]|Vm:4|0010|idx[2]|0|Vn|Vx"},
{"inst": "smlal Vx.2D, Vn.2S, Vm.S[#dx]" , "op": "00001111|10|idx[0] |Vm |0010|idx[1]|0|Vn|Vx"},
{"inst": "smlal2 Vx.2D, Vn.4S, Vm.S[#dx]" , "op": "01001111|10|idx[0] |Vm |0010|idx[1]|0|Vn|Vx"},
{"inst": "smlal Vx.4S, Vn.4H, Vm.H[#idx]" , "op": "00001111|01|idx[1:0]|Vm:4|0010|idx[2]|0|Vn|Vx"},
{"inst": "smlal2 Vx.4S, Vn.8H, Vm.H[#idx]" , "op": "01001111|01|idx[1:0]|Vm:4|0010|idx[2]|0|Vn|Vx"},
{"inst": "smlal Vx.2D, Vn.2S, Vm.S[#idx]" , "op": "00001111|10|idx[0] |Vm |0010|idx[1]|0|Vn|Vx"},
{"inst": "smlal2 Vx.2D, Vn.4S, Vm.S[#idx]" , "op": "01001111|10|idx[0] |Vm |0010|idx[1]|0|Vn|Vx"},
{"inst": "smlsl Vx.ta, Vn.tb, Vm.tb" , "op": "00001110|sz|1|Vm|10100|0|Vn|Vx" , "t": "8H.8B 4S.4H 2D.2S"},
{"inst": "smlsl2 Vx.ta, Vn.tb, Vm.tb" , "op": "01001110|sz|1|Vm|10100|0|Vn|Vx" , "t": "8H.16B 4S.8H 2D.4S"},
{"inst": "smlsl Vx.4S, Vn.4H, Vm.H[#dx]" , "op": "00001111|01|idx[1:0]|Vm:4|0110|idx[2]|0|Vn|Vx"},
{"inst": "smlsl2 Vx.4S, Vn.8H, Vm.H[#dx]" , "op": "01001111|01|idx[1:0]|Vm:4|0110|idx[2]|0|Vn|Vx"},
{"inst": "smlsl Vx.2D, Vn.2S, Vm.S[#dx]" , "op": "00001111|10|idx[0] |Vm |0110|idx[1]|0|Vn|Vx"},
{"inst": "smlsl2 Vx.2D, Vn.4S, Vm.S[#dx]" , "op": "01001111|10|idx[0] |Vm |0110|idx[1]|0|Vn|Vx"},
{"inst": "smlsl Vx.4S, Vn.4H, Vm.H[#idx]" , "op": "00001111|01|idx[1:0]|Vm:4|0110|idx[2]|0|Vn|Vx"},
{"inst": "smlsl2 Vx.4S, Vn.8H, Vm.H[#idx]" , "op": "01001111|01|idx[1:0]|Vm:4|0110|idx[2]|0|Vn|Vx"},
{"inst": "smlsl Vx.2D, Vn.2S, Vm.S[#idx]" , "op": "00001111|10|idx[0] |Vm |0110|idx[1]|0|Vn|Vx"},
{"inst": "smlsl2 Vx.2D, Vn.4S, Vm.S[#idx]" , "op": "01001111|10|idx[0] |Vm |0110|idx[1]|0|Vn|Vx"},
{"inst": "smov Wd, Vn.B[#idx]" , "op": "00001110|00|0|idx:4| 1|00101|1|Vn|Rd"},
{"inst": "smov Wd, Vn.H[#idx]" , "op": "00001110|00|0|idx:3| 10|00101|1|Vn|Rd"},
{"inst": "smov Xd, Vn.B[#idx]" , "op": "01001110|00|0|idx:4| 1|00101|1|Vn|Rd"},
@ -2343,16 +2350,16 @@
{"inst": "uminv Sd, Vn.4S" , "op": "01101110|10|11000|11010|10|Vn|Vd"},
{"inst": "umlal Vd.ta, Vn.tb, Vm.tb" , "op": "00101110|sz|1|Vm|10000|0|Vn|Vd" , "t": "8H.8B 4S.4H 2D.2S"},
{"inst": "umlal2 Vd.ta, Vn.tb, Vm.tb" , "op": "01101110|sz|1|Vm|10000|0|Vn|Vd" , "t": "8H.16B 4S.8H 2D.4S"},
{"inst": "umlal Vd.4S, Vn.4H, Vm.H[#dx]" , "op": "00101111|01|idx[1:0]|Vm:4|0010|idx[2]|0|Vn|Vd"},
{"inst": "umlal2 Vd.4S, Vn.8H, Vm.H[#dx]" , "op": "01101111|01|idx[1:0]|Vm:4|0010|idx[2]|0|Vn|Vd"},
{"inst": "umlal Vd.2D, Vn.2S, Vm.S[#dx]" , "op": "00101111|10|idx[0] |Vm |0010|idx[1]|0|Vn|Vd"},
{"inst": "umlal2 Vd.2D, Vn.4S, Vm.S[#dx]" , "op": "01101111|10|idx[0] |Vm |0010|idx[1]|0|Vn|Vd"},
{"inst": "umlal Vd.4S, Vn.4H, Vm.H[#idx]" , "op": "00101111|01|idx[1:0]|Vm:4|0010|idx[2]|0|Vn|Vd"},
{"inst": "umlal2 Vd.4S, Vn.8H, Vm.H[#idx]" , "op": "01101111|01|idx[1:0]|Vm:4|0010|idx[2]|0|Vn|Vd"},
{"inst": "umlal Vd.2D, Vn.2S, Vm.S[#idx]" , "op": "00101111|10|idx[0] |Vm |0010|idx[1]|0|Vn|Vd"},
{"inst": "umlal2 Vd.2D, Vn.4S, Vm.S[#idx]" , "op": "01101111|10|idx[0] |Vm |0010|idx[1]|0|Vn|Vd"},
{"inst": "umlsl Vd.ta, Vn.tb, Vm.tb" , "op": "00101110|sz|1|Vm|10100|0|Vn|Vd" , "t": "8H.8B 4S.4H 2D.2S"},
{"inst": "umlsl2 Vd.ta, Vn.tb, Vm.tb" , "op": "01101110|sz|1|Vm|10100|0|Vn|Vd" , "t": "8H.16B 4S.8H 2D.4S"},
{"inst": "umlsl Vd.4S, Vn.4H, Vm.H[#dx]" , "op": "00101111|01|idx[1:0]|Vm:4|0110|idx[2]|0|Vn|Vd"},
{"inst": "umlsl2 Vd.4S, Vn.8H, Vm.H[#dx]" , "op": "01101111|01|idx[1:0]|Vm:4|0110|idx[2]|0|Vn|Vd"},
{"inst": "umlsl Vd.2D, Vn.2S, Vm.S[#dx]" , "op": "00101111|10|idx[0] |Vm |0110|idx[1]|0|Vn|Vd"},
{"inst": "umlsl2 Vd.2D, Vn.4S, Vm.S[#dx]" , "op": "01101111|10|idx[0] |Vm |0110|idx[1]|0|Vn|Vd"},
{"inst": "umlsl Vd.4S, Vn.4H, Vm.H[#idx]" , "op": "00101111|01|idx[1:0]|Vm:4|0110|idx[2]|0|Vn|Vd"},
{"inst": "umlsl2 Vd.4S, Vn.8H, Vm.H[#idx]" , "op": "01101111|01|idx[1:0]|Vm:4|0110|idx[2]|0|Vn|Vd"},
{"inst": "umlsl Vd.2D, Vn.2S, Vm.S[#idx]" , "op": "00101111|10|idx[0] |Vm |0110|idx[1]|0|Vn|Vd"},
{"inst": "umlsl2 Vd.2D, Vn.4S, Vm.S[#idx]" , "op": "01101111|10|idx[0] |Vm |0110|idx[1]|0|Vn|Vd"},
{"inst": "umov Wd, Vn.B[#idx]" , "op": "00001110|00|0|idx:4| 1|00111|1|Vn|Rd"},
{"inst": "umov Wd, Vn.H[#idx]" , "op": "00001110|00|0|idx:3| 10|00111|1|Vn|Rd"},
{"inst": "umov|mov Wd, Vn.S[#idx]" , "op": "00001110|00|0|idx:2| 100|00111|1|Vn|Rd"},
@ -2478,9 +2485,9 @@
{"inst": "bfdot Vx.2S, Vn.4H, Vm.2H[#idx]" , "op": "00001111|01|idx[0]|Vm|1111|idx[1]|0|Vn|Vx"},
{"inst": "bfdot Vx.4S, Vn.8H, Vm.2H[#idx]" , "op": "01001111|01|idx[0]|Vm|1111|idx[1]|0|Vn|Vx"},
{"inst": "bfmlalb Vx.4S, Vn.8H, Vm.8H" , "op": "00101110|11|0|Vm|11111|1|Vn|Vx"},
{"inst": "bfmlalb Vx.4S, Vn.8H, Vm.H[#idx]" , "op": "00001111|11|imm[1:0]|Vm:4|1111|imm[2]|1|Vn|Vx"},
{"inst": "bfmlalb Vx.4S, Vn.8H, Vm.H[#idx]" , "op": "00001111|11|idx[1:0]|Vm:4|1111|idx[2]|1|Vn|Vx"},
{"inst": "bfmlalt Vx.4S, Vn.8H, Vm.8H" , "op": "01101110|11|0|Vm|11111|1|Vn|Vx"},
{"inst": "bfmlalt Vx.4S, Vn.8H, Vm.H[#idx]" , "op": "01001111|11|imm[1:0]|Vm:4|1111|imm[2]|1|Vn|Vx"},
{"inst": "bfmlalt Vx.4S, Vn.8H, Vm.H[#idx]" , "op": "01001111|11|idx[1:0]|Vm:4|1111|idx[2]|1|Vn|Vx"},
{"inst": "bfmmla Vx.4S, Vn.8H, Vm.8H" , "op": "01101110|01|0|Vm|11101|1|Vn|Vx"}
]},
@ -2495,6 +2502,19 @@
{"inst": "udot Vx.4S, Vn.16B, Vm.4B[#idx]" , "op": "01101111|10|idx[0]|Vm|1110|idx[1]|0|Vn|Vx"}
]},
{"category": "ASIMD", "ext": "FAMINMAX", "data": [
{"inst": "famax Vd.4H, Vn.4H, Vm.4H" , "op": "00001110|11|0|Vm|00011|1|Vn|Vd"},
{"inst": "famax Vd.8H, Vn.8H, Vm.8H" , "op": "01001110|11|0|Vm|00011|1|Vn|Vd"},
{"inst": "famax Vd.2S, Vn.2S, Vm.2S" , "op": "00001110|10|1|Vm|11011|1|Vn|Vd"},
{"inst": "famax Vd.4S, Vn.4S, Vm.4S" , "op": "01001110|10|1|Vm|11011|1|Vn|Vd"},
{"inst": "famax Vd.2D, Vn.2D, Vm.2D" , "op": "01001110|11|1|Vm|11011|1|Vn|Vd"},
{"inst": "famin Vd.4H, Vn.4H, Vm.4H" , "op": "00101110|11|0|Vm|00011|1|Vn|Vd"},
{"inst": "famin Vd.8H, Vn.8H, Vm.8H" , "op": "01101110|11|0|Vm|00011|1|Vn|Vd"},
{"inst": "famin Vd.2S, Vn.2S, Vm.2S" , "op": "00101110|10|1|Vm|11011|1|Vn|Vd"},
{"inst": "famin Vd.4S, Vn.4S, Vm.4S" , "op": "01101110|10|1|Vm|11011|1|Vn|Vd"},
{"inst": "famin Vd.2D, Vn.2D, Vm.2D" , "op": "01101110|11|1|Vm|11011|1|Vn|Vd"}
]},
{"category": "ASIMD", "ext": "FCMA", "data": [
{"inst": "fcadd Vd.t, Vn.t, Vm.t, #rotate" , "op": "00101110|sz|0|Vm|111|imm:1|01|Vn|Vd" , "imm": "ASimdRotateImm_90_270(rotate)", "t": "4H 2S"},
{"inst": "fcadd Vd.t, Vn.t, Vm.t, #rotate" , "op": "01101110|sz|0|Vm|111|imm:1|01|Vn|Vd" , "imm": "ASimdRotateImm_90_270(rotate)", "t": "8H 4S 2D"},
@ -2769,6 +2789,56 @@
{"inst": "ucvtf Vd.8H, Vn.8H, #fbits" , "op": "01101111|0|immh:4|immb:3|11100|1|Vn|Vd" , "imm": "ASimdFBitsHBImm(fbits, 16)"}
]},
{"category": "ASIMD", "ext": "FP8", "data": [
{"inst": "bf1cvtl Vd.8H, Vn.8B" , "op": "00101110|10|10000|10111|10|Vn|Vd"},
{"inst": "bf1cvtl2 Vd.8H, Vn.16B" , "op": "01101110|10|10000|10111|10|Vn|Vd"},
{"inst": "bf2cvtl Vd.8H, Vn.8B" , "op": "00101110|11|10000|10111|10|Vn|Vd"},
{"inst": "bf2cvtl2 Vd.8H, Vn.16B" , "op": "01101110|11|10000|10111|10|Vn|Vd"},
{"inst": "f1cvtl Vd.8H, Vn.8B" , "op": "00101110|00|10000|10111|10|Vn|Vd"},
{"inst": "f1cvtl2 Vd.8H, Vn.16B" , "op": "01101110|00|10000|10111|10|Vn|Vd"},
{"inst": "f2cvtl Vd.8H, Vn.8B" , "op": "00101110|01|10000|10111|10|Vn|Vd"},
{"inst": "f2cvtl2 Vd.8H, Vn.16B" , "op": "01101110|01|10000|10111|10|Vn|Vd"},
{"inst": "fcvtn Vd.8B, Vn.4H, Vm.4H" , "op": "00001110|01|0|Vm|11110|1|Vn|Vd"},
{"inst": "fcvtn Vd.16B, Vn.8H, Vm.8H" , "op": "01001110|01|0|Vm|11110|1|Vn|Vd"},
{"inst": "fcvtn Vd.8B, Vn.4S, Vm.4S" , "op": "00001110|00|0|Vm|11110|1|Vn|Vd"},
{"inst": "fcvtn2 Vx.16B, Vn.4S, Vm.4S" , "op": "01001110|00|0|Vm|11110|1|Vn|Vx"},
{"inst": "fscale Vd.4H, Vn.4H, Vm.4H" , "op": "00101110|11|0|Vm|00111|1|Vn|Vd"},
{"inst": "fscale Vd.8H, Vn.8H, Vm.8H" , "op": "01101110|11|0|Vm|00111|1|Vn|Vd"},
{"inst": "fscale Vd.2S, Vn.2S, Vm.2S" , "op": "00101110|10|1|Vm|11111|1|Vn|Vd"},
{"inst": "fscale Vd.4S, Vn.4S, Vm.4S" , "op": "01101110|10|1|Vm|11111|1|Vn|Vd"},
{"inst": "fscale Vd.2D, Vn.2D, Vm.2D" , "op": "01101110|11|1|Vm|11111|1|Vn|Vd"}
]},
{"category": "ASIMD", "ext": "FP8DOT2", "data": [
{"inst": "fdot Vx.4H, Vn.8B, Vm.8B" , "op": "00001110|01|0|Vm|11111|1|Vn|Vx"},
{"inst": "fdot Vx.8H, Vn.16B, Vm.16B" , "op": "01001110|01|0|Vm|11111|1|Vn|Vx"},
{"inst": "fdot Vx.4H, Vn.8B, Vm.2B[#idx]" , "op": "00001111|01|idx[1:0]|Vm:4|0000|idx[2]|0|Vn|Vx"},
{"inst": "fdot Vx.8H, Vn.16B, Vm.2B[#idx]" , "op": "01001111|01|idx[1:0]|Vm:4|0000|idx[2]|0|Vn|Vx"}
]},
{"category": "ASIMD", "ext": "FP8DOT4", "data": [
{"inst": "fdot Vx.2S, Vn.8B, Vm.8B" , "op": "00001110|00|0|Vm|11111|1|Vn|Vx"},
{"inst": "fdot Vx.4S, Vn.16B, Vm.16B" , "op": "01001110|00|0|Vm|11111|1|Vn|Vx"},
{"inst": "fdot Vx.2S, Vn.8B, Vm.4B[#idx]" , "op": "00001111|00|idx[0]|Vm|0000|idx[1]|0|Vn|Vx"},
{"inst": "fdot Vx.4S, Vn.16B, Vm.4B[#idx]" , "op": "01001111|00|idx[0]|Vm|0000|idx[1]|0|Vn|Vx"}
]},
{"category": "ASIMD", "ext": "FP8FMA", "data": [
{"inst": "fmlalb Vx.8H, Vn.16B, Vm.16B" , "op": "00001110|110|Vm|11111|1|Vn|Vx"},
{"inst": "fmlalt Vx.8H, Vn.16B, Vm.16B" , "op": "01001110|110|Vm|11111|1|Vn|Vx"},
{"inst": "fmlalb Vx.8H, Vn.16B, Vm.B[#idx]" , "op": "00001111|11|idx[2:0]|Vm:3|0000|idx[3]|0|Vn|Vx"},
{"inst": "fmlalt Vx.8H, Vn.16B, Vm.B[#idx]" , "op": "01001111|11|idx[2:0]|Vm:3|0000|idx[3]|0|Vn|Vx"},
{"inst": "fmlallbb Vx.4S, Vn.16B, Vm.16B" , "op": "00001110|000|Vm|11000|1|Vn|Vx"},
{"inst": "fmlallbt Vx.4S, Vn.16B, Vm.16B" , "op": "00001110|010|Vm|11000|1|Vn|Vx"},
{"inst": "fmlalltb Vx.4S, Vn.16B, Vm.16B" , "op": "01001110|000|Vm|11000|1|Vn|Vx"},
{"inst": "fmlalltt Vx.4S, Vn.16B, Vm.16B" , "op": "01001110|010|Vm|11000|1|Vn|Vx"},
{"inst": "fmlallbb Vx.4S, Vn.16B, Vm.B[#idx]" , "op": "00101111|00|idx[2:0]|Vm:3|1000|idx[3]|0|Vn|Vx"},
{"inst": "fmlallbt Vx.4S, Vn.16B, Vm.B[#idx]" , "op": "00101111|01|idx[2:0]|Vm:3|1000|idx[3]|0|Vn|Vx"},
{"inst": "fmlalltb Vx.4S, Vn.16B, Vm.B[#idx]" , "op": "01101111|00|idx[2:0]|Vm:3|1000|idx[3]|0|Vn|Vx"},
{"inst": "fmlalltt Vx.4S, Vn.16B, Vm.B[#idx]" , "op": "01101111|01|idx[2:0]|Vm:3|1000|idx[3]|0|Vn|Vx"}
]},
{"category": "ASIMD", "ext": "FRINTTS", "data": [
{"inst": "frint32x Sd, Sn" , "op": "00011110|00|10100|01100|00|Vn|Vd"},
{"inst": "frint32x Dd, Dn" , "op": "00011110|01|10100|01100|00|Vn|Vd"},
@ -2808,7 +2878,14 @@
{"inst": "fjcvtzs Wd, Dn" , "op": "00011110|011|11110|00000|0|Vn|Vd"}
]},
{"category": "ASIMD", "ext": "ASIMD LRCPC3", "data": [
{"category": "ASIMD", "ext": "LUT", "data": [
{"inst": "luti2 Vd.16B, Vn.16B, Vm[#idx]" , "op": "01001110|100|Vm|0|idx:2|100|Vn|Vd"},
{"inst": "luti2 Vd.8H, Vn.8H, Vm[#idx]" , "op": "01001110|110|Vm|0|idx:3|00|Vn|Vd"},
{"inst": "luti4 Vd.16B, Vn.16B, Vm[#idx]" , "op": "01001110|010|Vm|0|idx:1|1000|Vn|Vd"},
{"inst": "luti4 Vd.8H, 2x{Vn.8H}, Vm[#idx]" , "op": "01001110|010|Vm|0|idx:2|100|Vn|Vd"}
]},
{"category": "ASIMD", "ext": "LRCPC3", "data": [
{"inst": "ldap1 Vd.D[#idx], [Xn|SP]" , "op": "0|idx:1|001101|010|00001|10000|1|Rn|Vd"},
{"inst": "ldapur Bd, [Xn|SP, #offS]" , "op": "00011101|010|offS:9|10|Rn|Vd"},
{"inst": "ldapur Hd, [Xn|SP, #offS]" , "op": "01011101|010|offS:9|10|Rn|Vd"},
@ -2826,24 +2903,24 @@
{"category": "ASIMD", "ext": "RDM", "data": [
{"inst": "sqrdmlah Hx, Hn, Hm" , "op": "01111110|01|0|Vm|10000|1|Vn|Vx" , "io": "QC|=SAT"},
{"inst": "sqrdmlah Sx, Sn, Sm" , "op": "01111110|10|0|Vm|10000|1|Vn|Vx" , "io": "QC|=SAT"},
{"inst": "sqrdmlah Hx, Hn, Vn.H[#idx]" , "op": "01111111|01|imm[1:0]|Vm:4|1101|imm[2]|0|Vn|Vx" , "io": "QC|=SAT"},
{"inst": "sqrdmlah Sx, Sn, Vn.S[#idx]" , "op": "01111111|10|imm[0] |Vm |1101|imm[1]|0|Vn|Vx" , "io": "QC|=SAT"},
{"inst": "sqrdmlah Hx, Hn, Vn.H[#idx]" , "op": "01111111|01|idx[1:0]|Vm:4|1101|idx[2]|0|Vn|Vx" , "io": "QC|=SAT"},
{"inst": "sqrdmlah Sx, Sn, Vn.S[#idx]" , "op": "01111111|10|idx[0] |Vm |1101|idx[1]|0|Vn|Vx" , "io": "QC|=SAT"},
{"inst": "sqrdmlah Vx.t, Vn.t, Vm.t" , "op": "00101110|sz|0|Vm|10000|1|Vn|Vx" , "io": "QC|=SAT", "t": "~ 4H 2S"},
{"inst": "sqrdmlah Vx.t, Vn.t, Vm.t" , "op": "01101110|sz|0|Vm|10000|1|Vn|Vx" , "io": "QC|=SAT", "t": "~ 8H 4S"},
{"inst": "sqrdmlah Vx.4H, Vn.4H, Vm.H[#idx]" , "op": "00101111|01|imm[1:0]|Vm:4|1101|imm[2]|0|Vn|Vx" , "io": "QC|=SAT"},
{"inst": "sqrdmlah Vx.2S, Vn.2S, Vm.S[#idx]" , "op": "00101111|10|imm[0] |Vm |1101|imm[1]|0|Vn|Vx" , "io": "QC|=SAT"},
{"inst": "sqrdmlah Vx.8H, Vn.8H, Vm.H[#idx]" , "op": "01101111|01|imm[1:0]|Vm:4|1101|imm[2]|0|Vn|Vx" , "io": "QC|=SAT"},
{"inst": "sqrdmlah Vx.4S, Vn.4S, Vm.S[#idx]" , "op": "01101111|10|imm[0] |Vm |1101|imm[1]|0|Vn|Vx" , "io": "QC|=SAT"},
{"inst": "sqrdmlah Vx.4H, Vn.4H, Vm.H[#idx]" , "op": "00101111|01|idx[1:0]|Vm:4|1101|idx[2]|0|Vn|Vx" , "io": "QC|=SAT"},
{"inst": "sqrdmlah Vx.2S, Vn.2S, Vm.S[#idx]" , "op": "00101111|10|idx[0] |Vm |1101|idx[1]|0|Vn|Vx" , "io": "QC|=SAT"},
{"inst": "sqrdmlah Vx.8H, Vn.8H, Vm.H[#idx]" , "op": "01101111|01|idx[1:0]|Vm:4|1101|idx[2]|0|Vn|Vx" , "io": "QC|=SAT"},
{"inst": "sqrdmlah Vx.4S, Vn.4S, Vm.S[#idx]" , "op": "01101111|10|idx[0] |Vm |1101|idx[1]|0|Vn|Vx" , "io": "QC|=SAT"},
{"inst": "sqrdmlsh Hx, Hn, Hm" , "op": "01111110|01|0|Vm|10001|1|Vn|Vx" , "io": "QC|=SAT"},
{"inst": "sqrdmlsh Sx, Sn, Sm" , "op": "01111110|10|0|Vm|10001|1|Vn|Vx" , "io": "QC|=SAT"},
{"inst": "sqrdmlsh Hx, Hn, Vn.H[#idx]" , "op": "01111111|01|imm[1:0]|Vm:4|1111|imm[2]|0|Vn|Vx" , "io": "QC|=SAT"},
{"inst": "sqrdmlsh Sx, Sn, Vn.S[#idx]" , "op": "01111111|10|imm[0] |Vm |1111|imm[1]|0|Vn|Vx" , "io": "QC|=SAT"},
{"inst": "sqrdmlsh Hx, Hn, Vn.H[#idx]" , "op": "01111111|01|idx[1:0]|Vm:4|1111|idx[2]|0|Vn|Vx" , "io": "QC|=SAT"},
{"inst": "sqrdmlsh Sx, Sn, Vn.S[#idx]" , "op": "01111111|10|idx[0] |Vm |1111|idx[1]|0|Vn|Vx" , "io": "QC|=SAT"},
{"inst": "sqrdmlsh Vx.t, Vn.t, Vm.t" , "op": "00101110|sz|0|Vm|10001|1|Vn|Vx" , "io": "QC|=SAT", "t": "~ 4H 2S"},
{"inst": "sqrdmlsh Vx.t, Vn.t, Vm.t" , "op": "01101110|sz|0|Vm|10001|1|Vn|Vx" , "io": "QC|=SAT", "t": "~ 8H 4S"},
{"inst": "sqrdmlsh Vx.4H, Vn.4H, Vm.H[#idx]" , "op": "00101111|01|imm[1:0]|Vm:4|1111|imm[2]|0|Vn|Vx" , "io": "QC|=SAT"},
{"inst": "sqrdmlsh Vx.2S, Vn.2S, Vm.S[#idx]" , "op": "00101111|10|imm[0] |Vm |1111|imm[1]|0|Vn|Vx" , "io": "QC|=SAT"},
{"inst": "sqrdmlsh Vx.8H, Vn.8H, Vm.H[#idx]" , "op": "01101111|01|imm[1:0]|Vm:4|1111|imm[2]|0|Vn|Vx" , "io": "QC|=SAT"},
{"inst": "sqrdmlsh Vx.4S, Vn.4S, Vm.S[#idx]" , "op": "01101111|10|imm[0] |Vm |1111|imm[1]|0|Vn|Vx" , "io": "QC|=SAT"}
{"inst": "sqrdmlsh Vx.4H, Vn.4H, Vm.H[#idx]" , "op": "00101111|01|idx[1:0]|Vm:4|1111|idx[2]|0|Vn|Vx" , "io": "QC|=SAT"},
{"inst": "sqrdmlsh Vx.2S, Vn.2S, Vm.S[#idx]" , "op": "00101111|10|idx[0] |Vm |1111|idx[1]|0|Vn|Vx" , "io": "QC|=SAT"},
{"inst": "sqrdmlsh Vx.8H, Vn.8H, Vm.H[#idx]" , "op": "01101111|01|idx[1:0]|Vm:4|1111|idx[2]|0|Vn|Vx" , "io": "QC|=SAT"},
{"inst": "sqrdmlsh Vx.4S, Vn.4S, Vm.S[#idx]" , "op": "01101111|10|idx[0] |Vm |1111|idx[1]|0|Vn|Vx" , "io": "QC|=SAT"}
]},
{"category": "ASIMD CRYPTO_HASH", "ext": "SHA1", "data": [

15
deps/asmjit/db/isa_x86.json vendored
View File

@ -1231,7 +1231,6 @@
]},
{"category": "VIRTUALIZATION", "volatile": true, "data": [
{"inst": "vmmcall" , "op": "0F 01 D9" , "ext": "SVM"},
{"inst": "clgi" , "op": "0F 01 DD" , "ext": "SVM" , "privilege": "L0"},
{"inst": "invlpga R:<eax>, R:<ecx>" , "op": "0F 01 DF" , "ext": "SVM" , "privilege": "L0", "arch": "X86"},
{"inst": "invlpga R:<eax>, R:<ecx>" , "op": "67 0F 01 DF" , "ext": "SVM" , "privilege": "L0", "arch": "X64"},
@ -1817,7 +1816,7 @@
{"inst": "movntdqa W:xmm, m128" , "op": "RM: 66 0F 38 2A /r"},
{"inst": "mpsadbw X:xmm, xmm/m128, ib/ub" , "op": "RM: 66 0F 3A 42 /r ib"},
{"inst": "packusdw X:xmm, xmm/m128" , "op": "RM: 66 0F 38 2B /r"},
{"inst": "pblendvb X:xmm, xmm/m128, <xmm0>" , "op": "RM: 66 0F E0 /r"},
{"inst": "pblendvb X:xmm, xmm/m128, <xmm0>" , "op": "RM: 66 0F 38 10 /r"},
{"inst": "pblendw X:xmm, xmm/m128, ib/ub" , "op": "RM: 66 0F 3A 0E /r ib"},
{"inst": "pcmpeqq X:~xmm, ~xmm/m128" , "op": "RM: 66 0F 38 29 /r"},
{"inst": "pextrb W:r32[7:0]/m8, xmm, ib/ub" , "op": "MR: 66 0F 3A 14 /r ib"},
@ -4354,12 +4353,12 @@
{"inst": "vpermb W:xmm {kz}, xmm, xmm/m128" , "op": "RVM-FVM: EVEX.128.66.0F38.W0 8D /r" , "vl": 1},
{"inst": "vpermb W:ymm {kz}, ymm, ymm/m256" , "op": "RVM-FVM: EVEX.256.66.0F38.W0 8D /r" , "vl": 1},
{"inst": "vpermb W:zmm {kz}, zmm, zmm/m512" , "op": "RVM-FVM: EVEX.512.66.0F38.W0 8D /r" , "vl": 0},
{"inst": "vpermi2b W:xmm {kz}, xmm, xmm/m128" , "op": "RVM-FVM: EVEX.128.66.0F38.W0 75 /r" , "vl": 1},
{"inst": "vpermi2b W:ymm {kz}, ymm, ymm/m256" , "op": "RVM-FVM: EVEX.256.66.0F38.W0 75 /r" , "vl": 1},
{"inst": "vpermi2b W:zmm {kz}, zmm, zmm/m512" , "op": "RVM-FVM: EVEX.512.66.0F38.W0 75 /r" , "vl": 0},
{"inst": "vpermt2b W:xmm {kz}, xmm, xmm/m128" , "op": "RVM-FVM: EVEX.128.66.0F38.W0 7D /r" , "vl": 1},
{"inst": "vpermt2b W:ymm {kz}, ymm, ymm/m256" , "op": "RVM-FVM: EVEX.256.66.0F38.W0 7D /r" , "vl": 1},
{"inst": "vpermt2b W:zmm {kz}, zmm, zmm/m512" , "op": "RVM-FVM: EVEX.512.66.0F38.W0 7D /r" , "vl": 0},
{"inst": "vpermi2b X:xmm {kz}, xmm, xmm/m128" , "op": "RVM-FVM: EVEX.128.66.0F38.W0 75 /r" , "vl": 1},
{"inst": "vpermi2b X:ymm {kz}, ymm, ymm/m256" , "op": "RVM-FVM: EVEX.256.66.0F38.W0 75 /r" , "vl": 1},
{"inst": "vpermi2b X:zmm {kz}, zmm, zmm/m512" , "op": "RVM-FVM: EVEX.512.66.0F38.W0 75 /r" , "vl": 0},
{"inst": "vpermt2b X:xmm {kz}, xmm, xmm/m128" , "op": "RVM-FVM: EVEX.128.66.0F38.W0 7D /r" , "vl": 1},
{"inst": "vpermt2b X:ymm {kz}, ymm, ymm/m256" , "op": "RVM-FVM: EVEX.256.66.0F38.W0 7D /r" , "vl": 1},
{"inst": "vpermt2b X:zmm {kz}, zmm, zmm/m512" , "op": "RVM-FVM: EVEX.512.66.0F38.W0 7D /r" , "vl": 0},
{"inst": "vpmultishiftqb W:xmm {kz}, xmm, xmm/m128/b64" , "op": "RVM-FV: EVEX.128.66.0F38.W1 83 /r" , "vl": 1},
{"inst": "vpmultishiftqb W:ymm {kz}, ymm, ymm/m256/b64" , "op": "RVM-FV: EVEX.256.66.0F38.W1 83 /r" , "vl": 1},
{"inst": "vpmultishiftqb W:zmm {kz}, zmm, zmm/m512/b64" , "op": "RVM-FV: EVEX.512.66.0F38.W1 83 /r" , "vl": 0}

4
deps/asmjit/db/x86.js vendored
View File

@ -1,7 +1,7 @@
// This file is part of AsmJit project <https://asmjit.com>
//
// See asmjit.h or LICENSE.md for license and copyright information
// SPDX-License-Identifier: Zlib
// SPDX-License-Identifier: (Zlib or Unlicense)
(function($scope, $as) {
"use strict";
@ -511,6 +511,8 @@ class Instruction extends base.Instruction {
case "k":
this.kmask = true;
if (typeof value === "string")
super._assignAttribute(key, value);
return;
case "er":

62
deps/asmjit/src/asmjit/arm/a64assembler.cpp vendored
View File

@ -53,6 +53,21 @@ static constexpr uint32_t kWX = InstDB::kWX;
static const uint8_t armShiftOpToLdStOptMap[] = { ASMJIT_LOOKUP_TABLE_16(VALUE, 0) };
#undef VALUE
// a64::Assembler - ExtendOpToRegType
// ==================================
static inline RegType extendOptionToRegType(uint32_t option) noexcept {
uint32_t pred = (uint32_t(RegType::kARM_GpW) << (0x0 * 4)) | // 0b000 - UXTB.
(uint32_t(RegType::kARM_GpW) << (0x1 * 4)) | // 0b001 - UXTH.
(uint32_t(RegType::kARM_GpW) << (0x2 * 4)) | // 0b010 - UXTW.
(uint32_t(RegType::kARM_GpX) << (0x3 * 4)) | // 0b011 - UXTX|LSL.
(uint32_t(RegType::kARM_GpW) << (0x4 * 4)) | // 0b100 - SXTB.
(uint32_t(RegType::kARM_GpW) << (0x5 * 4)) | // 0b101 - SXTH.
(uint32_t(RegType::kARM_GpW) << (0x6 * 4)) | // 0b110 - SXTW.
(uint32_t(RegType::kARM_GpX) << (0x7 * 4)) ; // 0b111 - SXTX.
return RegType((pred >> (option * 4u)) & 0xFu);
}
// asmjit::a64::Assembler - SizeOp
// ===============================
@ -467,7 +482,7 @@ static inline bool matchSignature(const Operand_& o0, const Operand_& o1, const
}
static inline bool matchSignature(const Operand_& o0, const Operand_& o1, const Operand_& o2, const Operand_& o3, uint32_t instFlags) noexcept {
return matchSignature(o0, o1, instFlags) && o1.signature() == o2.signature() && o2.signature() == o3.signature();;
return matchSignature(o0, o1, instFlags) && o1.signature() == o2.signature() && o2.signature() == o3.signature();
}
// Memory must be either:
@ -1228,9 +1243,6 @@ Error Assembler::_emit(InstId instId, const Operand_& o0, const Operand_& o1, co
}
if (isign4 == ENC_OPS3(Reg, Reg, Reg) || isign4 == ENC_OPS4(Reg, Reg, Reg, Imm)) {
if (!checkSignature(o1, o2))
goto InvalidInstruction;
uint32_t opSize = x ? 64 : 32;
uint64_t shift = 0;
uint32_t sType = uint32_t(ShiftOp::kLSL);
@ -1247,11 +1259,17 @@ Error Assembler::_emit(InstId instId, const Operand_& o0, const Operand_& o1, co
if (sType <= uint32_t(ShiftOp::kASR)) {
bool hasSP = o0.as<Gp>().isSP() || o1.as<Gp>().isSP();
if (!hasSP) {
if (!checkGpId(o0, o1, kZR))
goto InvalidPhysId;
if (!checkSignature(o1, o2)) {
goto InvalidInstruction;
}
if (shift >= opSize)
if (!checkGpId(o0, o1, kZR)) {
goto InvalidPhysId;
}
if (shift >= opSize) {
goto InvalidImmediate;
}
opcode.reset(uint32_t(opData.shiftedOp) << 21);
opcode.addImm(x, 31);
@ -1264,8 +1282,10 @@ Error Assembler::_emit(InstId instId, const Operand_& o0, const Operand_& o1, co
}
// SP register can only be used with LSL or Extend.
if (sType != uint32_t(ShiftOp::kLSL))
if (sType != uint32_t(ShiftOp::kLSL)) {
goto InvalidImmediate;
}
sType = x ? uint32_t(ShiftOp::kUXTX) : uint32_t(ShiftOp::kUXTW);
}
@ -1273,8 +1293,9 @@ Error Assembler::_emit(InstId instId, const Operand_& o0, const Operand_& o1, co
opcode.reset(uint32_t(opData.extendedOp) << 21);
sType -= uint32_t(ShiftOp::kUXTB);
if (sType > 7 || shift > 4)
if (sType > 7 || shift > 4) {
goto InvalidImmediate;
}
if (!(opcode.get() & B(29))) {
// ADD|SUB (extend) - ZR is not allowed.
@ -1287,6 +1308,11 @@ Error Assembler::_emit(InstId instId, const Operand_& o0, const Operand_& o1, co
goto InvalidPhysId;
}
// Validate whether the register operands match extend option.
if (o2.as<Reg>().type() != extendOptionToRegType(sType) || o1.as<Reg>().type() < o2.as<Reg>().type()) {
goto InvalidInstruction;
}
opcode.addImm(x, 31);
opcode.addReg(o2, 16);
opcode.addImm(sType, 13);
@ -1412,9 +1438,6 @@ Error Assembler::_emit(InstId instId, const Operand_& o0, const Operand_& o1, co
}
if (isign4 == ENC_OPS2(Reg, Reg) || isign4 == ENC_OPS3(Reg, Reg, Imm)) {
if (!checkSignature(o0, o1))
goto InvalidInstruction;
uint32_t opSize = x ? 64 : 32;
uint32_t sType = 0;
uint64_t shift = 0;
@ -1429,8 +1452,13 @@ Error Assembler::_emit(InstId instId, const Operand_& o0, const Operand_& o1, co
// Shift operation - LSL, LSR, ASR.
if (sType <= uint32_t(ShiftOp::kASR)) {
if (!hasSP) {
if (shift >= opSize)
if (!checkSignature(o0, o1)) {
goto InvalidInstruction;
}
if (shift >= opSize) {
goto InvalidImmediate;
}
opcode.reset(uint32_t(opData.shiftedOp) << 21);
opcode.addImm(x, 31);
@ -1451,8 +1479,14 @@ Error Assembler::_emit(InstId instId, const Operand_& o0, const Operand_& o1, co
// Extend operation - UXTB, UXTH, UXTW, UXTX, SXTB, SXTH, SXTW, SXTX.
sType -= uint32_t(ShiftOp::kUXTB);
if (sType > 7 || shift > 4)
if (sType > 7 || shift > 4) {
goto InvalidImmediate;
}
// Validate whether the register operands match extend option.
if (o1.as<Reg>().type() != extendOptionToRegType(sType) || o0.as<Reg>().type() < o1.as<Reg>().type()) {
goto InvalidInstruction;
}
opcode.reset(uint32_t(opData.extendedOp) << 21);
opcode.addImm(x, 31);

11
deps/asmjit/src/asmjit/arm/a64emitter.h vendored
View File

@ -84,6 +84,17 @@ struct EmitterExplicitT {
//! \endcond
//! \name Native Registers
//! \{
//! Returns either 32-bit or 64-bit GP register of the given `id` depending on the emitter's architecture.
inline Gp gpz(uint32_t id) const noexcept { return Gp(_emitter()->_gpSignature, id); }
//! Clones the given `reg` to either 32-bit or 64-bit GP register depending on the emitter's architecture.
inline Gp gpz(const Gp& reg) const noexcept { return Gp(_emitter()->_gpSignature, reg.id()); }
//! \}
//! \name General Purpose Instructions
//! \{

2
deps/asmjit/src/asmjit/arm/a64formatter.cpp vendored
View File

@ -31,7 +31,7 @@ ASMJIT_FAVOR_SIZE Error FormatterInternal::formatInstruction(
// Format instruction options and instruction mnemonic.
InstId instId = inst.realId();
if (instId < Inst::_kIdCount)
if (instId != Inst::kIdNone && instId < Inst::_kIdCount)
ASMJIT_PROPAGATE(InstInternal::instIdToString(instId, sb));
else
ASMJIT_PROPAGATE(sb.appendFormat("[InstId=#%u]", unsigned(instId)));

6
deps/asmjit/src/asmjit/arm/a64func.cpp vendored
View File

@ -13,7 +13,7 @@ ASMJIT_BEGIN_SUB_NAMESPACE(a64)
namespace FuncInternal {
static inline bool shouldThreatAsCDecl(CallConvId ccId) noexcept {
static inline bool shouldTreatAsCDecl(CallConvId ccId) noexcept {
return ccId == CallConvId::kCDecl ||
ccId == CallConvId::kStdCall ||
ccId == CallConvId::kFastCall ||
@ -47,13 +47,13 @@ ASMJIT_FAVOR_SIZE Error initCallConv(CallConv& cc, CallConvId ccId, const Enviro
cc.setSaveRestoreRegSize(RegGroup::kVec, 8);
cc.setSaveRestoreAlignment(RegGroup::kGp, 16);
cc.setSaveRestoreAlignment(RegGroup::kVec, 16);
cc.setSaveRestoreAlignment(RegGroup::kExtraVirt2, 1);
cc.setSaveRestoreAlignment(RegGroup::kMask, 1);
cc.setSaveRestoreAlignment(RegGroup::kExtraVirt3, 1);
cc.setPassedOrder(RegGroup::kGp, 0, 1, 2, 3, 4, 5, 6, 7);
cc.setPassedOrder(RegGroup::kVec, 0, 1, 2, 3, 4, 5, 6, 7);
cc.setNaturalStackAlignment(16);
if (shouldThreatAsCDecl(ccId)) {
if (shouldTreatAsCDecl(ccId)) {
// ARM doesn't have that many calling conventions as we can find in X86 world, treat most conventions as __cdecl.
cc.setId(CallConvId::kCDecl);
cc.setPreservedRegs(RegGroup::kGp, Support::bitMask(Gp::kIdOs, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30));

2
deps/asmjit/src/asmjit/arm/a64globals.h vendored
View File

@ -21,7 +21,7 @@ ASMJIT_BEGIN_SUB_NAMESPACE(a64)
//! AArch64 instruction.
//!
//! \note Only used to hold ARM-specific enumerations and static functions.
struct Inst {
namespace Inst {
//! Instruction id.
enum Id : uint32_t {
// ${InstId:Begin}

9
deps/asmjit/src/asmjit/arm/a64instapi.cpp vendored
View File

@ -137,11 +137,13 @@ Error queryRWInfo(const BaseInst& inst, const Operand_* operands, size_t opCount
if (memOp.hasBase()) {
op.addOpFlags(OpRWFlags::kMemBaseRead);
if ((memOp.hasIndex() || memOp.hasOffset()) && memOp.isPreOrPost()) {
op.addOpFlags(OpRWFlags::kMemBaseWrite);
}
}
if (memOp.hasIndex()) {
op.addOpFlags(OpRWFlags::kMemIndexRead);
op.addOpFlags(memOp.isPreOrPost() ? OpRWFlags::kMemIndexWrite : OpRWFlags::kNone);
}
}
}
@ -191,10 +193,13 @@ Error queryRWInfo(const BaseInst& inst, const Operand_* operands, size_t opCount
if (memOp.hasBase()) {
op.addOpFlags(OpRWFlags::kMemBaseRead);
if ((memOp.hasIndex() || memOp.hasOffset()) && memOp.isPreOrPost()) {
op.addOpFlags(OpRWFlags::kMemBaseWrite);
}
}
if (memOp.hasIndex()) {
op.addOpFlags(memOp.isPreOrPost() ? OpRWFlags::kMemIndexRW : OpRWFlags::kMemIndexRead);
op.addOpFlags(OpRWFlags::kMemIndexRead);
}
}
}

6
deps/asmjit/src/asmjit/arm/a64instdb.cpp vendored
View File

@ -210,7 +210,7 @@ const InstInfo _instInfoTable[] = {
INST(Ldlarb , BaseRM_NoImm , (0b0000100011011111011111, kW , kZR, 0 ) , kRWI_W , 0 , 8 ), // #149
INST(Ldlarh , BaseRM_NoImm , (0b0100100011011111011111, kW , kZR, 0 ) , kRWI_W , 0 , 9 ), // #150
INST(Ldnp , BaseLdpStp , (0b0010100001, 0 , kWX, 31, 2) , kRWI_WW , 0 , 0 ), // #151
INST(Ldp , BaseLdpStp , (0b0010100101, 0b0010100011, kWX, 31, 2) , kRWI_W , 0 , 1 ), // #152
INST(Ldp , BaseLdpStp , (0b0010100101, 0b0010100011, kWX, 31, 2) , kRWI_WW , 0 , 1 ), // #152
INST(Ldpsw , BaseLdpStp , (0b0110100101, 0b0110100011, kX , 0 , 2) , kRWI_WW , 0 , 2 ), // #153
INST(Ldr , BaseLdSt , (0b1011100101, 0b10111000010, 0b10111000011, 0b00011000, kWX, 30, 2, Inst::kIdLdur) , kRWI_W , 0 , 0 ), // #154
INST(Ldraa , BaseRM_SImm10 , (0b1111100000100000000001, kX , kZR, 0, 3) , kRWI_W , 0 , 0 ), // #155
@ -430,11 +430,11 @@ const InstInfo _instInfoTable[] = {
INST(Stz2g , BaseRM_SImm9 , (0b1101100111100000000010, 0b1101100111100000000001, kX , kSP, 0, 4) , kRWI_RW , 0 , 21 ), // #369
INST(Stzg , BaseRM_SImm9 , (0b1101100101100000000010, 0b1101100101100000000001, kX , kSP, 0, 4) , kRWI_RW , 0 , 22 ), // #370
INST(Stzgm , BaseRM_NoImm , (0b1101100100100000000000, kX , kZR, 0) , kRWI_RW , 0 , 20 ), // #371
INST(Sub , BaseAddSub , (0b1001011000, 0b1001011001, 0b1010001) , kRWI_X , 0 , 2 ), // #372
INST(Sub , BaseAddSub , (0b1001011000, 0b1001011001, 0b1010001) , kRWI_W , 0 , 2 ), // #372
INST(Subg , BaseRRII , (0b1101000110000000000000, kX, kSP, kX, kSP, 6, 4, 16, 4, 0, 10) , kRWI_W , 0 , 1 ), // #373
INST(Subp , BaseRRR , (0b1001101011000000000000, kX, kZR, kX, kSP, kX, kSP, false) , kRWI_W , 0 , 20 ), // #374
INST(Subps , BaseRRR , (0b1011101011000000000000, kX, kZR, kX, kSP, kX, kSP, false) , kRWI_W , 0 , 21 ), // #375
INST(Subs , BaseAddSub , (0b1101011000, 0b1101011001, 0b1110001) , kRWI_X , 0 , 3 ), // #376
INST(Subs , BaseAddSub , (0b1101011000, 0b1101011001, 0b1110001) , kRWI_W , 0 , 3 ), // #376
INST(Svc , BaseOpImm , (0b11010100000000000000000000000001, 16, 5) , 0 , 0 , 12 ), // #377
INST(Swp , BaseAtomicOp , (0b1011100000100000100000, kWX, 30, 1) , kRWI_RWX , 0 , 111), // #378
INST(Swpa , BaseAtomicOp , (0b1011100010100000100000, kWX, 30, 1) , kRWI_RWX , 0 , 112), // #379

71
deps/asmjit/src/asmjit/arm/a64operand.h vendored
View File

@ -55,8 +55,12 @@ public:
//! Cast this register to a 32-bit W register (returns a new operand).
ASMJIT_INLINE_NODEBUG GpW w() const noexcept;
//! \overload
ASMJIT_INLINE_NODEBUG GpW r32() const noexcept;
//! Cast this register to a 64-bit X register (returns a new operand).
ASMJIT_INLINE_NODEBUG GpX x() const noexcept;
//! \overload
ASMJIT_INLINE_NODEBUG GpX r64() const noexcept;
};
//! 32-bit general purpose W register (AArch64).
@ -67,6 +71,8 @@ class GpX : public Gp { ASMJIT_DEFINE_FINAL_REG(GpX, Gp, RegTraits<RegType::kARM
#ifndef _DOXYGEN
ASMJIT_INLINE_NODEBUG GpW Gp::w() const noexcept { return GpW(id()); }
ASMJIT_INLINE_NODEBUG GpX Gp::x() const noexcept { return GpX(id()); }
ASMJIT_INLINE_NODEBUG GpW Gp::r32() const noexcept { return GpW(id()); }
ASMJIT_INLINE_NODEBUG GpX Gp::r64() const noexcept { return GpX(id()); }
#endif
//! Vector element type (AArch64).
@ -123,17 +129,45 @@ public:
//! Resets vector element type to none.
ASMJIT_INLINE_NODEBUG void resetElementType() noexcept { _signature.setField<kSignatureRegElementTypeMask>(0); }
ASMJIT_INLINE_NODEBUG constexpr bool isVecB8() const noexcept { return _signature.subset(kBaseSignatureMask | kSignatureRegElementTypeMask) == (RegTraits<RegType::kARM_VecD>::kSignature | kSignatureElementB); }
ASMJIT_INLINE_NODEBUG constexpr bool isVecH4() const noexcept { return _signature.subset(kBaseSignatureMask | kSignatureRegElementTypeMask) == (RegTraits<RegType::kARM_VecD>::kSignature | kSignatureElementH); }
ASMJIT_INLINE_NODEBUG constexpr bool isVecS2() const noexcept { return _signature.subset(kBaseSignatureMask | kSignatureRegElementTypeMask) == (RegTraits<RegType::kARM_VecD>::kSignature | kSignatureElementS); }
ASMJIT_INLINE_NODEBUG constexpr bool isVecD1() const noexcept { return _signature.subset(kBaseSignatureMask | kSignatureRegElementTypeMask) == (RegTraits<RegType::kARM_VecD>::kSignature); }
ASMJIT_INLINE_NODEBUG constexpr bool isVecB8() const noexcept {
return _signature.subset(uint32_t(kBaseSignatureMask) | uint32_t(kSignatureRegElementTypeMask)) == (RegTraits<RegType::kARM_VecD>::kSignature | kSignatureElementB);
}
ASMJIT_INLINE_NODEBUG constexpr bool isVecB16() const noexcept { return _signature.subset(kBaseSignatureMask | kSignatureRegElementTypeMask) == (RegTraits<RegType::kARM_VecV>::kSignature | kSignatureElementB); }
ASMJIT_INLINE_NODEBUG constexpr bool isVecH8() const noexcept { return _signature.subset(kBaseSignatureMask | kSignatureRegElementTypeMask) == (RegTraits<RegType::kARM_VecV>::kSignature | kSignatureElementH); }
ASMJIT_INLINE_NODEBUG constexpr bool isVecS4() const noexcept { return _signature.subset(kBaseSignatureMask | kSignatureRegElementTypeMask) == (RegTraits<RegType::kARM_VecV>::kSignature | kSignatureElementS); }
ASMJIT_INLINE_NODEBUG constexpr bool isVecD2() const noexcept { return _signature.subset(kBaseSignatureMask | kSignatureRegElementTypeMask) == (RegTraits<RegType::kARM_VecV>::kSignature | kSignatureElementD); }
ASMJIT_INLINE_NODEBUG constexpr bool isVecB4x4() const noexcept { return _signature.subset(kBaseSignatureMask | kSignatureRegElementTypeMask) == (RegTraits<RegType::kARM_VecV>::kSignature | kSignatureElementB4); }
ASMJIT_INLINE_NODEBUG constexpr bool isVecH2x4() const noexcept { return _signature.subset(kBaseSignatureMask | kSignatureRegElementTypeMask) == (RegTraits<RegType::kARM_VecV>::kSignature | kSignatureElementH2); }
ASMJIT_INLINE_NODEBUG constexpr bool isVecH4() const noexcept {
return _signature.subset(uint32_t(kBaseSignatureMask) | uint32_t(kSignatureRegElementTypeMask)) == (RegTraits<RegType::kARM_VecD>::kSignature | kSignatureElementH);
}
ASMJIT_INLINE_NODEBUG constexpr bool isVecS2() const noexcept {
return _signature.subset(uint32_t(kBaseSignatureMask) | uint32_t(kSignatureRegElementTypeMask)) == (RegTraits<RegType::kARM_VecD>::kSignature | kSignatureElementS);
}
ASMJIT_INLINE_NODEBUG constexpr bool isVecD1() const noexcept {
return _signature.subset(uint32_t(kBaseSignatureMask) | uint32_t(kSignatureRegElementTypeMask)) == (RegTraits<RegType::kARM_VecD>::kSignature);
}
ASMJIT_INLINE_NODEBUG constexpr bool isVecB16() const noexcept {
return _signature.subset(uint32_t(kBaseSignatureMask) | uint32_t(kSignatureRegElementTypeMask)) == (RegTraits<RegType::kARM_VecV>::kSignature | kSignatureElementB);
}
ASMJIT_INLINE_NODEBUG constexpr bool isVecH8() const noexcept {
return _signature.subset(uint32_t(kBaseSignatureMask) | uint32_t(kSignatureRegElementTypeMask)) == (RegTraits<RegType::kARM_VecV>::kSignature | kSignatureElementH);
}
ASMJIT_INLINE_NODEBUG constexpr bool isVecS4() const noexcept {
return _signature.subset(uint32_t(kBaseSignatureMask) | uint32_t(kSignatureRegElementTypeMask)) == (RegTraits<RegType::kARM_VecV>::kSignature | kSignatureElementS);
}
ASMJIT_INLINE_NODEBUG constexpr bool isVecD2() const noexcept {
return _signature.subset(uint32_t(kBaseSignatureMask) | uint32_t(kSignatureRegElementTypeMask)) == (RegTraits<RegType::kARM_VecV>::kSignature | kSignatureElementD);
}
ASMJIT_INLINE_NODEBUG constexpr bool isVecB4x4() const noexcept {
return _signature.subset(uint32_t(kBaseSignatureMask) | uint32_t(kSignatureRegElementTypeMask)) == (RegTraits<RegType::kARM_VecV>::kSignature | kSignatureElementB4);
}
ASMJIT_INLINE_NODEBUG constexpr bool isVecH2x4() const noexcept {
return _signature.subset(uint32_t(kBaseSignatureMask) | uint32_t(kSignatureRegElementTypeMask)) == (RegTraits<RegType::kARM_VecV>::kSignature | kSignatureElementH2);
}
//! Creates a cloned register with element access.
ASMJIT_INLINE_NODEBUG Vec at(uint32_t elementIndex) const noexcept {
@ -153,6 +187,17 @@ public:
//! Cast this register to a 128-bit V register.
ASMJIT_INLINE_NODEBUG VecV v() const noexcept;
//! Casts this register to b (clone).
ASMJIT_INLINE_NODEBUG Vec v8() const noexcept;
//! Casts this register to h (clone).
ASMJIT_INLINE_NODEBUG Vec v16() const noexcept;
//! Casts this register to s (clone).
ASMJIT_INLINE_NODEBUG Vec v32() const noexcept;
//! Casts this register to d (clone).
ASMJIT_INLINE_NODEBUG Vec v64() const noexcept;
//! Casts this register to q (clone).
ASMJIT_INLINE_NODEBUG Vec v128() const noexcept;
//! Cast this register to a 128-bit V.B[elementIndex] register.
ASMJIT_INLINE_NODEBUG VecV b(uint32_t elementIndex) const noexcept;
//! Cast this register to a 128-bit V.H[elementIndex] register.
@ -229,6 +274,12 @@ ASMJIT_INLINE_NODEBUG VecD Vec::d() const noexcept { return VecD(id()); }
ASMJIT_INLINE_NODEBUG VecV Vec::q() const noexcept { return VecV(id()); }
ASMJIT_INLINE_NODEBUG VecV Vec::v() const noexcept { return VecV(id()); }
ASMJIT_INLINE_NODEBUG Vec Vec::v8() const noexcept { return VecB(id()); }
ASMJIT_INLINE_NODEBUG Vec Vec::v16() const noexcept { return VecH(id()); }
ASMJIT_INLINE_NODEBUG Vec Vec::v32() const noexcept { return VecS(id()); }
ASMJIT_INLINE_NODEBUG Vec Vec::v64() const noexcept { return VecD(id()); }
ASMJIT_INLINE_NODEBUG Vec Vec::v128() const noexcept { return VecV(id()); }
ASMJIT_INLINE_NODEBUG VecV Vec::b(uint32_t elementIndex) const noexcept { return VecV(_makeElementAccessSignature(VecElementType::kB, elementIndex), id()); }
ASMJIT_INLINE_NODEBUG VecV Vec::h(uint32_t elementIndex) const noexcept { return VecV(_makeElementAccessSignature(VecElementType::kH, elementIndex), id()); }
ASMJIT_INLINE_NODEBUG VecV Vec::s(uint32_t elementIndex) const noexcept { return VecV(_makeElementAccessSignature(VecElementType::kS, elementIndex), id()); }

4
deps/asmjit/src/asmjit/arm/a64rapass.cpp vendored
View File

@ -595,14 +595,14 @@ void ARMRAPass::onInit() noexcept {
_archTraits = &ArchTraits::byArch(arch);
_physRegCount.set(RegGroup::kGp, 32);
_physRegCount.set(RegGroup::kVec, 32);
_physRegCount.set(RegGroup::kExtraVirt2, 0);
_physRegCount.set(RegGroup::kMask, 0);
_physRegCount.set(RegGroup::kExtraVirt3, 0);
_buildPhysIndex();
_availableRegCount = _physRegCount;
_availableRegs[RegGroup::kGp] = Support::lsbMask<uint32_t>(_physRegCount.get(RegGroup::kGp));
_availableRegs[RegGroup::kVec] = Support::lsbMask<uint32_t>(_physRegCount.get(RegGroup::kVec));
_availableRegs[RegGroup::kExtraVirt3] = Support::lsbMask<uint32_t>(_physRegCount.get(RegGroup::kExtraVirt2));
_availableRegs[RegGroup::kMask] = Support::lsbMask<uint32_t>(_physRegCount.get(RegGroup::kMask));
_availableRegs[RegGroup::kExtraVirt3] = Support::lsbMask<uint32_t>(_physRegCount.get(RegGroup::kExtraVirt3));
_scratchRegIndexes[0] = uint8_t(27);

6
deps/asmjit/src/asmjit/arm/armformatter.cpp vendored
View File

@ -555,6 +555,12 @@ ASMJIT_FAVOR_SIZE Error FormatterInternal::formatOperand(
if (op.isImm()) {
const Imm& i = op.as<Imm>();
int64_t val = i.value();
uint32_t predicate = i.predicate();
if (predicate) {
ASMJIT_PROPAGATE(formatShiftOp(sb, ShiftOp(predicate)));
ASMJIT_PROPAGATE(sb.append(' '));
}
if (Support::test(flags, FormatFlags::kHexImms) && uint64_t(val) > 9) {
ASMJIT_PROPAGATE(sb.append("0x"));

13
deps/asmjit/src/asmjit/arm/armoperand.h vendored
View File

@ -68,6 +68,17 @@ public:
//! Gets whether the register is a VEC-V register (128-bit).
ASMJIT_INLINE_NODEBUG constexpr bool isVecV() const noexcept { return baseSignature() == RegTraits<RegType::kARM_VecV>::kSignature; }
//! Gets whether the register is an 8-bit vector register or view, alias if \ref isVecB().
ASMJIT_INLINE_NODEBUG constexpr bool isVec8() const noexcept { return baseSignature() == RegTraits<RegType::kARM_VecB>::kSignature; }
//! Gets whether the register is a 16-bit vector register or view, alias if \ref isVecH().
ASMJIT_INLINE_NODEBUG constexpr bool isVec16() const noexcept { return baseSignature() == RegTraits<RegType::kARM_VecH>::kSignature; }
//! Gets whether the register is a 32-bit vector register or view, alias if \ref isVecS().
ASMJIT_INLINE_NODEBUG constexpr bool isVec32() const noexcept { return baseSignature() == RegTraits<RegType::kARM_VecS>::kSignature; }
//! Gets whether the register is a 64-bit vector register or view, alias if \ref isVecD().
ASMJIT_INLINE_NODEBUG constexpr bool isVec64() const noexcept { return baseSignature() == RegTraits<RegType::kARM_VecD>::kSignature; }
//! Gets whether the register is a 128-bit vector register or view, alias if \ref isVecQ().
ASMJIT_INLINE_NODEBUG constexpr bool isVec128() const noexcept { return baseSignature() == RegTraits<RegType::kARM_VecV>::kSignature; }
template<RegType kRegType>
ASMJIT_INLINE_NODEBUG void setRegT(uint32_t id) noexcept {
setSignature(RegTraits<kRegType>::kSignature);
@ -212,7 +223,7 @@ public:
Signature::fromValue<kSignatureMemShiftValueMask>(shift.value()) |
signature, base.id(), index.id(), 0) {}
ASMJIT_INLINE_NODEBUG constexpr Mem(uint64_t base, Signature signature = Signature{0}) noexcept
ASMJIT_INLINE_NODEBUG constexpr explicit Mem(uint64_t base, Signature signature = Signature{0}) noexcept
: BaseMem(Signature::fromOpType(OperandType::kMem) |
signature, uint32_t(base >> 32), 0, int32_t(uint32_t(base & 0xFFFFFFFFu))) {}

7
deps/asmjit/src/asmjit/arm/armutils.h vendored
View File

@ -127,6 +127,13 @@ static ASMJIT_INLINE_NODEBUG bool isLogicalImm(uint64_t imm, uint32_t width) noe
return encodeLogicalImm(imm, width, &dummy);
}
//! Returns true if the given `imm` value is encodable as an immediate with `add` and `sub` instructions on AArch64.
//! These two instructions can encode 12-bit immediate value optionally shifted left by 12 bits.
ASMJIT_MAYBE_UNUSED
static ASMJIT_INLINE_NODEBUG bool isAddSubImm(uint64_t imm) noexcept {
return imm <= 0xFFFu || (imm & ~uint64_t(0xFFFu << 12)) == 0;
}
//! Returns true if the given `imm` value is a byte mask. Byte mask has each byte part of the value set to either
//! 0x00 or 0xFF. Some ARM instructions accept immediates that form a byte-mask and this function can be used to
//! verify that the immediate is encodable before using the value.

34
deps/asmjit/src/asmjit/core.h vendored
View File

@ -145,8 +145,7 @@ namespace asmjit {
//! ### Supported Backends / Architectures
//!
//! - **X86** and **X86_64** - Both 32-bit and 64-bit backends tested on CI.
//! - **AArch64** - AArch64 backend is currently only partially tested (there is no native AArch64 runner to test
//! AsmJit Builder/Compiler).
//! - **AArch64** - Tested on CI (Native Apple runners and Linux emulated via QEMU).
//!
//! ### Static Builds and Embedding
//!
@ -740,15 +739,17 @@ namespace asmjit {
//! JitAllocator allocator;
//!
//! // Allocate an executable virtual memory and handle a possible failure.
//! void* p = allocator.alloc(estimatedSize);
//! if (!p)
//! JitAllocator::Span span;
//! Error err = allocator.alloc(span, estimatedSize);
//!
//! if (err != kErrorOk) // <- NOTE: This must be checked, always!
//! return 0;
//!
//! // Now relocate the code to the address provided by the memory allocator.
//! // Please note that this DOESN'T COPY anything to `p`. This function will
//! // store the address in CodeHolder and use relocation entries to patch the
//! // existing code in all sections to respect the base address provided.
//! code.relocateToBase((uint64_t)p);
//! // Please note that this DOESN'T COPY anything to it. This function will
//! // store the address in CodeHolder and use relocation entries to patch
//! // the existing code in all sections to respect the base address provided.
//! code.relocateToBase((uint64_t)span.rx());
//!
//! // This is purely optional. There are cases in which the relocation can omit
//! // unneeded data, which would shrink the size of address table. If that
@ -761,12 +762,17 @@ namespace asmjit {
//! // additional options that can be used to also zero pad sections' virtual
//! // size, etc.
//! //
//! // With some additional features, copyFlattenData() does roughly this:
//! // for (Section* section : code.sections())
//! // memcpy((uint8_t*)p + section->offset(),
//! // section->data(),
//! // section->bufferSize());
//! code.copyFlattenedData(p, codeSize, CopySectionFlags::kPadSectionBuffer);
//! // With some additional features, copyFlattenData() does roughly the following:
//! //
//! // allocator.write([&](JitAllocator::Span& span) {
//! // for (Section* section : code.sections()) {
//! // uint8_t* p = (uint8_t*)span.rw() + section->offset();
//! // memcpy(p, section->data(), section->bufferSize());
//! // }
//! // }
//! allocator.write([&](JitAllocator::Span& span) {
//! code.copyFlattenedData(span.rw(), codeSize, CopySectionFlags::kPadSectionBuffer);
//! });
//!
//! // Execute the generated function.
//! int inA[4] = { 4, 3, 2, 1 };

2
deps/asmjit/src/asmjit/core/api-config.h vendored
View File

@ -232,7 +232,7 @@ namespace asmjit {
#define ASMJIT_ARCH_BITS (ASMJIT_ARCH_X86 | ASMJIT_ARCH_ARM | ASMJIT_ARCH_MIPS | ASMJIT_ARCH_RISCV)
#if ASMJIT_ARCH_BITS == 0
#undef ASMJIT_ARCH_BITS
#if defined (__LP64__) || defined(_LP64)
#if defined(__LP64__) || defined(_LP64)
#define ASMJIT_ARCH_BITS 64
#else
#define ASMJIT_ARCH_BITS 32

44
deps/asmjit/src/asmjit/core/archcommons.h vendored
View File

@ -42,21 +42,24 @@ enum class CondCode : uint8_t {
kGT = 0x0Eu, //!< Z==0 & N==V (signed > )
kLE = 0x0Fu, //!< Z==1 | N!=V (signed <=)
kSign = kMI, //!< Sign.
kNotSign = kPL, //!< Not sign.
kOverflow = kVS, //!< Signed overflow.
kNotOverflow = kVC, //!< Not signed overflow.
kZero = kEQ, //!< Zero flag (alias to equal).
kNotZero = kNE, //!< Not zero (alias to Not Equal).
kEqual = kEQ, //!< Equal `a == b`.
kNotEqual = kNE, //!< Not Equal `a != b`.
kZero = kEQ, //!< Zero (alias to equal).
kNotZero = kNE, //!< Not Zero (alias to Not Equal).
kCarry = kCS, //!< Carry flag.
kNotCarry = kCC, //!< Not carry.
kSign = kMI, //!< Sign flag.
kNotSign = kPL, //!< Not sign.
kNegative = kMI, //!< Negative.
kPositive = kPL, //!< Positive or zero.
kOverflow = kVS, //!< Signed overflow.
kNotOverflow = kVC, //!< Not signed overflow.
kSignedLT = kLT, //!< Signed `a < b`.
kSignedLE = kLE, //!< Signed `a <= b`.
kSignedGT = kGT, //!< Signed `a > b`.
@ -67,11 +70,38 @@ enum class CondCode : uint8_t {
kUnsignedGT = kHI, //!< Unsigned `a > b`.
kUnsignedGE = kHS, //!< Unsigned `a >= b`.
kBTZero = kZero, //!< Tested bit is zero.
kBTNotZero = kNotZero, //!< Tested bit is not zero.
kAlways = kAL, //!< No condition code (always).
kMaxValue = 0x0Fu //!< Maximum value of `CondCode`.
};
//! \cond
static constexpr CondCode _reverseCondTable[] = {
CondCode::kAL, // AL <- AL
CondCode::kNA, // NA <- NA
CondCode::kEQ, // EQ <- EQ
CondCode::kNE, // NE <- NE
CondCode::kLS, // LS <- CS
CondCode::kHI, // HI <- LO
CondCode::kMI, // MI <- MI
CondCode::kPL, // PL <- PL
CondCode::kVS, // VS <- VS
CondCode::kVC, // VC <- VC
CondCode::kLO, // LO <- HI
CondCode::kCS, // CS <- LS
CondCode::kLE, // LE <- GE
CondCode::kGT, // GT <- LT
CondCode::kLT, // LT <- GT
CondCode::kGE // GE <- LE
};
//! \endcond
//! Reverses a condition code (reverses the corresponding operands of a comparison).
static ASMJIT_INLINE_NODEBUG constexpr CondCode reverseCond(CondCode cond) noexcept { return _reverseCondTable[uint8_t(cond)]; }
//! Negates a condition code.
static ASMJIT_INLINE_NODEBUG constexpr CondCode negateCond(CondCode cond) noexcept { return CondCode(uint8_t(cond) ^ uint8_t(1)); }

2
deps/asmjit/src/asmjit/core/compiler.h vendored
View File

@ -163,6 +163,8 @@ public:
//!
//! \note This version accepts a snprintf() format `fmt` followed by a variadic arguments.
ASMJIT_API Error _newRegFmt(BaseReg* ASMJIT_NONNULL(out), TypeId typeId, const char* fmt, ...);
//! \overload
inline Error _newRegFmt(BaseReg* ASMJIT_NONNULL(out), TypeId typeId) { return _newRegFmt(out, typeId, nullptr); }
//! Creates a new virtual register compatible with the provided reference register `ref`.
ASMJIT_API Error _newReg(BaseReg* ASMJIT_NONNULL(out), const BaseReg& ref, const char* name = nullptr);

37
deps/asmjit/src/asmjit/core/cpuinfo.cpp vendored
View File

@ -7,6 +7,8 @@
#include "../core/cpuinfo.h"
#include "../core/support.h"
#include <atomic>
// Required by `__cpuidex()` and `_xgetbv()`.
#if ASMJIT_ARCH_X86
#if defined(_MSC_VER)
@ -14,10 +16,6 @@
#endif
#endif // ASMJIT_ARCH_X86
#if !defined(_WIN32)
#include <unistd.h>
#endif
#if ASMJIT_ARCH_ARM
// Required by various utilities that are required by features detection.
#if !defined(_WIN32)
@ -51,6 +49,17 @@
#endif
#endif // ASMJIT_ARCH_ARM
#if !defined(_WIN32) && (ASMJIT_ARCH_X86 || ASMJIT_ARCH_ARM)
#include <unistd.h>
#endif
// Unfortunately when compiling in C++11 mode MSVC would warn about unused functions as
// [[maybe_unused]] attribute is not used in that case (it's used only by C++17 mode and later).
#if defined(_MSC_VER)
#pragma warning(push)
#pragma warning(disable: 4505) // unreferenced local function has been removed.
#endif // _MSC_VER
ASMJIT_BEGIN_NAMESPACE
// CpuInfo - Detect - Compatibility
@ -196,7 +205,7 @@ static ASMJIT_FAVOR_SIZE void simplifyCpuBrand(char* s) noexcept {
if (!c)
break;
if (!(c == ' ' && (prev == '@' || s[1] == ' ' || s[1] == '@'))) {
if (!(c == ' ' && (prev == '@' || s[1] == ' ' || s[1] == '@' || s[1] == '\0'))) {
*d++ = c;
prev = c;
}
@ -1969,13 +1978,13 @@ static ASMJIT_FAVOR_SIZE void detectARMCpu(CpuInfo& cpu) noexcept {
// CpuInfo - Detect - Host
// =======================
static uint32_t cpuInfoInitialized;
static CpuInfo cpuInfoGlobal(Globals::NoInit);
const CpuInfo& CpuInfo::host() noexcept {
// This should never cause a problem as the resulting information should always be the same.
// In the worst case it would just be overwritten non-atomically.
if (!cpuInfoInitialized) {
static std::atomic<uint32_t> cpuInfoInitialized;
static CpuInfo cpuInfoGlobal(Globals::NoInit);
// This should never cause a problem as the resulting information should always
// be the same. In the worst case it would just be overwritten non-atomically.
if (!cpuInfoInitialized.load(std::memory_order_relaxed)) {
CpuInfo cpuInfoLocal;
cpuInfoLocal._arch = Arch::kHost;
@ -1989,10 +1998,14 @@ const CpuInfo& CpuInfo::host() noexcept {
cpuInfoLocal._hwThreadCount = detectHWThreadCount();
cpuInfoGlobal = cpuInfoLocal;
cpuInfoInitialized = 1;
cpuInfoInitialized.store(1, std::memory_order_seq_cst);
}
return cpuInfoGlobal;
}
#if defined(_MSC_VER)
#pragma warning(pop)
#endif // _MSC_VER
ASMJIT_END_NAMESPACE

18
deps/asmjit/src/asmjit/core/cpuinfo.h vendored
View File

@ -22,11 +22,6 @@ ASMJIT_BEGIN_NAMESPACE
//! Each feature is represented by a single bit in an embedded bit array.
class CpuFeatures {
public:
//! A word that is used to represents feature bits.
typedef Support::BitWord BitWord;
//! Iterator that can iterate all CPU features set.
typedef Support::BitVectorIterator<BitWord> Iterator;
//! \name Constants
//! \{
@ -37,6 +32,13 @@ public:
};
//! \endcond
//! A word that is used to represents feature bits.
typedef Support::BitWord BitWord;
//! Iterator that can iterate all CPU features set.
typedef Support::BitVectorIterator<BitWord> Iterator;
typedef Support::Array<BitWord, kNumBitWords> Bits;
//! \}
//! \name Data
@ -48,7 +50,7 @@ public:
//! \{
//! Data bits.
Support::Array<BitWord, kNumBitWords> _bits;
Bits _bits;
//! \}
@ -178,8 +180,7 @@ public:
#endif // !ASMJIT_NO_DEPRECATED
//! \}
};
};
//! X86 specific features data.
struct X86 : public Data {
@ -948,6 +949,7 @@ public:
ASMJIT_INLINE_NODEBUG CpuFeatures() noexcept {}
ASMJIT_INLINE_NODEBUG CpuFeatures(const CpuFeatures& other) noexcept = default;
ASMJIT_INLINE_NODEBUG explicit CpuFeatures(const Data& other) noexcept : _data{other._bits} {}
ASMJIT_INLINE_NODEBUG explicit CpuFeatures(Globals::NoInit_) noexcept {}
//! \}

3
deps/asmjit/src/asmjit/core/emitter.h vendored
View File

@ -373,6 +373,9 @@ public:
//! Returns the target architecture's GP register size (4 or 8 bytes).
ASMJIT_INLINE_NODEBUG uint32_t registerSize() const noexcept { return environment().registerSize(); }
//! Returns a signature of a native general purpose register (either 32-bit or 64-bit depending on the architecture).
ASMJIT_INLINE_NODEBUG OperandSignature gpSignature() const noexcept { return _gpSignature; }
//! Returns instruction alignment.
//!
//! The following values are returned based on the target architecture:

3
deps/asmjit/src/asmjit/core/globals.cpp vendored
View File

@ -87,6 +87,7 @@ ASMJIT_FAVOR_SIZE const char* DebugUtils::errorAsString(Error err) noexcept {
"ExpressionOverflow\0"
"FailedToOpenAnonymousMemory\0"
"FailedToOpenFile\0"
"ProtectionFailure\0"
"<Unknown>\0";
static const uint16_t sErrorIndex[] = {
@ -94,7 +95,7 @@ ASMJIT_FAVOR_SIZE const char* DebugUtils::errorAsString(Error err) noexcept {
247, 264, 283, 298, 314, 333, 352, 370, 392, 410, 429, 444, 460, 474, 488,
508, 533, 551, 573, 595, 612, 629, 645, 661, 677, 694, 709, 724, 744, 764,
784, 817, 837, 852, 869, 888, 909, 929, 943, 964, 978, 996, 1012, 1028, 1047,
1073, 1088, 1104, 1119, 1134, 1164, 1188, 1207, 1235, 1252
1073, 1088, 1104, 1119, 1134, 1164, 1188, 1207, 1235, 1252, 1270
};
// @EnumStringEnd@

4
deps/asmjit/src/asmjit/core/globals.h vendored
View File

@ -334,6 +334,10 @@ enum ErrorCode : uint32_t {
//! \note This is a generic error that is used by internal filesystem API.
kErrorFailedToOpenFile,
//! Protection failure can be returned from a virtual memory allocator or when trying to change memory access
//! permissions.
kErrorProtectionFailure,
// @EnumValuesEnd@
//! Count of AsmJit error codes.

46
deps/asmjit/src/asmjit/core/jitallocator.cpp vendored
View File

@ -448,7 +448,7 @@ static inline JitAllocatorPrivateImpl* JitAllocatorImpl_new(const JitAllocator::
// Setup pool count to [1..3].
size_t poolCount = 1;
if (Support::test(options, JitAllocatorOptions::kUseMultiplePools))
poolCount = kJitAllocatorMultiPoolCount;;
poolCount = kJitAllocatorMultiPoolCount;
// Setup block size [64kB..256MB].
if (blockSize < 64 * 1024 || blockSize > 256 * 1024 * 1024 || !Support::isPowerOf2(blockSize))
@ -744,26 +744,28 @@ void JitAllocator::reset(ResetPolicy resetPolicy) noexcept {
JitAllocatorPool& pool = impl->pools[poolId];
JitAllocatorBlock* block = pool.blocks.first();
JitAllocatorBlock* blockToKeep = nullptr;
if (resetPolicy != ResetPolicy::kHard && uint32_t(impl->options & JitAllocatorOptions::kImmediateRelease) == 0) {
blockToKeep = block;
block = block->next();
}
while (block) {
JitAllocatorBlock* next = block->next();
JitAllocatorImpl_deleteBlock(impl, block);
block = next;
}
pool.reset();
if (blockToKeep) {
blockToKeep->_listNodes[0] = nullptr;
blockToKeep->_listNodes[1] = nullptr;
JitAllocatorImpl_wipeOutBlock(impl, blockToKeep);
JitAllocatorImpl_insertBlock(impl, blockToKeep);
pool.emptyBlockCount = 1;
if (block) {
JitAllocatorBlock* blockToKeep = nullptr;
if (resetPolicy != ResetPolicy::kHard && uint32_t(impl->options & JitAllocatorOptions::kImmediateRelease) == 0) {
blockToKeep = block;
block = block->next();
}
while (block) {
JitAllocatorBlock* next = block->next();
JitAllocatorImpl_deleteBlock(impl, block);
block = next;
}
if (blockToKeep) {
blockToKeep->_listNodes[0] = nullptr;
blockToKeep->_listNodes[1] = nullptr;
JitAllocatorImpl_wipeOutBlock(impl, blockToKeep);
JitAllocatorImpl_insertBlock(impl, blockToKeep);
pool.emptyBlockCount = 1;
}
}
}
}
@ -1387,6 +1389,11 @@ static void BitVectorRangeIterator_testRandom(Random& rnd, size_t count) noexcep
}
}
static void test_jit_allocator_reset_empty() noexcept {
JitAllocator allocator;
allocator.reset(ResetPolicy::kSoft);
}
static void test_jit_allocator_alloc_release() noexcept {
size_t kCount = BrokenAPI::hasArg("--quick") ? 20000 : 100000;
@ -1553,6 +1560,7 @@ static void test_jit_allocator_query() noexcept {
}
UNIT(jit_allocator) {
test_jit_allocator_reset_empty();
test_jit_allocator_alloc_release();
test_jit_allocator_query();
}

132
deps/asmjit/src/asmjit/core/operand.h vendored
View File

@ -173,8 +173,8 @@ enum class RegGroup : uint8_t {
//! Describes X86 XMM|YMM|ZMM registers ARM/AArch64 V registers.
kVec = 1,
//! Extra virtual group #2 that can be used by Compiler for register allocation.
kExtraVirt2 = 2,
//! Mask register group compatible with all backends that can use masking.
kMask = 2,
//! Extra virtual group #3 that can be used by Compiler for register allocation.
kExtraVirt3 = 3,
@ -187,8 +187,8 @@ enum class RegGroup : uint8_t {
// X86 Specific Register Groups
// ----------------------------
//! K register group (KReg) - maps to \ref RegGroup::kExtraVirt2 (X86, X86_64).
kX86_K = kExtraVirt2,
//! K register group (KReg) - maps to \ref RegGroup::kMask (X86, X86_64).
kX86_K = kMask,
//! MMX register group (MM) - maps to \ref RegGroup::kExtraVirt3 (X86, X86_64).
kX86_MM = kExtraVirt3,
@ -530,7 +530,12 @@ struct Operand_ {
//! \endcond
//! Initializes the operand from `other` operand (used by operator overloads).
ASMJIT_INLINE_NODEBUG void copyFrom(const Operand_& other) noexcept { memcpy(this, &other, sizeof(Operand_)); }
ASMJIT_INLINE_NODEBUG void copyFrom(const Operand_& other) noexcept {
_signature._bits = other._signature._bits;
_baseId = other._baseId;
_data[0] = other._data[0];
_data[1] = other._data[1];
}
//! Resets the `Operand` to none.
//!
@ -591,6 +596,22 @@ struct Operand_ {
//! \}
//! \name Equality
//! \{
//! Tests whether the operand is 100% equal to `other` operand.
//!
//! \note This basically performs a binary comparison, if aby bit is
//! different the operands are not equal.
ASMJIT_INLINE_NODEBUG constexpr bool equals(const Operand_& other) const noexcept {
return bool(unsigned(_signature == other._signature) &
unsigned(_baseId == other._baseId ) &
unsigned(_data[0] == other._data[0] ) &
unsigned(_data[1] == other._data[1] ));
}
//! \}
//! \name Accessors
//! \{
@ -609,6 +630,8 @@ struct Operand_ {
//!
//! \note Improper use of `setSignature()` can lead to hard-to-debug errors.
ASMJIT_INLINE_NODEBUG void setSignature(const Signature& signature) noexcept { _signature = signature; }
//! \overload
ASMJIT_INLINE_NODEBUG void setSignature(uint32_t signature) noexcept { _signature._bits = signature; }
//! Returns the type of the operand, see `OpType`.
ASMJIT_INLINE_NODEBUG constexpr OperandType opType() const noexcept { return _signature.opType(); }
@ -643,32 +666,53 @@ struct Operand_ {
//! not initialized.
ASMJIT_INLINE_NODEBUG constexpr uint32_t id() const noexcept { return _baseId; }
//! Tests whether the operand is 100% equal to `other` operand.
//!
//! \note This basically performs a binary comparison, if aby bit is
//! different the operands are not equal.
ASMJIT_INLINE_NODEBUG constexpr bool equals(const Operand_& other) const noexcept {
return bool(unsigned(_signature == other._signature) &
unsigned(_baseId == other._baseId ) &
unsigned(_data[0] == other._data[0] ) &
unsigned(_data[1] == other._data[1] ));
}
//! Tests whether the operand is a register matching the given register `type`.
ASMJIT_INLINE_NODEBUG constexpr bool isReg(RegType type) const noexcept {
return _signature.subset(Signature::kOpTypeMask | Signature::kRegTypeMask) == (Signature::fromOpType(OperandType::kReg) | Signature::fromRegType(type));
}
//! Tests whether the operand is a register of the provided register group `regGroup`.
ASMJIT_INLINE_NODEBUG constexpr bool isReg(RegGroup regGroup) const noexcept {
return _signature.subset(Signature::kOpTypeMask | Signature::kRegGroupMask) == (Signature::fromOpType(OperandType::kReg) | Signature::fromRegGroup(regGroup));
}
//! Tests whether the operand is register and of register type `regType` and `regId`.
ASMJIT_INLINE_NODEBUG constexpr bool isReg(RegType regType, uint32_t regId) const noexcept { return isReg(regType) && _baseId == regId; }
//! Tests whether the operand is register and of register group `regGroup` and `regId`.
ASMJIT_INLINE_NODEBUG constexpr bool isReg(RegGroup regGroup, uint32_t regId) const noexcept { return isReg(regGroup) && _baseId == regId; }
//! Tests whether the register is a general purpose register (any size).
ASMJIT_INLINE_NODEBUG constexpr bool isGp() const noexcept { return isReg(RegGroup::kGp); }
//! Tests whether the register is a 32-bit general purpose register.
ASMJIT_INLINE_NODEBUG constexpr bool isGp32() const noexcept { return isReg(RegType::kGp32); }
//! Tests whether the register is a 64-bit general purpose register.
ASMJIT_INLINE_NODEBUG constexpr bool isGp64() const noexcept { return isReg(RegType::kGp64); }
//! Tests whether the register is a vector register of any size.
ASMJIT_INLINE_NODEBUG constexpr bool isVec() const noexcept { return isReg(RegGroup::kVec); }
//! Tests whether the register is an 8-bit vector register or view (AArch64).
ASMJIT_INLINE_NODEBUG constexpr bool isVec8() const noexcept { return isReg(RegType::kVec8); }
//! Tests whether the register is a 16-bit vector register or view (AArch64).
ASMJIT_INLINE_NODEBUG constexpr bool isVec16() const noexcept { return isReg(RegType::kVec16); }
//! Tests whether the register is a 32-bit vector register or view (AArch32, AArch64).
ASMJIT_INLINE_NODEBUG constexpr bool isVec32() const noexcept { return isReg(RegType::kVec32); }
//! Tests whether the register is a 64-bit vector register or view (AArch32, AArch64).
ASMJIT_INLINE_NODEBUG constexpr bool isVec64() const noexcept { return isReg(RegType::kVec64); }
//! Tests whether the register is a 128-bit vector register or view (AArch32, AArch64, X86, X86_64).
ASMJIT_INLINE_NODEBUG constexpr bool isVec128() const noexcept { return isReg(RegType::kVec128); }
//! Tests whether the register is a 256-bit vector register or view (X86, X86_64).
ASMJIT_INLINE_NODEBUG constexpr bool isVec256() const noexcept { return isReg(RegType::kVec256); }
//! Tests whether the register is a 512-bit vector register or view (X86, X86_64).
ASMJIT_INLINE_NODEBUG constexpr bool isVec512() const noexcept { return isReg(RegType::kVec512); }
//! Tests whether the register is a mask register of any size.
ASMJIT_INLINE_NODEBUG constexpr bool isMask() const noexcept { return isReg(RegGroup::kMask); }
//! Tests whether the operand is a register matching the given register `type`.
ASMJIT_INLINE_NODEBUG constexpr bool isRegList(RegType type) const noexcept {
return _signature.subset(Signature::kOpTypeMask | Signature::kRegTypeMask) == (Signature::fromOpType(OperandType::kRegList) | Signature::fromRegType(type));
}
//! Tests whether the operand is register and of register `type` and `id`.
ASMJIT_INLINE_NODEBUG constexpr bool isReg(RegType type, uint32_t regId) const noexcept {
return isReg(type) && _baseId == regId;
}
//! Tests whether the operand is a register or memory.
//!
//! \note This is useful on X86 and X86_64 architectures as many instructions support Reg/Mem operand combination.
@ -694,26 +738,24 @@ struct Operand_ {
//! Returns a size of a register or an X86 memory operand.
//!
//! At the moment only X86 and X86_64 memory operands have a size - other memory operands can use bits that represent
//! size as an additional payload. This means that memory size is architecture specific and should be accessed via
//! \ref x86::Mem::size(). Sometimes when the user knows that the operand is either a register or memory operand this
//! function can be helpful as it avoids casting.
ASMJIT_INLINE_NODEBUG constexpr uint32_t x86RmSize() const noexcept {
return _signature.size();
}
#if !defined(ASMJIT_NO_DEPRECATED)
ASMJIT_DEPRECATED("hasSize() is no longer portable - use x86RmSize() instead, if your target is X86/X86_64")
ASMJIT_INLINE_NODEBUG constexpr bool hasSize() const noexcept { return x86RmSize() != 0u; }
ASMJIT_DEPRECATED("hasSize() is no longer portable - use x86RmSize() instead, if your target is X86/X86_64")
ASMJIT_INLINE_NODEBUG constexpr bool hasSize(uint32_t s) const noexcept { return x86RmSize() == s; }
ASMJIT_DEPRECATED("size() is no longer portable - use x86RmSize() instead, if your target is X86/X86_64")
ASMJIT_INLINE_NODEBUG constexpr uint32_t size() const noexcept { return _signature.getField<Signature::kSizeMask>(); }
#endif
//! \remarks At the moment only X86 and X86_64 memory operands have a size - other memory operands can use bits
//! that represent size as an additional payload. This means that memory size is architecture specific and should
//! be accessed via \ref x86::Mem::size(). Sometimes when the user knows that the operand is either a register or
//! memory operand this function can be helpful as it avoids casting, but it only works when it targets X86 and X86_64.
ASMJIT_INLINE_NODEBUG constexpr uint32_t x86RmSize() const noexcept { return _signature.size(); }
//! \}
#if !defined(ASMJIT_NO_DEPRECATED)
ASMJIT_DEPRECATED("hasSize() is no longer portable - use x86RmSize() or x86::Mem::hasSize() instead, if your target is X86/X86_64")
ASMJIT_INLINE_NODEBUG constexpr bool hasSize() const noexcept { return x86RmSize() != 0u; }
ASMJIT_DEPRECATED("hasSize() is no longer portable - use x86RmSize() or x86::Mem::hasSize() instead, if your target is X86/X86_64")
ASMJIT_INLINE_NODEBUG constexpr bool hasSize(uint32_t s) const noexcept { return x86RmSize() == s; }
ASMJIT_DEPRECATED("size() is no longer portable - use x86RmSize() or x86::Mem::size() instead, if your target is X86/X86_64")
ASMJIT_INLINE_NODEBUG constexpr uint32_t size() const noexcept { return _signature.getField<Signature::kSizeMask>(); }
#endif
};
//! Base class representing an operand in AsmJit (default constructed version).
@ -951,8 +993,10 @@ public:
//! Tests whether the register is a general purpose register (any size).
ASMJIT_INLINE_NODEBUG constexpr bool isGp() const noexcept { return isGroup(RegGroup::kGp); }
//! Tests whether the register is a vector register.
//! Tests whether the register is a vector register of any size.
ASMJIT_INLINE_NODEBUG constexpr bool isVec() const noexcept { return isGroup(RegGroup::kVec); }
//! Tests whether the register is a mask register of any size.
ASMJIT_INLINE_NODEBUG constexpr bool isMask() const noexcept { return isGroup(RegGroup::kMask); }
using Operand_::isReg;
@ -1554,9 +1598,6 @@ public:
//! Resets the memory operand's INDEX register.
ASMJIT_INLINE_NODEBUG void resetIndex() noexcept { _setIndex(RegType::kNone, 0); }
//! Sets the memory operand size (in bytes).
ASMJIT_INLINE_NODEBUG void setSize(uint32_t size) noexcept { _signature.setField<Signature::kSizeMask>(size); }
//! Tests whether the memory operand has a 64-bit offset or absolute address.
//!
//! If this is true then `hasBase()` must always report false.
@ -1624,6 +1665,11 @@ public:
ASMJIT_INLINE_NODEBUG void resetOffsetLo32() noexcept { setOffsetLo32(0); }
//! \}
#if !defined(ASMJIT_NO_DEPRECATED)
ASMJIT_DEPRECATED("setSize() is no longer portable - use setX86RmSize() or x86::Mem::setSize() instead, if your target is X86/X86_64")
ASMJIT_INLINE_NODEBUG void setSize(uint32_t size) noexcept { _signature.setField<Signature::kSizeMask>(size); }
#endif
};
//! Type of the an immediate value.

14
deps/asmjit/src/asmjit/core/radefs_p.h vendored
View File

@ -67,7 +67,7 @@ public:
uint32_t registerCount = arch == Arch::kX86 ? 8 : 16;
_availableRegs[RegGroup::kGp] = Support::lsbMask<RegMask>(registerCount) & ~Support::bitMask(4u);
_availableRegs[RegGroup::kVec] = Support::lsbMask<RegMask>(registerCount);
_availableRegs[RegGroup::kExtraVirt2] = Support::lsbMask<RegMask>(8);
_availableRegs[RegGroup::kMask] = Support::lsbMask<RegMask>(8);
_availableRegs[RegGroup::kExtraVirt3] = Support::lsbMask<RegMask>(8);
return kErrorOk;
}
@ -75,7 +75,7 @@ public:
case Arch::kAArch64: {
_availableRegs[RegGroup::kGp] = 0xFFFFFFFFu & ~Support::bitMask(18, 31u);
_availableRegs[RegGroup::kVec] = 0xFFFFFFFFu;
_availableRegs[RegGroup::kExtraVirt2] = 0;
_availableRegs[RegGroup::kMask] = 0;
_availableRegs[RegGroup::kExtraVirt3] = 0;
return kErrorOk;
}
@ -559,7 +559,7 @@ public:
ASMJIT_FORCE_INLINE Error nonOverlappingUnionOf(ZoneAllocator* allocator, const RALiveSpans<T>& x, const RALiveSpans<T>& y, const DataType& yData) noexcept {
uint32_t finalSize = x.size() + y.size();
ASMJIT_PROPAGATE(_data.reserve(allocator, finalSize));
ASMJIT_PROPAGATE(_data.growingReserve(allocator, finalSize));
T* dstPtr = _data.data();
const T* xSpan = x.data();
@ -694,7 +694,7 @@ typedef RALiveSpans<LiveRegSpan> LiveRegSpans;
//! - LEA x{ W|Out}, [x{R|Use} + y{R|Out}] -> {x:R|W|Use|Out y:R|Use}
//!
//! It should be obvious from the example above how these flags get created. Each operand contains READ/WRITE
//! information, which is then merged to RATiedReg's flags. However, we also need to represent the possitility
//! information, which is then merged to RATiedReg's flags. However, we also need to represent the possibility
//! to view the operation as two independent operations - USE and OUT, because the register allocator first
//! allocates USE registers, and then assigns OUT registers independently of USE registers.
enum class RATiedFlags : uint32_t {
@ -767,6 +767,12 @@ enum class RATiedFlags : uint32_t {
// Instruction Flags (Never used by RATiedReg)
// -------------------------------------------
//! Instruction has been patched to address a memory location instead of a register.
//!
//! This is currently only possible on X86 or X86_64 targets. It informs rewriter to rewrite the instruction if
//! necessary.
kInst_RegToMemPatched = 0x40000000u,
//! Instruction is transformable to another instruction if necessary.
//!
//! This is flag that is only used by \ref RAInst to inform register allocator that the instruction has some

13
deps/asmjit/src/asmjit/core/ralocal.cpp vendored
View File

@ -137,9 +137,6 @@ Error RALocalAllocator::switchToAssignment(PhysToWorkMap* dstPhysToWorkMap, cons
dst.initMaps(dstPhysToWorkMap, _tmpWorkToPhysMap);
dst.assignWorkIdsFromPhysIds();
if (tryMode)
return kErrorOk;
for (RegGroup group : RegGroupVirtValues{}) {
// STEP 1
// ------
@ -597,10 +594,14 @@ Error RALocalAllocator::allocInst(InstNode* node) noexcept {
if (rmSize <= workReg->virtReg()->virtSize()) {
Operand& op = node->operands()[opIndex];
op = _pass->workRegAsMem(workReg);
op.as<BaseMem>().setSize(rmSize);
// NOTE: We cannot use `x86::Mem::setSize()` from here, so let's manipulate the signature directly.
op._signature.setSize(rmSize);
tiedReg->_useRewriteMask = 0;
tiedReg->markUseDone();
raInst->addFlags(RATiedFlags::kInst_RegToMemPatched);
usePending--;
rmAllocated = true;
@ -687,7 +688,7 @@ Error RALocalAllocator::allocInst(InstNode* node) noexcept {
// ------
//
// ALLOCATE / SHUFFLE all registers that we marked as `willUse` and weren't allocated yet. This is a bit
// complicated as the allocation is iterative. In some cases we have to wait before allocating a particual
// complicated as the allocation is iterative. In some cases we have to wait before allocating a particular
// physical register as it's still occupied by some other one, which we need to move before we can use it.
// In this case we skip it and allocate another some other instead (making it free for another iteration).
//
@ -836,7 +837,7 @@ Error RALocalAllocator::allocInst(InstNode* node) noexcept {
// STEP 9
// ------
//
// Vector registers can be cloberred partially by invoke - find if that's the case and clobber when necessary.
// Vector registers can be clobbered partially by invoke - find if that's the case and clobber when necessary.
if (node->isInvoke() && group == RegGroup::kVec) {
const InvokeNode* invokeNode = node->as<InvokeNode>();

32
deps/asmjit/src/asmjit/core/rapass.cpp vendored
View File

@ -1223,6 +1223,7 @@ ASMJIT_FAVOR_SPEED Error BaseRAPass::binPack(RegGroup group) noexcept {
uint32_t numWorkRegs = workRegs.size();
RegMask availableRegs = _availableRegs[group];
RegMask preservedRegs = func()->frame().preservedRegs(group);
// First try to pack everything that provides register-id hint as these are most likely function arguments and fixed
// (precolored) virtual registers.
@ -1354,18 +1355,30 @@ ASMJIT_FAVOR_SPEED Error BaseRAPass::binPack(RegGroup group) noexcept {
if (workReg->isAllocated())
continue;
RegMask physRegs = availableRegs;
if (physRegs & workReg->preferredMask())
physRegs &= workReg->preferredMask();
RegMask remainingPhysRegs = availableRegs;
if (remainingPhysRegs & workReg->preferredMask())
remainingPhysRegs &= workReg->preferredMask();
while (physRegs) {
RegMask preferredMask = physRegs;
uint32_t physId = Support::ctz(preferredMask);
RegMask physRegs = remainingPhysRegs & ~preservedRegs;
remainingPhysRegs &= preservedRegs;
for (;;) {
if (!physRegs) {
if (!remainingPhysRegs)
break;
physRegs = remainingPhysRegs;
remainingPhysRegs = 0;
}
uint32_t physId = Support::ctz(physRegs);
if (workReg->clobberSurvivalMask()) {
preferredMask &= workReg->clobberSurvivalMask();
if (preferredMask)
RegMask preferredMask = (physRegs | remainingPhysRegs) & workReg->clobberSurvivalMask();
if (preferredMask) {
if (preferredMask & ~remainingPhysRegs)
preferredMask &= ~remainingPhysRegs;
physId = Support::ctz(preferredMask);
}
}
LiveRegSpans& live = _globalLiveSpans[group][physId];
@ -1381,7 +1394,8 @@ ASMJIT_FAVOR_SPEED Error BaseRAPass::binPack(RegGroup group) noexcept {
if (ASMJIT_UNLIKELY(err != 0xFFFFFFFFu))
return err;
physRegs ^= Support::bitMask(physId);
physRegs &= ~Support::bitMask(physId);
remainingPhysRegs &= ~Support::bitMask(physId);
}
// Keep it in `workRegs` if it was not allocated.

2
deps/asmjit/src/asmjit/core/rapass_p.h vendored
View File

@ -335,6 +335,8 @@ public:
//! Clears instruction `flags` from this RAInst.
ASMJIT_INLINE_NODEBUG void clearFlags(RATiedFlags flags) noexcept { _flags &= ~flags; }
//! Tests whether one operand of this instruction has been patched from Reg to Mem.
ASMJIT_INLINE_NODEBUG bool isRegToMemPatched() const noexcept { return hasFlag(RATiedFlags::kInst_RegToMemPatched); }
//! Tests whether this instruction can be transformed to another instruction if necessary.
ASMJIT_INLINE_NODEBUG bool isTransformable() const noexcept { return hasFlag(RATiedFlags::kInst_IsTransformable); }

94
deps/asmjit/src/asmjit/core/string.cpp vendored
View File

@ -14,9 +14,51 @@ ASMJIT_BEGIN_NAMESPACE
static const char String_baseN[] = "0123456789ABCDEF";
constexpr size_t kMinAllocSize = 64;
constexpr size_t kMinAllocSize = 128;
constexpr size_t kMaxAllocSize = SIZE_MAX - Globals::kGrowThreshold;
// Based on ZoneVector_growCapacity().
//
// NOTE: The sizes here include null terminators - that way we can have aligned allocations that are power of 2s
// initially.
static ASMJIT_FORCE_INLINE size_t String_growCapacity(size_t byteSize, size_t minimumByteSize) noexcept {
static constexpr size_t kGrowThreshold = Globals::kGrowThreshold;
ASMJIT_ASSERT(minimumByteSize < kMaxAllocSize);
// This is more than exponential growth at the beginning.
if (byteSize < kMinAllocSize) {
byteSize = kMinAllocSize;
}
else if (byteSize < 512) {
byteSize = 512;
}
if (byteSize < minimumByteSize) {
// Exponential growth before we reach `kGrowThreshold`.
byteSize = Support::alignUpPowerOf2(minimumByteSize);
// Bail to `minimumByteSize` in case of overflow - most likely whatever that is happening afterwards would just fail.
if (byteSize < minimumByteSize) {
return minimumByteSize;
}
// Pretty much chunked growth advancing by `kGrowThreshold` after we exceed it.
if (byteSize > kGrowThreshold) {
// Align to kGrowThreshold.
size_t remainder = minimumByteSize % kGrowThreshold;
byteSize = minimumByteSize + remainder;
// Bail to `minimumByteSize` in case of overflow.
if (byteSize < minimumByteSize)
return minimumByteSize;
}
}
return Support::min<size_t>(byteSize, kMaxAllocSize);
}
// String - Clear & Reset
// ======================
@ -49,13 +91,13 @@ char* String::prepare(ModifyOp op, size_t size) noexcept {
size_t curCapacity;
if (isLargeOrExternal()) {
curData = this->_large.data;
curSize = this->_large.size;
curCapacity = this->_large.capacity;
curData = _large.data;
curSize = _large.size;
curCapacity = _large.capacity;
}
else {
curData = this->_small.data;
curSize = this->_small.type;
curData = _small.data;
curSize = _small.type;
curCapacity = kSSOCapacity;
}
@ -90,25 +132,20 @@ char* String::prepare(ModifyOp op, size_t size) noexcept {
}
else {
// Prevent arithmetic overflow.
if (ASMJIT_UNLIKELY(size >= kMaxAllocSize - curSize))
if (ASMJIT_UNLIKELY(size >= kMaxAllocSize - curSize - 1))
return nullptr;
size_t newSize = size + curSize;
size_t newSizePlusOne = newSize + 1;
if (newSizePlusOne > curCapacity) {
size_t newCapacity = Support::max<size_t>(curCapacity + 1, kMinAllocSize);
if (newSize > curCapacity) {
size_t newCapacityPlusOne = String_growCapacity(size + 1u, newSizePlusOne);
ASMJIT_ASSERT(newCapacityPlusOne >= newSizePlusOne);
if (newCapacity < newSizePlusOne && newCapacity < Globals::kGrowThreshold)
newCapacity = Support::alignUpPowerOf2(newCapacity);
if (newCapacity < newSizePlusOne)
newCapacity = Support::alignUp(newSizePlusOne, Globals::kGrowThreshold);
if (ASMJIT_UNLIKELY(newCapacity < newSizePlusOne))
if (ASMJIT_UNLIKELY(newCapacityPlusOne < newSizePlusOne))
return nullptr;
char* newData = static_cast<char*>(::malloc(newCapacity));
char* newData = static_cast<char*>(::malloc(newCapacityPlusOne));
if (ASMJIT_UNLIKELY(!newData))
return nullptr;
@ -119,7 +156,7 @@ char* String::prepare(ModifyOp op, size_t size) noexcept {
_large.type = kTypeLarge;
_large.size = newSize;
_large.capacity = newCapacity - 1;
_large.capacity = newCapacityPlusOne - 1;
_large.data = newData;
newData[newSize] = '\0';
@ -488,9 +525,28 @@ bool String::equals(const char* other, size_t size) const noexcept {
// ==============
#if defined(ASMJIT_TEST)
static void test_string_grow() noexcept {
String s;
size_t c = s.capacity();
INFO("Testing string grow strategy (SSO capacity: %zu)", c);
for (size_t i = 0; i < 1000000; i++) {
s.append('x');
if (s.capacity() != c) {
c = s.capacity();
INFO(" String reallocated to new capacity: %zu", c);
}
}
// We don't expect a 1 million character string to occupy 4MiB, for example. So verify that!
EXPECT_LT(c, size_t(4 * 1024 * 1024));
}
UNIT(core_string) {
String s;
INFO("Testing string functionality");
EXPECT_FALSE(s.isLargeOrExternal());
EXPECT_FALSE(s.isExternal());
@ -553,6 +609,8 @@ UNIT(core_string) {
EXPECT_TRUE(sTmp.isExternal());
EXPECT_EQ(sTmp.appendChars(' ', 1000), kErrorOk);
EXPECT_FALSE(sTmp.isExternal());
test_string_grow();
}
#endif

6
deps/asmjit/src/asmjit/core/support.h vendored
View File

@ -1615,10 +1615,10 @@ public:
ASMJIT_INLINE_NODEBUG bool operator>=(const ArrayReverseIterator& other) const noexcept { return _ptr >= other._ptr; }
ASMJIT_INLINE_NODEBUG ArrayReverseIterator& operator++() noexcept { _ptr--; return *this; }
ASMJIT_INLINE_NODEBUG ArrayReverseIterator& operator++(int) noexcept { ArrayReverseIterator prev(*this); _ptr--; return prev; }
ASMJIT_INLINE_NODEBUG ArrayReverseIterator& operator--() noexcept { _ptr++; return *this; }
ASMJIT_INLINE_NODEBUG ArrayReverseIterator& operator--(int) noexcept { ArrayReverseIterator prev(*this); _ptr++; return prev; }
ASMJIT_INLINE_NODEBUG ArrayReverseIterator operator++(int) noexcept { ArrayReverseIterator prev(*this); _ptr--; return prev; }
ASMJIT_INLINE_NODEBUG ArrayReverseIterator operator--(int) noexcept { ArrayReverseIterator prev(*this); _ptr++; return prev; }
template<typename Diff> ASMJIT_INLINE_NODEBUG ArrayReverseIterator operator+(const Diff& n) noexcept { return ArrayReverseIterator(_ptr -= n); }
template<typename Diff> ASMJIT_INLINE_NODEBUG ArrayReverseIterator operator-(const Diff& n) noexcept { return ArrayReverseIterator(_ptr += n); }

193
deps/asmjit/src/asmjit/core/virtmem.cpp vendored
View File

@ -76,8 +76,6 @@
#define MAP_ANONYMOUS MAP_ANON
#endif
#define ASMJIT_ANONYMOUS_MEMORY_USE_FD
// Android NDK doesn't provide `shm_open()` and `shm_unlink()`.
#if !defined(__BIONIC__) && !defined(ASMJIT_NO_SHM_OPEN)
#define ASMJIT_HAS_SHM_OPEN
@ -89,18 +87,60 @@
#define ASMJIT_VM_SHM_DETECT 1
#endif
#if defined(__APPLE__) && TARGET_OS_OSX && ASMJIT_ARCH_ARM >= 64
#define ASMJIT_HAS_PTHREAD_JIT_WRITE_PROTECT_NP
#if defined(__APPLE__) && TARGET_OS_OSX
#if ASMJIT_ARCH_X86 != 0
#define ASMJIT_ANONYMOUS_MEMORY_USE_MACH_VM_REMAP
#endif
#if ASMJIT_ARCH_ARM >= 64
#define ASMJIT_HAS_PTHREAD_JIT_WRITE_PROTECT_NP
#endif
#endif
#if defined(__APPLE__) && ASMJIT_ARCH_X86 == 0
#define ASMJIT_NO_DUAL_MAPPING
#endif
#if defined(__NetBSD__) && defined(MAP_REMAPDUP) && defined(PROT_MPROTECT)
#undef ASMJIT_ANONYMOUS_MEMORY_USE_FD
#define ASMJIT_ANONYMOUS_MEMORY_USE_REMAPDUP
#endif
#if !defined(ASMJIT_ANONYMOUS_MEMORY_USE_REMAPDUP) && \
!defined(ASMJIT_ANONYMOUS_MEMORY_USE_MACH_VM_REMAP) && \
!defined(ASMJIT_NO_DUAL_MAPPING)
#define ASMJIT_ANONYMOUS_MEMORY_USE_FD
#endif
#endif
#include <atomic>
#if defined(ASMJIT_ANONYMOUS_MEMORY_USE_MACH_VM_REMAP)
#include <mach/mach.h>
#include <mach/mach_time.h>
extern "C" {
#ifdef mig_external
mig_external
#else
extern
#endif
kern_return_t mach_vm_remap(
vm_map_t target_task,
mach_vm_address_t *target_address,
mach_vm_size_t size,
mach_vm_offset_t mask,
int flags,
vm_map_t src_task,
mach_vm_address_t src_address,
boolean_t copy,
vm_prot_t *cur_protection,
vm_prot_t *max_protection,
vm_inherit_t inheritance
);
} // {extern "C"}
#endif
ASMJIT_BEGIN_SUB_NAMESPACE(VirtMem)
// Virtual Memory Utilities
@ -757,8 +797,7 @@ static inline int mmMapJitFromMemoryFlags(MemoryFlags memoryFlags) noexcept {
}
static inline bool hasDualMappingSupport() noexcept {
#if defined(__APPLE__) && TARGET_OS_OSX && ASMJIT_ARCH_X86 == 0
// Apple platforms don't allow dual-mapping on non-x86 hardware.
#if defined(ASMJIT_NO_DUAL_MAPPING)
return false;
#else
return true;
@ -850,6 +889,7 @@ Error protect(void* p, size_t size, MemoryFlags memoryFlags) noexcept {
// Virtual Memory [Posix] - Dual Mapping
// =====================================
#if !defined(ASMJIT_NO_DUAL_MAPPING)
static Error unmapDualMapping(DualMapping* dm, size_t size) noexcept {
Error err1 = unmapMemory(dm->rx, size);
Error err2 = kErrorOk;
@ -865,6 +905,7 @@ static Error unmapDualMapping(DualMapping* dm, size_t size) noexcept {
dm->rw = nullptr;
return kErrorOk;
}
#endif // !ASMJIT_NO_DUAL_MAPPING
#if defined(ASMJIT_ANONYMOUS_MEMORY_USE_REMAPDUP)
static Error allocDualMappingUsingRemapdup(DualMapping* dmOut, size_t size, MemoryFlags memoryFlags) noexcept {
@ -897,16 +938,105 @@ static Error allocDualMappingUsingRemapdup(DualMapping* dmOut, size_t size, Memo
}
#endif
Error allocDualMapping(DualMapping* dm, size_t size, MemoryFlags memoryFlags) noexcept {
dm->rx = nullptr;
dm->rw = nullptr;
#if defined(ASMJIT_ANONYMOUS_MEMORY_USE_MACH_VM_REMAP)
static Error asmjitErrorFromKernResult(kern_return_t result) noexcept {
switch (result) {
case KERN_PROTECTION_FAILURE:
return DebugUtils::errored(kErrorProtectionFailure);
case KERN_NO_SPACE:
return DebugUtils::errored(kErrorOutOfMemory);
case KERN_INVALID_ARGUMENT:
return DebugUtils::errored(kErrorInvalidArgument);
default:
return DebugUtils::errored(kErrorInvalidState);
}
}
if (off_t(size) <= 0)
return DebugUtils::errored(size == 0 ? kErrorInvalidArgument : kErrorTooLarge);
static Error allocDualMappingUsingMachVmRemap(DualMapping* dmOut, size_t size, MemoryFlags memoryFlags) noexcept {
DualMapping dm {};
#if defined(ASMJIT_ANONYMOUS_MEMORY_USE_REMAPDUP)
return allocDualMappingUsingRemapdup(dm, size, memoryFlags);
#elif defined(ASMJIT_ANONYMOUS_MEMORY_USE_FD)
MemoryFlags mmapFlags = MemoryFlags::kAccessReadWrite | (memoryFlags & MemoryFlags::kMapShared);
ASMJIT_PROPAGATE(mapMemory(&dm.rx, size, mmapFlags));
vm_prot_t curProt;
vm_prot_t maxProt;
int rwProtectFlags = VM_PROT_READ | VM_PROT_WRITE;
int rxProtectFlags = VM_PROT_READ;
if (Support::test(memoryFlags, MemoryFlags::kAccessExecute))
rxProtectFlags |= VM_PROT_EXECUTE;
kern_return_t result {};
do {
vm_map_t task = mach_task_self();
mach_vm_address_t remappedAddr {};
#if defined(VM_FLAGS_RANDOM_ADDR)
int remapFlags = VM_FLAGS_ANYWHERE | VM_FLAGS_RANDOM_ADDR;
#else
int remapFlags = VM_FLAGS_ANYWHERE;
#endif
// Try to remap the existing memory into a different address.
result = mach_vm_remap(
task, // target_task
&remappedAddr, // target_address
size, // size
0, // mask
remapFlags, // flags
task, // src_task
(mach_vm_address_t)dm.rx, // src_address
false, // copy
&curProt, // cur_protection
&maxProt, // max_protection
VM_INHERIT_DEFAULT); // inheritance
if (result != KERN_SUCCESS)
break;
dm.rw = (void*)remappedAddr;
// Now, try to change permissions of both map regions into RW and RX. The vm_protect()
// API is used twice as we also want to set maximum permissions, so nobody would be
// allowed to change the RX region back to RW or RWX (if RWX is allowed).
uint32_t i;
for (i = 0; i < 2; i++) {
bool setMaximum = (i == 0);
result = vm_protect(
task, // target_task
(vm_address_t)dm.rx, // address
size, // size
setMaximum, // set_maximum
rxProtectFlags); // new_protection
if (result != KERN_SUCCESS)
break;
result = vm_protect(task, // target_task
(vm_address_t)dm.rw, // address
size, // size
setMaximum, // set_maximum
rwProtectFlags); // new_protection
if (result != KERN_SUCCESS)
break;
}
} while (0);
if (result != KERN_SUCCESS) {
unmapDualMapping(&dm, size);
return DebugUtils::errored(asmjitErrorFromKernResult(result));
}
*dmOut = dm;
return kErrorOk;
}
#endif // ASMJIT_ANONYMOUS_MEMORY_USE_MACH_VM_REMAP
#if defined(ASMJIT_ANONYMOUS_MEMORY_USE_FD)
static Error allocDualMappingUsingFile(DualMapping* dm, size_t size, MemoryFlags memoryFlags) noexcept {
bool preferTmpOverDevShm = Support::test(memoryFlags, MemoryFlags::kMappingPreferTmp);
if (!preferTmpOverDevShm) {
AnonymousMemoryStrategy strategy;
@ -932,13 +1062,39 @@ Error allocDualMapping(DualMapping* dm, size_t size, MemoryFlags memoryFlags) no
dm->rx = ptr[0];
dm->rw = ptr[1];
return kErrorOk;
}
#endif // ASMJIT_ANONYMOUS_MEMORY_USE_FD
Error allocDualMapping(DualMapping* dm, size_t size, MemoryFlags memoryFlags) noexcept {
dm->rx = nullptr;
dm->rw = nullptr;
#if defined(ASMJIT_NO_DUAL_MAPPING)
DebugUtils::unused(size, memoryFlags);
return DebugUtils::errored(kErrorFeatureNotEnabled);
#else
#error "[asmjit] VirtMem::allocDualMapping() doesn't have implementation for the target OS and compiler"
if (off_t(size) <= 0)
return DebugUtils::errored(size == 0 ? kErrorInvalidArgument : kErrorTooLarge);
#if defined(ASMJIT_ANONYMOUS_MEMORY_USE_REMAPDUP)
return allocDualMappingUsingRemapdup(dm, size, memoryFlags);
#elif defined(ASMJIT_ANONYMOUS_MEMORY_USE_MACH_VM_REMAP)
return allocDualMappingUsingMachVmRemap(dm, size, memoryFlags);
#elif defined(ASMJIT_ANONYMOUS_MEMORY_USE_FD)
return allocDualMappingUsingFile(dm, size, memoryFlags);
#else
#error "[asmjit] VirtMem::allocDualMapping() doesn't have implementation for the target OS or architecture"
#endif
#endif // ASMJIT_NO_DUAL_MAPPING
}
Error releaseDualMapping(DualMapping* dm, size_t size) noexcept {
#if defined(ASMJIT_NO_DUAL_MAPPING)
DebugUtils::unused(dm, size);
return DebugUtils::errored(kErrorFeatureNotEnabled);
#else
return unmapDualMapping(dm, size);
#endif // ASMJIT_NO_DUAL_MAPPING
}
#endif
@ -1039,8 +1195,9 @@ UNIT(virt_mem) {
INFO("VirtMem::hardenedRuntimeInfo():");
INFO(" flags:");
INFO(" kEnabled: %s", Support::test(hardenedFlags, VirtMem::HardenedRuntimeFlags::kEnabled) ? "true" : "false");
INFO(" kMapJit: %s", Support::test(hardenedFlags, VirtMem::HardenedRuntimeFlags::kMapJit) ? "true" : "false");
INFO(" kEnabled: %s" , Support::test(hardenedFlags, VirtMem::HardenedRuntimeFlags::kEnabled ) ? "true" : "false");
INFO(" kMapJit: %s" , Support::test(hardenedFlags, VirtMem::HardenedRuntimeFlags::kMapJit ) ? "true" : "false");
INFO(" kDualMapping: %s", Support::test(hardenedFlags, VirtMem::HardenedRuntimeFlags::kDualMapping) ? "true" : "false");
}
ASMJIT_END_NAMESPACE

16
deps/asmjit/src/asmjit/core/virtmem.h vendored
View File

@ -10,6 +10,7 @@
#ifndef ASMJIT_NO_JIT
#include "../core/globals.h"
#include "../core/support.h"
ASMJIT_BEGIN_NAMESPACE
@ -218,15 +219,28 @@ enum class HardenedRuntimeFlags : uint32_t {
//! Read+Write+Execute can only be allocated with MAP_JIT flag (Apple specific, only available on Apple platforms).
kMapJit = 0x00000002u,
//! Read+Write+Executa can be allocated with dual mapping approach (one region with RW and the other with RX).
//! Read+Write+Execute can be allocated with dual mapping approach (one region with RW and the other with RX).
kDualMapping = 0x00000004u
};
ASMJIT_DEFINE_ENUM_FLAGS(HardenedRuntimeFlags)
//! Hardened runtime information.
struct HardenedRuntimeInfo {
//! \name Members
//! \{
//! Hardened runtime flags.
HardenedRuntimeFlags flags;
//! \}
//! \name Accessors
//! \{
//! Tests whether the hardened runtime `flag` is set.
ASMJIT_INLINE_NODEBUG bool hasFlag(HardenedRuntimeFlags flag) const noexcept { return Support::test(flags, flag); }
//! \}
};
//! Returns runtime features provided by the OS.

4
deps/asmjit/src/asmjit/core/zonestack.h vendored
View File

@ -62,7 +62,9 @@ public:
ASMJIT_INLINE_NODEBUG void setEnd(T* end) noexcept { _end = (void*)end; }
template<typename T>
ASMJIT_INLINE_NODEBUG T* data() const noexcept { return (T*)((uint8_t*)(this) + sizeof(Block)); }
ASMJIT_INLINE_NODEBUG const T* data() const noexcept { return (const T*)((const uint8_t*)(this) + sizeof(Block)); }
template<typename T>
ASMJIT_INLINE_NODEBUG T* data() noexcept { return (T*)((uint8_t*)(this) + sizeof(Block)); }
template<typename T>
ASMJIT_INLINE_NODEBUG bool canPrepend() const noexcept { return _start > data<void>(); }

118
deps/asmjit/src/asmjit/core/zonevector.cpp vendored
View File

@ -13,8 +13,63 @@ ASMJIT_BEGIN_NAMESPACE
// ZoneVectorBase - Helpers
// ========================
// ZoneVector is used as an array to hold short-lived data structures used during code generation. The growing
// strategy is simple - use small capacity at the beginning (very good for ZoneAllocator) and then grow quicker
// to prevent successive reallocations.
static ASMJIT_FORCE_INLINE uint32_t ZoneVector_growCapacity(uint32_t current, uint32_t growMinimum, uint32_t sizeOfT) noexcept {
static constexpr size_t kGrowThreshold = Globals::kGrowThreshold;
size_t byteSize = size_t(current) * sizeOfT;
size_t minimumByteSize = size_t(growMinimum) * sizeOfT;
// This is more than exponential growth at the beginning.
if (byteSize < 32) {
byteSize = 32;
}
else if (byteSize < 128) {
byteSize = 128;
}
else if (byteSize < 512) {
byteSize = 512;
}
if (byteSize < minimumByteSize) {
// Exponential growth before we reach `kGrowThreshold`.
byteSize = Support::alignUpPowerOf2(minimumByteSize);
// Bail to `growMinimum` in case of overflow - most likely whatever that is happening afterwards would just fail.
if (byteSize < minimumByteSize) {
return growMinimum;
}
// Pretty much chunked growth advancing by `kGrowThreshold` after we exceed it.
// This should not be a common case, so we don't really have to optimize for it.
if (byteSize > kGrowThreshold) {
// Align to kGrowThreshold.
size_t remainder = minimumByteSize % kGrowThreshold;
byteSize = minimumByteSize + remainder;
// Bail to `growMinimum` in case of overflow - should never happen as it's unlikely we would hit this on a 32-bit
// machine (consecutive near 4GiB allocation is impossible, and this should never happen on 64-bit machine as we
// use 32-bit size & capacity, so overflow of 64 bit integer is not possible. Added just as an extreme measure.
if (byteSize < minimumByteSize)
return growMinimum;
}
}
size_t n = byteSize / sizeOfT;
return uint32_t(Support::min<size_t>(n, 0xFFFFFFFFu));
}
static ASMJIT_FORCE_INLINE bool ZoneVector_byteSizeIsSafe(size_t nBytes, uint32_t n) noexcept {
if (sizeof(uint32_t) < sizeof(size_t))
return true; // there is no problem when running on a 64-bit machine.
else
return nBytes >= size_t(n);
};
Error ZoneVectorBase::_grow(ZoneAllocator* allocator, uint32_t sizeOfT, uint32_t n) noexcept {
uint32_t threshold = Globals::kGrowThreshold / sizeOfT;
uint32_t capacity = _capacity;
uint32_t after = _size;
@ -25,29 +80,7 @@ Error ZoneVectorBase::_grow(ZoneAllocator* allocator, uint32_t sizeOfT, uint32_t
if (capacity >= after)
return kErrorOk;
// ZoneVector is used as an array to hold short-lived data structures used
// during code generation. The growing strategy is simple - use small capacity
// at the beginning (very good for ZoneAllocator) and then grow quicker to
// prevent successive reallocations.
if (capacity < 4)
capacity = 4;
else if (capacity < 8)
capacity = 8;
else if (capacity < 16)
capacity = 16;
else if (capacity < 64)
capacity = 64;
else if (capacity < 256)
capacity = 256;
while (capacity < after) {
if (capacity < threshold)
capacity *= 2;
else
capacity += threshold;
}
return _reserve(allocator, sizeOfT, capacity);
return _reserve(allocator, sizeOfT, ZoneVector_growCapacity(capacity, after, sizeOfT));
}
Error ZoneVectorBase::_reserve(ZoneAllocator* allocator, uint32_t sizeOfT, uint32_t n) noexcept {
@ -55,8 +88,8 @@ Error ZoneVectorBase::_reserve(ZoneAllocator* allocator, uint32_t sizeOfT, uint3
if (oldCapacity >= n)
return kErrorOk;
uint32_t nBytes = n * sizeOfT;
if (ASMJIT_UNLIKELY(nBytes < n))
size_t nBytes = size_t(n) * sizeOfT;
if (ASMJIT_UNLIKELY(!ZoneVector_byteSizeIsSafe(nBytes, n)))
return DebugUtils::errored(kErrorOutOfMemory);
size_t allocatedBytes;
@ -65,19 +98,28 @@ Error ZoneVectorBase::_reserve(ZoneAllocator* allocator, uint32_t sizeOfT, uint3
if (ASMJIT_UNLIKELY(!newData))
return DebugUtils::errored(kErrorOutOfMemory);
uint32_t newCapacity = uint32_t(allocatedBytes / sizeOfT);
ASMJIT_ASSERT(newCapacity >= n);
void* oldData = _data;
if (oldData && _size) {
memcpy(newData, oldData, size_t(_size) * sizeOfT);
allocator->release(oldData, size_t(oldCapacity) * sizeOfT);
}
_capacity = uint32_t(allocatedBytes / sizeOfT);
ASMJIT_ASSERT(_capacity >= n);
_data = newData;
_capacity = newCapacity;
return kErrorOk;
}
Error ZoneVectorBase::_growingReserve(ZoneAllocator* allocator, uint32_t sizeOfT, uint32_t n) noexcept {
uint32_t capacity = _capacity;
if (capacity >= n)
return kErrorOk;
return _reserve(allocator, sizeOfT, ZoneVector_growCapacity(capacity, n, sizeOfT));
}
Error ZoneVectorBase::_resize(ZoneAllocator* allocator, uint32_t sizeOfT, uint32_t n) noexcept {
uint32_t size = _size;
@ -266,6 +308,8 @@ Error ZoneBitVector::_append(ZoneAllocator* allocator, bool value) noexcept {
#if defined(ASMJIT_TEST)
template<typename T>
static void test_zone_vector(ZoneAllocator* allocator, const char* typeName) {
constexpr uint32_t kMiB = 1024 * 1024;
int i;
int kMax = 100000;
@ -301,12 +345,22 @@ static void test_zone_vector(ZoneAllocator* allocator, const char* typeName) {
int64_t fsum = 0;
int64_t rsum = 0;
for (const T& item : vec) { fsum += item; }
for (auto it = vec.rbegin(); it != vec.rend(); ++it) { rsum += *it; }
for (const T& item : vec) {
fsum += item;
}
for (auto it = vec.rbegin(); it != vec.rend(); ++it) {
rsum += *it;
}
EXPECT_EQ(fsum, rsum);
vec.release(allocator);
INFO("ZoneBitVector::growingReserve()");
for (uint32_t j = 0; j < 40 / sizeof(T); j += 8) {
EXPECT_EQ(vec.growingReserve(allocator, j * kMiB), kErrorOk);
EXPECT_GE(vec.capacity(), j * kMiB);
}
}
static void test_zone_bitvector(ZoneAllocator* allocator) {

17
deps/asmjit/src/asmjit/core/zonevector.h vendored
View File

@ -58,6 +58,7 @@ protected:
ASMJIT_API Error _grow(ZoneAllocator* allocator, uint32_t sizeOfT, uint32_t n) noexcept;
ASMJIT_API Error _resize(ZoneAllocator* allocator, uint32_t sizeOfT, uint32_t n) noexcept;
ASMJIT_API Error _reserve(ZoneAllocator* allocator, uint32_t sizeOfT, uint32_t n) noexcept;
ASMJIT_API Error _growingReserve(ZoneAllocator* allocator, uint32_t sizeOfT, uint32_t n) noexcept;
inline void _swap(ZoneVectorBase& other) noexcept {
std::swap(_data, other._data);
@ -414,7 +415,21 @@ public:
//! Reallocates the internal array to fit at least `n` items.
inline Error reserve(ZoneAllocator* allocator, uint32_t n) noexcept {
return n > _capacity ? ZoneVectorBase::_reserve(allocator, sizeof(T), n) : Error(kErrorOk);
if (ASMJIT_UNLIKELY(n > _capacity))
return ZoneVectorBase::_reserve(allocator, sizeof(T), n);
else
return Error(kErrorOk);
}
//! Reallocates the internal array to fit at least `n` items with growing semantics.
//!
//! If the vector is smaller than `n` the same growing calculations will be used as if N items were appended
//! to an empty vector, which means reserving additional space for more append operations that could follow.
inline Error growingReserve(ZoneAllocator* allocator, uint32_t n) noexcept {
if (ASMJIT_UNLIKELY(n > _capacity))
return ZoneVectorBase::_growingReserve(allocator, sizeof(T), n);
else
return Error(kErrorOk);
}
inline Error willGrow(ZoneAllocator* allocator, uint32_t n = 1) noexcept {

56
deps/asmjit/src/asmjit/x86/x86assembler.cpp vendored
View File

@ -345,6 +345,10 @@ static ASMJIT_FORCE_INLINE uint32_t x86AltOpcodeOf(const InstDB::InstInfo* info)
return InstDB::_altOpcodeTable[info->_altOpcodeIndex];
}
static ASMJIT_FORCE_INLINE bool x86IsMmxOrXmm(const Reg& reg) noexcept {
return reg.type() == RegType::kX86_Mm || reg.type() == RegType::kX86_Xmm;
}
// x86::Assembler - X86BufferWriter
// ================================
@ -2572,37 +2576,41 @@ CaseFpuArith_Mem:
case InstDB::kEncodingExtMovd:
CaseExtMovd:
opReg = o0.id();
opcode.add66hIf(Reg::isXmm(o0));
if (x86IsMmxOrXmm(o0.as<Reg>())) {
opReg = o0.id();
opcode.add66hIf(Reg::isXmm(o0));
// MM/XMM <- Gp
if (isign3 == ENC_OPS2(Reg, Reg) && Reg::isGp(o1)) {
rbReg = o1.id();
goto EmitX86R;
}
// MM/XMM <- Gp
if (isign3 == ENC_OPS2(Reg, Reg) && Reg::isGp(o1)) {
rbReg = o1.id();
goto EmitX86R;
}
// MM/XMM <- Mem
if (isign3 == ENC_OPS2(Reg, Mem)) {
rmRel = &o1;
goto EmitX86M;
// MM/XMM <- Mem
if (isign3 == ENC_OPS2(Reg, Mem)) {
rmRel = &o1;
goto EmitX86M;
}
}
// The following instructions use the secondary opcode.
opcode &= Opcode::kW;
opcode |= x86AltOpcodeOf(instInfo);
opReg = o1.id();
opcode.add66hIf(Reg::isXmm(o1));
if (x86IsMmxOrXmm(o1.as<Reg>())) {
opcode &= Opcode::kW;
opcode |= x86AltOpcodeOf(instInfo);
opReg = o1.id();
opcode.add66hIf(Reg::isXmm(o1));
// GP <- MM/XMM
if (isign3 == ENC_OPS2(Reg, Reg) && Reg::isGp(o0)) {
rbReg = o0.id();
goto EmitX86R;
}
// GP <- MM/XMM
if (isign3 == ENC_OPS2(Reg, Reg) && Reg::isGp(o0)) {
rbReg = o0.id();
goto EmitX86R;
}
// Mem <- MM/XMM
if (isign3 == ENC_OPS2(Mem, Reg)) {
rmRel = &o0;
goto EmitX86M;
// Mem <- MM/XMM
if (isign3 == ENC_OPS2(Mem, Reg)) {
rmRel = &o0;
goto EmitX86M;
}
}
break;

2
deps/asmjit/src/asmjit/x86/x86compiler.h vendored
View File

@ -542,7 +542,7 @@ public:
template<typename RegT>
ASMJIT_INLINE_NODEBUG RegT newSimilarReg(const RegT& ref) {
RegT reg(Globals::NoInit);
_newReg(reg, ref);
_newReg(&reg, ref);
return reg;
}

32
deps/asmjit/src/asmjit/x86/x86emithelper.cpp vendored
View File

@ -407,25 +407,29 @@ Error EmitHelper::emitRegSwap(
// x86::EmitHelper - Emit Prolog & Epilog
// ======================================
static inline void X86Internal_setupSaveRestoreInfo(RegGroup group, const FuncFrame& frame, Reg& xReg, uint32_t& xInst, uint32_t& xSize) noexcept {
static inline Error X86Internal_setupSaveRestoreInfo(RegGroup group, const FuncFrame& frame, Reg& xReg, uint32_t& xInst, uint32_t& xSize) noexcept {
switch (group) {
case RegGroup::kVec:
xReg = xmm(0);
xInst = getXmmMovInst(frame);
xSize = xReg.size();
break;
return kErrorOk;
case RegGroup::kX86_K:
xReg = k(0);
xInst = Inst::kIdKmovq;
xSize = xReg.size();
break;
return kErrorOk;
case RegGroup::kX86_MM:
xReg = mm(0);
xInst = Inst::kIdMovq;
xSize = xReg.size();
break;
return kErrorOk;
default:
break;
// This would be a bug in AsmJit if hit.
return DebugUtils::errored(kErrorInvalidState);
}
}
@ -492,16 +496,15 @@ ASMJIT_FAVOR_SIZE Error EmitHelper::emitProlog(const FuncFrame& frame) {
// Emit 'movxxx [zsp + X], {[x|y|z]mm, k}'.
{
Reg xReg;
Mem xBase = ptr(zsp, int32_t(frame.extraRegSaveOffset()));
uint32_t xInst;
uint32_t xSize;
for (RegGroup group : Support::EnumValues<RegGroup, RegGroup(1), RegGroup::kMaxVirt>{}) {
Support::BitWordIterator<RegMask> it(frame.savedRegs(group));
if (it.hasNext()) {
X86Internal_setupSaveRestoreInfo(group, frame, xReg, xInst, xSize);
Reg xReg;
uint32_t xInst = 0;
uint32_t xSize = 0;
ASMJIT_PROPAGATE(X86Internal_setupSaveRestoreInfo(group, frame, xReg, xInst, xSize));
do {
xReg.setId(it.next());
ASMJIT_PROPAGATE(emitter->emit(xInst, xBase, xReg));
@ -533,16 +536,15 @@ ASMJIT_FAVOR_SIZE Error EmitHelper::emitEpilog(const FuncFrame& frame) {
// Emit 'movxxx {[x|y|z]mm, k}, [zsp + X]'.
{
Reg xReg;
Mem xBase = ptr(zsp, int32_t(frame.extraRegSaveOffset()));
uint32_t xInst;
uint32_t xSize;
for (RegGroup group : Support::EnumValues<RegGroup, RegGroup(1), RegGroup::kMaxVirt>{}) {
Support::BitWordIterator<RegMask> it(frame.savedRegs(group));
if (it.hasNext()) {
X86Internal_setupSaveRestoreInfo(group, frame, xReg, xInst, xSize);
Reg xReg;
uint32_t xInst;
uint32_t xSize;
ASMJIT_PROPAGATE(X86Internal_setupSaveRestoreInfo(group, frame, xReg, xInst, xSize));
do {
xReg.setId(it.next());
ASMJIT_PROPAGATE(emitter->emit(xInst, xReg, xBase));

8
deps/asmjit/src/asmjit/x86/x86emitter.h vendored
View File

@ -147,8 +147,10 @@ struct EmitterExplicitT {
//! \name Native Registers
//! \{
//! Returns either GPD or GPQ register of the given `id` depending on the emitter's architecture.
//! Returns either 32-bit or 64-bit GP register of the given `id` depending on the emitter's architecture.
inline Gp gpz(uint32_t id) const noexcept { return Gp(_emitter()->_gpSignature, id); }
//! Clones the given `reg` to either 32-bit or 64-bit GP register depending on the emitter's architecture.
inline Gp gpz(const Gp& reg) const noexcept { return Gp(_emitter()->_gpSignature, reg.id()); }
inline Gp zax() const noexcept { return Gp(_emitter()->_gpSignature, Gp::kIdAx); }
inline Gp zcx() const noexcept { return Gp(_emitter()->_gpSignature, Gp::kIdCx); }
@ -2827,7 +2829,7 @@ public:
ASMJIT_INST_3x(vpand, Vpand, Vec, Vec, Mem) // AVX+
ASMJIT_INST_3x(vpandd, Vpandd, Vec, Vec, Vec) // AVX512_F{kz|b32}
ASMJIT_INST_3x(vpandd, Vpandd, Vec, Vec, Mem) // AVX512_F{kz|b32}
ASMJIT_INST_3x(vpandn, Vpandn, Vec, Vec, Vec) // AV+
ASMJIT_INST_3x(vpandn, Vpandn, Vec, Vec, Vec) // AVX+
ASMJIT_INST_3x(vpandn, Vpandn, Vec, Vec, Mem) // AVX+
ASMJIT_INST_3x(vpandnd, Vpandnd, Vec, Vec, Vec) // AVX512_F{kz|b32}
ASMJIT_INST_3x(vpandnd, Vpandnd, Vec, Vec, Mem) // AVX512_F{kz|b32}
@ -3186,7 +3188,7 @@ public:
ASMJIT_INST_2x(vpopcntq, Vpopcntq, Vec, Mem) // AVX512_VPOPCNTDQ{kz|b64}
ASMJIT_INST_2x(vpopcntw, Vpopcntw, Vec, Vec) // AVX512_BITALG{kz|b32}
ASMJIT_INST_2x(vpopcntw, Vpopcntw, Vec, Mem) // AVX512_BITALG{kz|b32}
ASMJIT_INST_3x(vpor, Vpor, Vec, Vec, Vec) // AV+
ASMJIT_INST_3x(vpor, Vpor, Vec, Vec, Vec) // AVX+
ASMJIT_INST_3x(vpor, Vpor, Vec, Vec, Mem) // AVX+
ASMJIT_INST_3x(vpord, Vpord, Vec, Vec, Vec) // AVX512_F{kz|b32}
ASMJIT_INST_3x(vpord, Vpord, Vec, Vec, Mem) // AVX512_F{kz|b32}

4
deps/asmjit/src/asmjit/x86/x86func.cpp vendored
View File

@ -14,7 +14,7 @@ ASMJIT_BEGIN_SUB_NAMESPACE(x86)
namespace FuncInternal {
static inline bool shouldThreatAsCDeclIn64BitMode(CallConvId ccId) noexcept {
static inline bool shouldTreatAsCDeclIn64BitMode(CallConvId ccId) noexcept {
return ccId == CallConvId::kCDecl ||
ccId == CallConvId::kStdCall ||
ccId == CallConvId::kThisCall ||
@ -143,7 +143,7 @@ ASMJIT_FAVOR_SIZE Error initCallConv(CallConv& cc, CallConvId ccId, const Enviro
// Preprocess the calling convention into a common id as many conventions are normally ignored even by C/C++
// compilers and treated as `__cdecl`.
if (shouldThreatAsCDeclIn64BitMode(ccId))
if (shouldTreatAsCDeclIn64BitMode(ccId))
ccId = winABI ? CallConvId::kX64Windows : CallConvId::kX64SystemV;
switch (ccId) {

26
deps/asmjit/src/asmjit/x86/x86globals.h vendored
View File

@ -53,20 +53,23 @@ enum class CondCode : uint8_t {
kNLE = 0x0Fu, //!< ZF==0 & SF==OF (signed > )
kZero = kZ, //!< Zero flag.
kNotZero = kNZ, //!< Non-zero flag.
kSign = kS, //!< Sign flag.
kNotSign = kNS, //!< No sign flag.
kNegative = kS, //!< Sign flag.
kPositive = kNS, //!< No sign flag.
kOverflow = kO, //!< Overflow (signed).
kNotOverflow = kNO, //!< Not overflow (signed).
kNotZero = kNZ, //!< Not zero.
kEqual = kE, //!< `a == b` (equal).
kNotEqual = kNE, //!< `a != b` (not equal).
kCarry = kC, //!< Carry flag.
kNotCarry = kNC, //!< Not carry.
kSign = kS, //!< Sign flag.
kNotSign = kNS, //!< Not sign.
kNegative = kS, //!< Sign flag.
kPositive = kNS, //!< Not sign.
kOverflow = kO, //!< Overflow (signed).
kNotOverflow = kNO, //!< Not overflow (signed).
kSignedLT = kL, //!< `a < b` (signed).
kSignedLE = kLE, //!< `a <= b` (signed).
kSignedGT = kG, //!< `a > b` (signed).
@ -77,6 +80,9 @@ enum class CondCode : uint8_t {
kUnsignedGT = kA, //!< `a > b` (unsigned).
kUnsignedGE = kAE, //!< `a >= b` (unsigned).
kBTZero = kNC, //!< Tested bit is zero.
kBTNotZero = kC, //!< Tested bit is non-zero.
kParityEven = kP, //!< Even parity flag.
kParityOdd = kPO, //!< Odd parity flag.

9
deps/asmjit/src/asmjit/x86/x86instapi.cpp vendored
View File

@ -895,8 +895,10 @@ Error queryRWInfo(Arch arch, const BaseInst& inst, const Operand_* operands, siz
case Inst::kIdVpternlogq: {
if (opCount == 4 && operands[3].isImm()) {
uint32_t predicate = operands[3].as<Imm>().valueAs<uint8_t>();
if ((predicate >> 4) == (predicate & 0xF)) {
out->_operands[0].clearOpFlags(OpRWFlags::kRead);
out->_operands[0].setReadByteMask(0);
}
}
break;
@ -1315,6 +1317,10 @@ Error queryRWInfo(Arch arch, const BaseInst& inst, const Operand_* operands, siz
out->_operands[0].reset(W, size0);
out->_operands[1].reset(R | MibRead, size1);
if (BaseReg::isVec(operands[0]))
rwZeroExtendAvxVec(out->_operands[0], operands[0].as<Vec>());
return kErrorOk;
}
@ -1366,6 +1372,9 @@ Error queryRWInfo(Arch arch, const BaseInst& inst, const Operand_* operands, siz
out->_operands[0].reset(W, size0);
out->_operands[1].reset(R, size1);
if (BaseReg::isVec(operands[0]))
rwZeroExtendAvxVec(out->_operands[0], operands[0].as<Vec>());
if (operands[0].isReg() && operands[1].isReg()) {
if (instRmInfo.rmOpsMask & 0x1) {
out->_operands[0].addOpFlags(RegM);

1383
deps/asmjit/src/asmjit/x86/x86instdb.cpp vendored
View File

File diff suppressed because it is too large Load Diff

31
deps/asmjit/src/asmjit/x86/x86operand.h vendored
View File

@ -88,12 +88,26 @@ public:
ASMJIT_INLINE_NODEBUG constexpr bool isGpd() const noexcept { return hasBaseSignature(RegTraits<RegType::kX86_Gpd>::kSignature); }
//! Tests whether the register is a GPQ register (64-bit).
ASMJIT_INLINE_NODEBUG constexpr bool isGpq() const noexcept { return hasBaseSignature(RegTraits<RegType::kX86_Gpq>::kSignature); }
//! Tests whether the register is a 32-bit general purpose register, alias of \ref isGpd().
ASMJIT_INLINE_NODEBUG constexpr bool isGp32() const noexcept { return hasBaseSignature(RegTraits<RegType::kX86_Gpd>::kSignature); }
//! Tests whether the register is a 64-bit general purpose register, alias of \ref isGpq()
ASMJIT_INLINE_NODEBUG constexpr bool isGp64() const noexcept { return hasBaseSignature(RegTraits<RegType::kX86_Gpq>::kSignature); }
//! Tests whether the register is an XMM register (128-bit).
ASMJIT_INLINE_NODEBUG constexpr bool isXmm() const noexcept { return hasBaseSignature(RegTraits<RegType::kX86_Xmm>::kSignature); }
//! Tests whether the register is a YMM register (256-bit).
ASMJIT_INLINE_NODEBUG constexpr bool isYmm() const noexcept { return hasBaseSignature(RegTraits<RegType::kX86_Ymm>::kSignature); }
//! Tests whether the register is a ZMM register (512-bit).
ASMJIT_INLINE_NODEBUG constexpr bool isZmm() const noexcept { return hasBaseSignature(RegTraits<RegType::kX86_Zmm>::kSignature); }
//! Tests whether the register is a 128-bit vector register, alias of \ref isXmm().
ASMJIT_INLINE_NODEBUG constexpr bool isVec128() const noexcept { return hasBaseSignature(RegTraits<RegType::kX86_Xmm>::kSignature); }
//! Tests whether the register is a 256-bit vector register, alias of \ref isYmm().
ASMJIT_INLINE_NODEBUG constexpr bool isVec256() const noexcept { return hasBaseSignature(RegTraits<RegType::kX86_Ymm>::kSignature); }
//! Tests whether the register is a 512-bit vector register, alias of \ref isZmm().
ASMJIT_INLINE_NODEBUG constexpr bool isVec512() const noexcept { return hasBaseSignature(RegTraits<RegType::kX86_Zmm>::kSignature); }
//! Tests whether the register is an MMX register (64-bit).
ASMJIT_INLINE_NODEBUG constexpr bool isMm() const noexcept { return hasBaseSignature(RegTraits<RegType::kX86_Mm>::kSignature); }
//! Tests whether the register is a K register (64-bit).
@ -242,11 +256,18 @@ class Vec : public Reg {
//! Casts this register to XMM (clone).
ASMJIT_INLINE_NODEBUG Xmm xmm() const noexcept;
//! Casts this register to YMM.
//! Casts this register to YMM (clone).
ASMJIT_INLINE_NODEBUG Ymm ymm() const noexcept;
//! Casts this register to ZMM.
//! Casts this register to ZMM (clone).
ASMJIT_INLINE_NODEBUG Zmm zmm() const noexcept;
//! Casts this register to XMM (clone).
ASMJIT_INLINE_NODEBUG Vec v128() const noexcept;
//! Casts this register to YMM (clone).
ASMJIT_INLINE_NODEBUG Vec v256() const noexcept;
//! Casts this register to ZMM (clone).
ASMJIT_INLINE_NODEBUG Vec v512() const noexcept;
//! Casts this register to a register that has half the size (or XMM if it's already XMM).
ASMJIT_INLINE_NODEBUG Vec half() const noexcept {
return Vec(type() == RegType::kX86_Zmm ? signatureOfT<RegType::kX86_Ymm>() : signatureOfT<RegType::kX86_Xmm>(), id());
@ -344,6 +365,9 @@ ASMJIT_INLINE_NODEBUG Gpq Gp::r64() const noexcept { return Gpq(id()); }
ASMJIT_INLINE_NODEBUG Xmm Vec::xmm() const noexcept { return Xmm(id()); }
ASMJIT_INLINE_NODEBUG Ymm Vec::ymm() const noexcept { return Ymm(id()); }
ASMJIT_INLINE_NODEBUG Zmm Vec::zmm() const noexcept { return Zmm(id()); }
ASMJIT_INLINE_NODEBUG Vec Vec::v128() const noexcept { return Xmm(id()); }
ASMJIT_INLINE_NODEBUG Vec Vec::v256() const noexcept { return Ymm(id()); }
ASMJIT_INLINE_NODEBUG Vec Vec::v512() const noexcept { return Zmm(id()); }
//! \endcond
//! \namespace asmjit::x86::regs
@ -847,6 +871,9 @@ public:
//! distinguish between 8-bit, 16-bit, 32-bit, and 64-bit increments.
ASMJIT_INLINE_NODEBUG constexpr uint32_t size() const noexcept { return _signature.getField<Signature::kSizeMask>(); }
//! Sets the memory operand size (in bytes).
ASMJIT_INLINE_NODEBUG void setSize(uint32_t size) noexcept { _signature.setField<Signature::kSizeMask>(size); }
//! \}
//! \name Address Type

62
deps/asmjit/src/asmjit/x86/x86rapass.cpp vendored
View File

@ -477,6 +477,20 @@ Error RACFGBuilder::onInst(InstNode* inst, InstControlFlow& cf, RAInstBuilder& i
}
}
}
else if (opCount == 4 && inst->op(3).isImm()) {
const Imm& imm = inst->op(3).as<Imm>();
switch (inst->id()) {
case Inst::kIdVpternlogd:
case Inst::kIdVpternlogq: {
uint32_t predicate = uint32_t(imm.value() & 0xFFu);
if (predicate == 0x00u || predicate == 0xFFu) {
ib[0]->makeWriteOnly();
}
break;
}
}
}
switch (sameRegHint) {
case InstSameRegHint::kNone:
@ -1309,6 +1323,54 @@ ASMJIT_FAVOR_SPEED Error X86RAPass::_rewrite(BaseNode* first, BaseNode* stop) no
}
}
// If one operand was rewritten from Reg to Mem, we have to ensure that we are using the correct instruction.
if (raInst->isRegToMemPatched()) {
switch (inst->id()) {
case Inst::kIdKmovb: {
if (operands[0].isGp() && operands[1].isMem()) {
// Transform from [V]MOVD to MOV.
operands[1].as<Mem>().setSize(1);
inst->setId(Inst::kIdMovzx);
}
break;
}
case Inst::kIdVmovw: {
if (operands[0].isGp() && operands[1].isMem()) {
// Transform from [V]MOVD to MOV.
operands[1].as<Mem>().setSize(2);
inst->setId(Inst::kIdMovzx);
}
break;
}
case Inst::kIdMovd:
case Inst::kIdVmovd:
case Inst::kIdKmovd: {
if (operands[0].isGp() && operands[1].isMem()) {
// Transform from [V]MOVD to MOV.
operands[1].as<Mem>().setSize(4);
inst->setId(Inst::kIdMov);
}
break;
}
case Inst::kIdMovq:
case Inst::kIdVmovq:
case Inst::kIdKmovq: {
if (operands[0].isGp() && operands[1].isMem()) {
// Transform from [V]MOVQ to MOV.
operands[1].as<Mem>().setSize(8);
inst->setId(Inst::kIdMov);
}
break;
}
default:
break;
}
}
// Transform VEX instruction to EVEX when necessary.
if (raInst->isTransformable()) {
if (maxRegId > 15) {

7
deps/asmjit/test/asmjit_test_assembler_a64.cpp vendored
View File

@ -42,6 +42,7 @@ static void ASMJIT_NOINLINE testA64AssemblerBase(AssemblerTester<a64::Assembler>
TEST_INSTRUCTION("E103038B", add(x1, xzr, x3));
TEST_INSTRUCTION("5F00030B", add(wzr, w2, w3));
TEST_INSTRUCTION("5F00038B", add(xzr, x2, x3));
TEST_INSTRUCTION("4140238B", add(x1, x2, w3, uxtw(0)));
TEST_INSTRUCTION("83004011", add(w3, w4, 0, lsl(12)));
TEST_INSTRUCTION("83004091", add(x3, x4, 0, lsl(12)));
TEST_INSTRUCTION("83005011", add(w3, w4, 1024, lsl(12)));
@ -210,7 +211,8 @@ static void ASMJIT_NOINLINE testA64AssemblerBase(AssemblerTester<a64::Assembler>
TEST_INSTRUCTION("3F00022B", cmn(w1, w2));
TEST_INSTRUCTION("3F0002AB", cmn(x1, x2));
TEST_INSTRUCTION("3F08222B", cmn(w1, w2, uxtb(2)));
TEST_INSTRUCTION("3F0822AB", cmn(x1, x2, uxtb(2)));
TEST_INSTRUCTION("3F0822AB", cmn(x1, w2, uxtb(2)));
TEST_INSTRUCTION("5F4023AB", cmn(x2, w3, uxtw(0)));
TEST_INSTRUCTION("FF43212B", cmn(wsp, w1));
TEST_INSTRUCTION("FF07212B", cmn(wsp, w1, uxtb(1)));
TEST_INSTRUCTION("FF6321AB", cmn(sp, x1));
@ -224,7 +226,8 @@ static void ASMJIT_NOINLINE testA64AssemblerBase(AssemblerTester<a64::Assembler>
TEST_INSTRUCTION("3F00026B", cmp(w1, w2));
TEST_INSTRUCTION("3F0002EB", cmp(x1, x2));
TEST_INSTRUCTION("3F08226B", cmp(w1, w2, uxtb(2)));
TEST_INSTRUCTION("3F0822EB", cmp(x1, x2, uxtb(2)));
TEST_INSTRUCTION("3F0822EB", cmp(x1, w2, uxtb(2)));
TEST_INSTRUCTION("5F4023EB", cmp(x2, w3, uxtw(0)));
TEST_INSTRUCTION("FF43216B", cmp(wsp, w1));
TEST_INSTRUCTION("FF07216B", cmp(wsp, w1, uxtb(1)));
TEST_INSTRUCTION("FF6321EB", cmp(sp, x1));

1507
deps/asmjit/test/asmjit_test_compiler_x86.cpp vendored
View File

File diff suppressed because it is too large Load Diff

243
deps/asmjit/test/asmjit_test_emitters.cpp vendored
View File

@ -5,8 +5,24 @@
#include <asmjit/core.h>
#if ASMJIT_ARCH_X86 && !defined(ASMJIT_NO_X86) && !defined(ASMJIT_NO_JIT)
static void printInfo() noexcept {
printf("AsmJit Emitters Test-Suite v%u.%u.%u\n",
unsigned((ASMJIT_LIBRARY_VERSION >> 16) ),
unsigned((ASMJIT_LIBRARY_VERSION >> 8) & 0xFF),
unsigned((ASMJIT_LIBRARY_VERSION ) & 0xFF));
}
#if !defined(ASMJIT_NO_JIT) && ( \
(ASMJIT_ARCH_X86 != 0 && !defined(ASMJIT_NO_X86 )) || \
(ASMJIT_ARCH_ARM == 64 && !defined(ASMJIT_NO_AARCH64)) )
#if ASMJIT_ARCH_X86 != 0
#include <asmjit/x86.h>
#endif
#if ASMJIT_ARCH_ARM == 64
#include <asmjit/a64.h>
#endif
#include <stdio.h>
#include <stdlib.h>
@ -17,9 +33,13 @@ using namespace asmjit;
// Signature of the generated function.
typedef void (*SumIntsFunc)(int* dst, const int* a, const int* b);
// X86 Backend
// -----------
#if ASMJIT_ARCH_X86 != 0
// This function works with both x86::Assembler and x86::Builder. It shows how
// `x86::Emitter` can be used to make your code more generic.
static void makeRawFunc(x86::Emitter* emitter) noexcept {
static void generateFuncWithEmitter(x86::Emitter* emitter) noexcept {
// Decide which registers will be mapped to function arguments. Try changing
// registers of `dst`, `src_a`, and `src_b` and see what happens in function's
// prolog and epilog.
@ -39,8 +59,8 @@ static void makeRawFunc(x86::Emitter* emitter) noexcept {
FuncFrame frame;
frame.init(func);
// Make XMM0 and XMM1 dirty. VEC group includes XMM|YMM|ZMM registers.
frame.addDirtyRegs(x86::xmm0, x86::xmm1);
// Make or registers dirty.
frame.addDirtyRegs(vec0, vec1);
FuncArgsAssignment args(&func); // Create arguments assignment context.
args.assignAll(dst, src_a, src_b); // Assign our registers to arguments.
@ -63,7 +83,7 @@ static void makeRawFunc(x86::Emitter* emitter) noexcept {
#ifndef ASMJIT_NO_COMPILER
// This function works with x86::Compiler, provided for comparison.
static void makeCompiledFunc(x86::Compiler* cc) noexcept {
static void generateFuncWithCompiler(x86::Compiler* cc) noexcept {
x86::Gp dst = cc->newIntPtr("dst");
x86::Gp src_a = cc->newIntPtr("src_a");
x86::Gp src_b = cc->newIntPtr("src_b");
@ -83,6 +103,154 @@ static void makeCompiledFunc(x86::Compiler* cc) noexcept {
}
#endif
static Error generateFunc(CodeHolder& code, EmitterType emitterType) noexcept {
switch (emitterType) {
case EmitterType::kAssembler: {
printf("Using x86::Assembler:\n");
x86::Assembler a(&code);
generateFuncWithEmitter(a.as<x86::Emitter>());
return kErrorOk;
}
#ifndef ASMJIT_NO_BUILDER
case EmitterType::kBuilder: {
printf("Using x86::Builder:\n");
x86::Builder cb(&code);
generateFuncWithEmitter(cb.as<x86::Emitter>());
return cb.finalize();
}
#endif
#ifndef ASMJIT_NO_COMPILER
case EmitterType::kCompiler: {
printf("Using x86::Compiler:\n");
x86::Compiler cc(&code);
generateFuncWithCompiler(&cc);
return cc.finalize();
}
#endif
default: {
printf("** FAILURE: No emitter to use **\n");
exit(1);
}
}
}
#endif
// AArch64 Backend
// ---------------
#if ASMJIT_ARCH_ARM == 64
// This function works with both a64::Assembler and a64::Builder. It shows how
// `a64::Emitter` can be used to make your code more generic.
static void generateFuncWithEmitter(a64::Emitter* emitter) noexcept {
// Decide which registers will be mapped to function arguments. Try changing
// registers of `dst`, `src_a`, and `src_b` and see what happens in function's
// prolog and epilog.
a64::Gp dst = a64::x0;
a64::Gp src_a = a64::x1;
a64::Gp src_b = a64::x2;
// Decide which vector registers to use. We use these to keep the code generic,
// you can switch to any other registers when needed.
a64::Vec vec0 = a64::v0;
a64::Vec vec1 = a64::v1;
a64::Vec vec2 = a64::v2;
// Create and initialize `FuncDetail` and `FuncFrame`.
FuncDetail func;
func.init(FuncSignature::build<void, int*, const int*, const int*>(), emitter->environment());
FuncFrame frame;
frame.init(func);
// Make XMM0 and XMM1 dirty. VEC group includes XMM|YMM|ZMM registers.
frame.addDirtyRegs(vec0, vec1, vec2);
FuncArgsAssignment args(&func); // Create arguments assignment context.
args.assignAll(dst, src_a, src_b); // Assign our registers to arguments.
args.updateFuncFrame(frame); // Reflect our args in FuncFrame.
frame.finalize();
// Emit prolog and allocate arguments to registers.
emitter->emitProlog(frame);
emitter->emitArgsAssignment(frame, args);
emitter->ld1(vec0.b16(), a64::ptr(src_a)); // Load 4 ints from [src_a] to vec0.
emitter->ld1(vec1.b16(), a64::ptr(src_b)); // Load 4 ints from [src_b] to vec1.
emitter->add(vec2.s4(), vec0.s4(), vec1.s4()); // Add 4 ints of vec0 and vec1 and store to vec2.
emitter->st1(vec2.b16(), a64::ptr(dst)); // Store the result (vec2) to [dst].
// Emit epilog and return.
emitter->emitEpilog(frame);
}
#ifndef ASMJIT_NO_COMPILER
// This function works with x86::Compiler, provided for comparison.
static void generateFuncWithCompiler(a64::Compiler* cc) noexcept {
a64::Gp dst = cc->newIntPtr("dst");
a64::Gp src_a = cc->newIntPtr("src_a");
a64::Gp src_b = cc->newIntPtr("src_b");
a64::Vec vec0 = cc->newVecQ("vec0");
a64::Vec vec1 = cc->newVecQ("vec1");
a64::Vec vec2 = cc->newVecQ("vec2");
FuncNode* funcNode = cc->addFunc(FuncSignature::build<void, int*, const int*, const int*>());
funcNode->setArg(0, dst);
funcNode->setArg(1, src_a);
funcNode->setArg(2, src_b);
cc->ld1(vec0.b16(), a64::ptr(src_a)); // Load 4 ints from [src_a] to vec0.
cc->ld1(vec1.b16(), a64::ptr(src_b)); // Load 4 ints from [src_b] to vec1.
cc->add(vec2.s4(), vec0.s4(), vec1.s4()); // Add 4 ints of vec0 and vec1 and store to vec2.
cc->st1(vec2.b16(), a64::ptr(dst)); // Store the result (vec2) to [dst].
cc->endFunc();
}
#endif
static Error generateFunc(CodeHolder& code, EmitterType emitterType) noexcept {
switch (emitterType) {
case EmitterType::kAssembler: {
printf("Using a64::Assembler:\n");
a64::Assembler a(&code);
generateFuncWithEmitter(a.as<a64::Emitter>());
return kErrorOk;
}
#ifndef ASMJIT_NO_BUILDER
case EmitterType::kBuilder: {
printf("Using a64::Builder:\n");
a64::Builder cb(&code);
generateFuncWithEmitter(cb.as<a64::Emitter>());
return cb.finalize();
}
#endif
#ifndef ASMJIT_NO_COMPILER
case EmitterType::kCompiler: {
printf("Using a64::Compiler:\n");
a64::Compiler cc(&code);
generateFuncWithCompiler(&cc);
return cc.finalize();
}
#endif
default: {
printf("** FAILURE: No emitter to use **\n");
exit(1);
}
}
}
#endif
// Testing
// -------
static uint32_t testFunc(JitRuntime& rt, EmitterType emitterType) noexcept {
#ifndef ASMJIT_NO_LOGGING
FileLogger logger(stdout);
@ -96,49 +264,10 @@ static uint32_t testFunc(JitRuntime& rt, EmitterType emitterType) noexcept {
code.setLogger(&logger);
#endif
Error err = kErrorOk;
switch (emitterType) {
case EmitterType::kAssembler: {
printf("Using x86::Assembler:\n");
x86::Assembler a(&code);
makeRawFunc(a.as<x86::Emitter>());
break;
}
#ifndef ASMJIT_NO_BUILDER
case EmitterType::kBuilder: {
printf("Using x86::Builder:\n");
x86::Builder cb(&code);
makeRawFunc(cb.as<x86::Emitter>());
err = cb.finalize();
if (err) {
printf("** FAILURE: x86::Builder::finalize() failed (%s) **\n", DebugUtils::errorAsString(err));
return 1;
}
break;
}
#endif
#ifndef ASMJIT_NO_COMPILER
case EmitterType::kCompiler: {
printf("Using x86::Compiler:\n");
x86::Compiler cc(&code);
makeCompiledFunc(&cc);
err = cc.finalize();
if (err) {
printf("** FAILURE: x86::Compiler::finalize() failed (%s) **\n", DebugUtils::errorAsString(err));
return 1;
}
break;
}
#endif
default: {
printf("** FAILURE: No emitter to use **\n");
return 1;
}
Error err = generateFunc(code, emitterType);
if (err) {
printf("** FAILURE: Failed to generate a function: %s **\n", DebugUtils::errorAsString(err));
return 1;
}
// Add the code generated to the runtime.
@ -146,7 +275,7 @@ static uint32_t testFunc(JitRuntime& rt, EmitterType emitterType) noexcept {
err = rt.add(&fn, &code);
if (err) {
printf("** FAILURE: JitRuntime::add() failed (%s) **\n", DebugUtils::errorAsString(err));
printf("** FAILURE: JitRuntime::add() failed: %s **\n", DebugUtils::errorAsString(err));
return 1;
}
@ -160,27 +289,24 @@ static uint32_t testFunc(JitRuntime& rt, EmitterType emitterType) noexcept {
printf("Result = { %d %d %d %d }\n\n", out[0], out[1], out[2], out[3]);
rt.release(fn);
return !(out[0] == 5 && out[1] == 8 && out[2] == 4 && out[3] == 9);
return out[0] == 5 && out[1] == 8 && out[2] == 4 && out[3] == 9;
}
int main() {
printf("AsmJit Emitters Test-Suite v%u.%u.%u\n",
unsigned((ASMJIT_LIBRARY_VERSION >> 16) ),
unsigned((ASMJIT_LIBRARY_VERSION >> 8) & 0xFF),
unsigned((ASMJIT_LIBRARY_VERSION ) & 0xFF));
printInfo();
printf("\n");
JitRuntime rt;
unsigned nFailed = 0;
nFailed += testFunc(rt, EmitterType::kAssembler);
nFailed += !testFunc(rt, EmitterType::kAssembler);
#ifndef ASMJIT_NO_BUILDER
nFailed += testFunc(rt, EmitterType::kBuilder);
nFailed += !testFunc(rt, EmitterType::kBuilder);
#endif
#ifndef ASMJIT_NO_COMPILER
nFailed += testFunc(rt, EmitterType::kCompiler);
nFailed += !testFunc(rt, EmitterType::kCompiler);
#endif
if (!nFailed)
@ -192,7 +318,8 @@ int main() {
}
#else
int main() {
printf("AsmJit X86 Emitter Test is disabled on non-x86 hosts or when compiled with ASMJIT_NO_JIT option\n\n");
printInfo();
printf("\nThis test is currently disabled - no JIT or no support for the target architecture\n");
return 0;
}
#endif // ASMJIT_ARCH_X86 && !ASMJIT_NO_X86 && !ASMJIT_NO_JIT

103
deps/asmjit/test/asmjit_test_execute.cpp vendored Normal file
View File

@ -0,0 +1,103 @@
// This file is part of AsmJit project <https://asmjit.com>
//
// See asmjit.h or LICENSE.md for license and copyright information
// SPDX-License-Identifier: Zlib
#include <asmjit/core.h>
static void printInfo() noexcept {
printf("AsmJit Execute Test-Suite v%u.%u.%u\n",
unsigned((ASMJIT_LIBRARY_VERSION >> 16) ),
unsigned((ASMJIT_LIBRARY_VERSION >> 8) & 0xFF),
unsigned((ASMJIT_LIBRARY_VERSION ) & 0xFF));
}
#if !defined(ASMJIT_NO_JIT) && ( \
(ASMJIT_ARCH_X86 != 0 && !defined(ASMJIT_NO_X86 )) || \
(ASMJIT_ARCH_ARM == 64 && !defined(ASMJIT_NO_AARCH64)) )
#if ASMJIT_ARCH_X86 != 0
#include <asmjit/x86.h>
#endif
#if ASMJIT_ARCH_ARM == 64
#include <asmjit/a64.h>
#endif
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
using namespace asmjit;
// Signature of the generated function.
typedef void (*EmptyFunc)(void);
// Generate Empty Function
// -----------------------
#if ASMJIT_ARCH_X86 != 0
static void generateEmptyFunc(CodeHolder& code) noexcept {
x86::Assembler a(&code);
a.ret();
}
#endif
#if ASMJIT_ARCH_ARM == 64
static void generateEmptyFunc(CodeHolder& code) noexcept {
a64::Assembler a(&code);
a.ret(a64::x30);
}
#endif
// Testing
// -------
static void executeEmptyFunc(JitRuntime& rt) noexcept {
CodeHolder code;
code.init(rt.environment(), rt.cpuFeatures());
EmptyFunc fn;
generateEmptyFunc(code);
Error err = rt.add(&fn, &code);
if (err) {
printf("** FAILURE: JitRuntime::add() failed: %s **\n", DebugUtils::errorAsString(err));
exit(1);
}
fn();
rt.release(&fn);
}
int main() {
printInfo();
printf("\n");
{
printf("Trying to execute empty function with JitRuntime (default settings)\n");
JitRuntime rt;
executeEmptyFunc(rt);
}
if (VirtMem::hardenedRuntimeInfo().hasFlag(VirtMem::HardenedRuntimeFlags::kDualMapping)) {
printf("Trying to execute empty function with JitRuntime (dual-mapped)\n");
JitAllocator::CreateParams params {};
params.options |= JitAllocatorOptions::kUseDualMapping;
JitRuntime rt;
executeEmptyFunc(rt);
}
// If we are here we were successful, otherwise the process would crash.
printf("** SUCCESS **\n");
return 0;
}
#else
int main() {
printInfo();
printf("\nThis test is currently disabled - no JIT or no support for the target architecture\n");
return 0;
}
#endif // ASMJIT_ARCH_X86 && !ASMJIT_NO_X86 && !ASMJIT_NO_JIT

4
deps/asmjit/test/asmjit_test_instinfo.cpp vendored
View File

@ -151,6 +151,7 @@ static void testX86Arch() {
Arch arch = Arch::kX64;
printInfoSimple(arch, Inst::kIdAdd, InstOptions::kNone, eax, ebx);
printInfoSimple(arch, Inst::kIdXor, InstOptions::kNone, eax, eax);
printInfoSimple(arch, Inst::kIdLods, InstOptions::kNone, eax, dword_ptr(rsi));
printInfoSimple(arch, Inst::kIdPshufd, InstOptions::kNone, xmm0, xmm1, imm(0));
@ -167,6 +168,9 @@ static void testX86Arch() {
printInfoSimple(arch, Inst::kIdVaddpd, InstOptions::kNone, ymm0, ymm30, ymm31);
printInfoSimple(arch, Inst::kIdVaddpd, InstOptions::kNone, zmm0, zmm1, zmm2);
printInfoSimple(arch, Inst::kIdVpternlogd, InstOptions::kNone, zmm0, zmm0, zmm0, imm(0xFF));
printInfoSimple(arch, Inst::kIdVpternlogq, InstOptions::kNone, zmm0, zmm1, zmm2, imm(0x33));
printInfoExtra(arch, Inst::kIdVaddpd, InstOptions::kNone, k1, zmm0, zmm1, zmm2);
printInfoExtra(arch, Inst::kIdVaddpd, InstOptions::kX86_ZMask, k1, zmm0, zmm1, zmm2);
#endif // !ASMJIT_NO_X86

4
deps/asmjit/test/asmjit_test_perf_a64.cpp vendored
View File

@ -177,13 +177,13 @@ static void generateGpSequenceInternal(
cc.cmn(wA, wB);
cc.cmn(xA, xB);
cc.cmn(wA, wB, uxtb(2));
cc.cmn(xA, xB, uxtb(2));
cc.cmn(xA, wB, uxtb(2));
cc.cmp(wA, 33);
cc.cmp(xA, 33);
cc.cmp(wA, wB);
cc.cmp(xA, xB);
cc.cmp(wA, wB, uxtb(2));
cc.cmp(xA, xB, uxtb(2));
cc.cmp(xA, wB, uxtb(2));
cc.crc32b(wA, wB, wC);
cc.crc32b(wzr, wB, wC);
cc.crc32b(wA, wzr, wC);

2
deps/asmjit/tools/tablegen.js vendored
View File

@ -147,7 +147,7 @@ class InstructionNameData {
suffix = name.substring(longestPrefix);
}
else if (longestSuffix) {
const splitAt = Math.min(name.length - longestSuffix, kMaxPrefixSize);;
const splitAt = Math.min(name.length - longestSuffix, kMaxPrefixSize);
prefix = name.substring(0, splitAt);
suffix = name.substring(splitAt);
}

3
deps/gsc-tool/.github/FUNDING.yml vendored
View File

@ -1,3 +0,0 @@
github: xensik
ko_fi: xensik
custom: paypal.me/xensik

278
deps/gsc-tool/.github/workflows/main.yml vendored
View File

@ -1,278 +0,0 @@
name: Main
on:
push:
branches:
- "**"
tags:
- '[0-9]+.[0-9]+.[0-9]+'
pull_request:
branches:
- "**"
types: [opened, synchronize, reopened]
concurrency:
group: ${{ github.ref }}
cancel-in-progress: true
env:
PREMAKE_VERSION: "5.0.0-beta2"
jobs:
build-windows:
name: Build Windows
runs-on: windows-latest
strategy:
fail-fast: false
matrix:
config:
- release
arch:
- x86
- x64
- arm64
include:
- arch: x86
platform: Win32
- arch: x64
platform: x64
- arch: arm64
platform: arm64
steps:
- name: Check out files
uses: actions/checkout@v4
with:
submodules: true
fetch-depth: 0
lfs: false
- name: Add msbuild to PATH
uses: microsoft/setup-msbuild@v1.3.1
- name: Add premake5 to PATH
uses: abel0b/setup-premake@v2.3
with:
version: ${{ env.PREMAKE_VERSION }}
- name: Generate project files
run: premake5 vs2022
- name: Set up problem matching
uses: ammaraskar/msvc-problem-matcher@master
- name: Build ${{matrix.arch}} ${{matrix.config}} binaries
run: msbuild /m /v:minimal /p:Configuration=${{matrix.config}} /p:Platform=${{matrix.platform}} build/gsc-tool.sln
- name: Upload ${{matrix.arch}} ${{matrix.config}} binaries
uses: actions/upload-artifact@v3.1.3
with:
name: windows-${{matrix.arch}}-${{matrix.config}}
path: |
build/bin/${{matrix.arch}}/${{matrix.config}}/gsc-tool.exe
build-macos:
name: Build macOS
runs-on: macos-13
strategy:
fail-fast: false
matrix:
config:
- release
arch:
- x64
- arm64
steps:
- name: Check out files
uses: actions/checkout@v4
with:
submodules: true
fetch-depth: 0
lfs: false
- name: Set up Homebrew
uses: Homebrew/actions/setup-homebrew@master
- name: Install LLVM
run: brew install llvm
- name: Add LLVM to PATH
run: |
echo "/usr/local/opt/llvm/bin" >> $GITHUB_PATH
- name: Add premake5 to PATH
uses: abel0b/setup-premake@v2.3
with:
version: ${{ env.PREMAKE_VERSION }}
- name: Generate project files
run: premake5 gmake2
- name: Set up problem matching
uses: ammaraskar/gcc-problem-matcher@master
- name: Build ${{matrix.arch}} ${{matrix.config}} binaries
run: |
pushd build
make config=${{matrix.config}}_${{matrix.arch}} -j$(sysctl -n hw.logicalcpu)
- name: Upload ${{matrix.arch}} ${{matrix.config}} binaries
uses: actions/upload-artifact@v3.1.3
with:
name: macos-${{matrix.arch}}-${{matrix.config}}
path: |
build/bin/${{matrix.arch}}/${{matrix.config}}/gsc-tool
build-linux:
name: Build Linux
runs-on: ubuntu-latest
strategy:
fail-fast: false
matrix:
config:
- release
arch:
- x64
# - arm64
steps:
- name: Check out files
uses: actions/checkout@v4
with:
submodules: true
fetch-depth: 0
lfs: false
- name: Install LLVM
run: |
wget https://apt.llvm.org/llvm.sh
chmod +x llvm.sh
sudo ./llvm.sh 17
# - name: Install dependencies (arm64)
# if: matrix.arch == 'arm64'
# run: sudo apt-get install crossbuild-essential-arm64 -y
- name: Add premake5 to PATH
uses: abel0b/setup-premake@v2.3
with:
version: ${{ env.PREMAKE_VERSION }}
- name: Generate project files
run: premake5 gmake2
- name: Set up problem matching
uses: ammaraskar/gcc-problem-matcher@master
- name: Build ${{matrix.arch}} ${{matrix.config}} binaries
run: |
pushd build
make config=${{matrix.config}}_${{matrix.arch}} -j$(nproc)
env:
CC: clang-17
CXX: clang++-17
- name: Upload ${{matrix.arch}} ${{matrix.config}} binaries
uses: actions/upload-artifact@v3.1.3
with:
name: linux-${{matrix.arch}}-${{matrix.config}}
path: |
build/bin/${{matrix.arch}}/${{matrix.config}}/gsc-tool
deploy:
name: Deploy Release
runs-on: ubuntu-latest
needs: [ build-windows, build-macos, build-linux ]
if: github.ref_type == 'tag'
steps:
- name: Checkout Source
uses: actions/checkout@v4
with:
sparse-checkout: |
Dockerfile
README.md
sparse-checkout-cone-mode: false
- name: Download Binaries
uses: actions/download-artifact@v3
- name: Compress Binaries
run: |
for dir in */; do
if [[ $dir == *"windows"* ]]; then
cd "$dir" && zip -r "../${dir%/}.zip" . && cd ..
else
tar -czvf "${dir%/}.tar.gz" -C "$dir" .
fi
done
shell: bash
- name: Create Release
uses: "marvinpinto/action-automatic-releases@latest"
with:
repo_token: "${{ secrets.GITHUB_TOKEN }}"
prerelease: false
draft: true
files: |
*.zip
*.tar.gz
# - name: Setup Cosign
# if: github.event_name != 'pull_request'
# uses: sigstore/cosign-installer@v3.1.1
# with:
# cosign-release: 'v2.1.1'
# - name: Setup QEMU
# uses: docker/setup-qemu-action@v3.0.0
# with:
# platforms: linux/amd64,linux/arm64
- name: Setup Docker Buildx
uses: docker/setup-buildx-action@v3.0.0
- name: Login to DockerHub
uses: docker/login-action@v3.0.0
with:
username: ${{ secrets.DOCKERHUB_USER }}
password: ${{ secrets.DOCKERHUB_TOKEN }}
- name: Login to GitHub Container Registry
uses: docker/login-action@v3.0.0
with:
registry: ghcr.io
username: ${{ github.repository_owner }}
password: ${{ secrets.GITHUB_TOKEN }}
- id: meta
uses: docker/metadata-action@v5.4.0
with:
images: |
xensik/gsc-tool
ghcr.io/xensik/gsc-tool
tags: |
${{ github.ref_name }}
latest
- name: Build and Push Docker Image
id: build-and-push
uses: docker/build-push-action@v5.1.0
with:
context: .
platforms: linux/amd64
push: true
tags: ${{ steps.meta.outputs.tags }}
labels: ${{ steps.meta.outputs.labels }}
cache-from: type=gha
cache-to: type=gha,mode=max
- name: Update DockerHub Information
uses: peter-evans/dockerhub-description@v4
with:
repository: xensik/gsc-tool
username: ${{ secrets.DOCKERHUB_USER }}
password: ${{ secrets.DOCKERHUB_TOKEN }}
# - name: Sign the published Docker image
# env:
# TAGS: ${{ steps.meta.outputs.tags }}
# DIGEST: ${{ steps.build-and-push.outputs.digest }}
# run: echo "${TAGS}" | xargs -I {} cosign sign --yes {}@${DIGEST}

17
deps/gsc-tool/README.md vendored
View File

@ -2,8 +2,8 @@
[![build](https://github.com/xensik/gsc-tool/workflows/Build/badge.svg)](https://github.com/xensik/gsc-tool/actions)
[![issues](https://img.shields.io/github/issues/xensik/gsc-tool)](https://github.com/xensik/gsc-tool/issues)
[![license](https://img.shields.io/github/license/xensik/gsc-tool.svg)](https://github.com/xensik/gsc-tool/blob/dev/LICENSE)
[![releases](https://img.shields.io/github/v/release/xensik/gsc-tool)](https://github.com/xensik/gsc-tool/releases)
[![paypal](https://img.shields.io/badge/PayPal-support-blue.svg?logo=paypal)](https://www.paypal.me/xensik)
[![github sponsors](https://img.shields.io/github/sponsors/xensik)](https://github.com/sponsors/xensik)
[![patreon](https://img.shields.io/badge/Patreon-Become_a_Patron-ff424d?logo=patreon)](https://patreon.com/xensik)
# GSC Tool
A utility to compile & decompile IW engine game scripts.
@ -23,6 +23,7 @@ A utility to compile & decompile IW engine game scripts.
- **T7** *(Call of Duty: Black Ops III)* `PC` *(Decompiler)*
- **T8** *(Call of Duty: Black Ops 4)* ***\*WIP\****
- **T9** *(Call of Duty: Black Ops Cold War)* ***\*WIP\****
- **T10** *(Call of Duty: Black Ops 6)* ***\*WIP\****
- **JUP** *(Call of Duty: Modern Warfare III (2023)* ***\*WIP\****
## Usage
@ -38,10 +39,16 @@ A utility to compile & decompile IW engine game scripts.
``-s, --system <system>`` [REQUIRED] one of: `pc`, `ps3`, `ps4`, `ps5`, `xb2` (*360*), `xb3` (*One*), `xb4` (*Series X|S*), `wiiu`
``-i, --instance <instance>`` Instance to use on games with .gsc/.csc (server, client) (default: server)
``-y, --dry`` Dry run (do not write files).
``-d, --dev`` Enable developer mode (dev blocks & generate bytecode map).
``-z, --zonetool`` Enable zonetool mode (use .cgsc files).
``--t6fixup`` Decompile t6 files from broken compilers
``-h, --help`` Display help.
``-v, --version`` Display version.
@ -83,9 +90,9 @@ note: for PS3 & Xbox 360 `.gscbin` files *(compressedLen, len, bytecodeLen)* are
## Contribute
If you like my work, consider sponsoring/donating! Would allow me to spend more time adding new features & fixing bugs.
BTC: bc1qky7x9kpjlt6nsvt7pckc3wwzk8rk9pgtnmw98u\
ETH: 0x6261BBE1a33F6Fec4b722DbCe2c28B4CC02c9C7B\
[![pypl](https://img.shields.io/badge/PayPal-00457C?style=for-the-badge&logo=paypal&logoColor=white)](https://www.paypal.me/xensik) [![kofi](https://img.shields.io/badge/Ko--fi-F16061?style=for-the-badge&logo=ko-fi&logoColor=white)](https://ko-fi.com/xensik)
BTC: ``bc1qky7x9kpjlt6nsvt7pckc3wwzk8rk9pgtnmw98u``
[![github sponsors](https://img.shields.io/github/sponsors/xensik?style=for-the-badge&label=Github%20sponsors)](https://github.com/sponsors/xensik) [![patreon](https://img.shields.io/badge/Patreon%20-be%20a%20Patron-FF424D?style=for-the-badge&logo=patreon&logoColor=white)](https://patreon.com/xensik)
## Credits
This project is based on [*RektInator's* gsc-asm](https://github.com/ZoneTool/gsc-asm). Special thanks to **RektInator**, **JTAG** & **Dasfonia**.

Some files were not shown because too many files have changed in this diff Show More