255 lines
8.7 KiB
C++
255 lines
8.7 KiB
C++
// This file is part of AsmJit project <https://asmjit.com>
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//
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// See asmjit.h or LICENSE.md for license and copyright information
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// SPDX-License-Identifier: Zlib
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#ifndef ASMJIT_CORE_RALOCAL_P_H_INCLUDED
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#define ASMJIT_CORE_RALOCAL_P_H_INCLUDED
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#include "../core/api-config.h"
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#ifndef ASMJIT_NO_COMPILER
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#include "../core/raassignment_p.h"
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#include "../core/radefs_p.h"
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#include "../core/rapass_p.h"
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#include "../core/support.h"
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ASMJIT_BEGIN_NAMESPACE
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//! \cond INTERNAL
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//! \addtogroup asmjit_ra
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//! \{
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//! Local register allocator.
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class RALocalAllocator {
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public:
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ASMJIT_NONCOPYABLE(RALocalAllocator)
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typedef RAAssignment::PhysToWorkMap PhysToWorkMap;
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typedef RAAssignment::WorkToPhysMap WorkToPhysMap;
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//! Link to `BaseRAPass`.
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BaseRAPass* _pass;
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//! Link to `BaseCompiler`.
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BaseCompiler* _cc;
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//! Architecture traits.
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const ArchTraits* _archTraits;
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//! Registers available to the allocator.
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RARegMask _availableRegs;
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//! Registers clobbered by the allocator.
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RARegMask _clobberedRegs;
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//! Register assignment (current).
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RAAssignment _curAssignment;
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//! Register assignment used temporarily during assignment switches.
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RAAssignment _tmpAssignment;
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//! Link to the current `RABlock`.
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RABlock* _block;
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//! InstNode.
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InstNode* _node;
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//! RA instruction.
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RAInst* _raInst;
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//! Count of all TiedReg's.
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uint32_t _tiedTotal;
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//! TiedReg's total counter.
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RARegCount _tiedCount;
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//! Temporary workToPhysMap that can be used freely by the allocator.
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WorkToPhysMap* _tmpWorkToPhysMap;
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//! \name Construction & Destruction
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//! \{
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inline RALocalAllocator(BaseRAPass* pass) noexcept
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: _pass(pass),
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_cc(pass->cc()),
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_archTraits(pass->_archTraits),
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_availableRegs(pass->_availableRegs),
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_clobberedRegs(),
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_curAssignment(),
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_block(nullptr),
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_node(nullptr),
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_raInst(nullptr),
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_tiedTotal(),
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_tiedCount() {}
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Error init() noexcept;
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//! \}
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//! \name Accessors
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//! \{
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inline RAWorkReg* workRegById(uint32_t workId) const noexcept { return _pass->workRegById(workId); }
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inline PhysToWorkMap* physToWorkMap() const noexcept { return _curAssignment.physToWorkMap(); }
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inline WorkToPhysMap* workToPhysMap() const noexcept { return _curAssignment.workToPhysMap(); }
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//! Returns the currently processed block.
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inline RABlock* block() const noexcept { return _block; }
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//! Sets the currently processed block.
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inline void setBlock(RABlock* block) noexcept { _block = block; }
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//! Returns the currently processed `InstNode`.
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inline InstNode* node() const noexcept { return _node; }
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//! Returns the currently processed `RAInst`.
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inline RAInst* raInst() const noexcept { return _raInst; }
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//! Returns all tied regs as `RATiedReg` array.
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inline RATiedReg* tiedRegs() const noexcept { return _raInst->tiedRegs(); }
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//! Returns tied registers grouped by the given `group`.
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inline RATiedReg* tiedRegs(RegGroup group) const noexcept { return _raInst->tiedRegs(group); }
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//! Returns count of all TiedRegs used by the instruction.
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inline uint32_t tiedCount() const noexcept { return _tiedTotal; }
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//! Returns count of TiedRegs used by the given register `group`.
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inline uint32_t tiedCount(RegGroup group) const noexcept { return _tiedCount.get(group); }
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inline bool isGroupUsed(RegGroup group) const noexcept { return _tiedCount[group] != 0; }
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//! \}
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//! \name Assignment
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//! \{
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Error makeInitialAssignment() noexcept;
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Error replaceAssignment(const PhysToWorkMap* physToWorkMap) noexcept;
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//! Switch to the given assignment by reassigning all register and emitting code that reassigns them.
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//! This is always used to switch to a previously stored assignment.
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//!
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//! If `tryMode` is true then the final assignment doesn't have to be exactly same as specified by `dstPhysToWorkMap`
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//! and `dstWorkToPhysMap`. This mode is only used before conditional jumps that already have assignment to generate
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//! a code sequence that is always executed regardless of the flow.
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Error switchToAssignment(PhysToWorkMap* dstPhysToWorkMap, const ZoneBitVector& liveIn, bool dstReadOnly, bool tryMode) noexcept;
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inline Error spillRegsBeforeEntry(RABlock* block) noexcept {
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return spillScratchGpRegsBeforeEntry(block->entryScratchGpRegs());
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}
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Error spillScratchGpRegsBeforeEntry(uint32_t scratchRegs) noexcept;
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//! \}
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//! \name Allocation
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//! \{
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Error allocInst(InstNode* node) noexcept;
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Error spillAfterAllocation(InstNode* node) noexcept;
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Error allocBranch(InstNode* node, RABlock* target, RABlock* cont) noexcept;
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Error allocJumpTable(InstNode* node, const RABlocks& targets, RABlock* cont) noexcept;
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//! \}
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//! \name Decision Making
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//! \{
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enum CostModel : uint32_t {
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kCostOfFrequency = 1048576,
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kCostOfDirtyFlag = kCostOfFrequency / 4
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};
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inline uint32_t costByFrequency(float freq) const noexcept {
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return uint32_t(int32_t(freq * float(kCostOfFrequency)));
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}
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inline uint32_t calculateSpillCost(RegGroup group, uint32_t workId, uint32_t assignedId) const noexcept {
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RAWorkReg* workReg = workRegById(workId);
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uint32_t cost = costByFrequency(workReg->liveStats().freq());
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if (_curAssignment.isPhysDirty(group, assignedId))
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cost += kCostOfDirtyFlag;
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return cost;
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}
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//! Decides on register assignment.
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uint32_t decideOnAssignment(RegGroup group, uint32_t workId, uint32_t assignedId, RegMask allocableRegs) const noexcept;
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//! Decides on whether to MOVE or SPILL the given WorkReg, because it's allocated in a physical register that have
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//! to be used by another WorkReg.
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//!
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//! The function must return either `RAAssignment::kPhysNone`, which means that the WorkReg of `workId` should be
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//! spilled, or a valid physical register ID, which means that the register should be moved to that physical register
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//! instead.
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uint32_t decideOnReassignment(RegGroup group, uint32_t workId, uint32_t assignedId, RegMask allocableRegs) const noexcept;
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//! Decides on best spill given a register mask `spillableRegs`
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uint32_t decideOnSpillFor(RegGroup group, uint32_t workId, RegMask spillableRegs, uint32_t* spillWorkId) const noexcept;
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//! \}
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//! \name Emit
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//! \{
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//! Emits a move between a destination and source register, and fixes the
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//! register assignment.
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inline Error onMoveReg(RegGroup group, uint32_t workId, uint32_t dstPhysId, uint32_t srcPhysId) noexcept {
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if (dstPhysId == srcPhysId) return kErrorOk;
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_curAssignment.reassign(group, workId, dstPhysId, srcPhysId);
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return _pass->emitMove(workId, dstPhysId, srcPhysId);
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}
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//! Emits a swap between two physical registers and fixes their assignment.
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//!
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//! \note Target must support this operation otherwise this would ASSERT.
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inline Error onSwapReg(RegGroup group, uint32_t aWorkId, uint32_t aPhysId, uint32_t bWorkId, uint32_t bPhysId) noexcept {
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_curAssignment.swap(group, aWorkId, aPhysId, bWorkId, bPhysId);
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return _pass->emitSwap(aWorkId, aPhysId, bWorkId, bPhysId);
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}
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//! Emits a load from [VirtReg/WorkReg]'s spill slot to a physical register
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//! and makes it assigned and clean.
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inline Error onLoadReg(RegGroup group, uint32_t workId, uint32_t physId) noexcept {
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_curAssignment.assign(group, workId, physId, RAAssignment::kClean);
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return _pass->emitLoad(workId, physId);
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}
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//! Emits a save a physical register to a [VirtReg/WorkReg]'s spill slot,
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//! keeps it assigned, and makes it clean.
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inline Error onSaveReg(RegGroup group, uint32_t workId, uint32_t physId) noexcept {
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ASMJIT_ASSERT(_curAssignment.workToPhysId(group, workId) == physId);
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ASMJIT_ASSERT(_curAssignment.physToWorkId(group, physId) == workId);
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_curAssignment.makeClean(group, workId, physId);
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return _pass->emitSave(workId, physId);
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}
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//! Assigns a register, the content of it is undefined at this point.
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inline Error onAssignReg(RegGroup group, uint32_t workId, uint32_t physId, bool dirty) noexcept {
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_curAssignment.assign(group, workId, physId, dirty);
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return kErrorOk;
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}
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//! Spills a variable/register, saves the content to the memory-home if modified.
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inline Error onSpillReg(RegGroup group, uint32_t workId, uint32_t physId) noexcept {
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if (_curAssignment.isPhysDirty(group, physId))
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ASMJIT_PROPAGATE(onSaveReg(group, workId, physId));
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return onKillReg(group, workId, physId);
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}
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inline Error onDirtyReg(RegGroup group, uint32_t workId, uint32_t physId) noexcept {
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_curAssignment.makeDirty(group, workId, physId);
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return kErrorOk;
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}
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inline Error onKillReg(RegGroup group, uint32_t workId, uint32_t physId) noexcept {
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_curAssignment.unassign(group, workId, physId);
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return kErrorOk;
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}
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//! \}
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};
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//! \}
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//! \endcond
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ASMJIT_END_NAMESPACE
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#endif // !ASMJIT_NO_COMPILER
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#endif // ASMJIT_CORE_RALOCAL_P_H_INCLUDED
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